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IEC61850 basics

February 7, 2018 | Author: Chilton Fernandes | Category: Electrical Substation, Electric Power Transmission, Electrical Grid, Computer Network, Automation
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this contains basic information of 61850 standard...

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This is the author’s version of a work that was submitted/accepted for publication in the following source: Ingram, David M.E. (2013) Assessment of precision timing and real-time data networks for digital substation automation. PhD by Publication, Queensland University of Technology. This file was downloaded from: http://eprints.qut.edu.au/60892/

Notice: Changes introduced as a result of publishing processes such as copy-editing and formatting may not be reflected in this document. For a definitive version of this work, please refer to the published source:

Assessment of Precision Timing and Real-Time Data Networks for Digital Substation Automation by

David Mark Edward Ingram B.E. (Hons) Cant., M.E. Cant.

Submitted in fulfilment of the requirements for the degree of Doctor of Philosophy

School of Electrical Engineering and Computer Science Queensland University of Technology

February 2013

Copyright 2013 David Mark Edward Ingram

Keywords Ethernet, IEC 61850, IEEE 1588, industrial networks, performance evaluation, precision time protocol, process bus, power transmission, protective relaying, PTP, reliability, smart grid, substation automation, time synchronisation

iii

Abstract The high voltage power grid, with its interconnected network of transmission lines and substations, is an important part of everyday life. Increasing demand and limitations on the building of new power lines have led to increased operating voltages, and consequently, larger substations. This in turn has increased the cost of copper cabling to connect circuit breakers, disconnectors, current transformers and voltage transformers in switchyards to control rooms. The measurement technology used for protection and control has not fundamentally changed since the early twentieth century. Non-Conventional Instrument Transformers (NCITs), such as capacitive voltage sensors and optical current transformers, which are safer and pose less risk to the environment, are now commercially available. Digital transmission of current and voltage signals from NCITs in the switchyard to substation control rooms significantly reduces the cabling required, with a single fibre optic cable capable of replacing more than 100 copper circuits. Ethernet process bus networks simplify system-wide automated testing, and facilitate innovative test methodologies such as the testing of in-service protection relays. The IEC 61850 family of substation communication systems standards were released in the early 2000s. These standards include Ethernet based process-level connections between switchyards and control rooms; however, their in-service performance is largely unknown. High voltage power systems are critical infrastructure, and therefore substation automation systems must be extremely reliable and proven to meet performance requirements before going into service. This research examines two aspects of a shared multifunction process bus: precision synchronising of sampling for analogue to digital conversion using the IEEE Std 1588 Precision Time Protocol (PTP) over Ethernet, and the behaviour and interactions of the various protocols that share the data network. This thesis takes an experimental approach to the assessment of performance, rather than adopting analytical or purely simulation techniques. A novel multi-vendor test bed was constructed from commercially available and late-stage prototype timing and protection equipment. Test protocols were developed throughout the research to thoroughly evaluate the performance of the devices in the test bed. This was a component-based approach, building from the bottom up. Results were validated with system level testing, from the top down, using real-time simulation of a power system and ‘hardwarein-the-loop’. The suitability of PTP process bus synchronisation was assessed in a number of steady state and transient performance studies. The results showed PTP meets the synchronisation requirements of sampled value process buses, with the additional benefit of compensation for path delays. A performance test was developed for transparent clocks (Ethernet switches with specific support for PTP) using a precision Ethernet card, rather than specialist PTP test

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equipment. The tests identified flawed implementations of PTP, which confirmed the need for vendor-independent conformance testing. A reliability model for PTP timing systems, based on Fault Tree Analysis, was created to provide meaningful comparisons of timing topologies. Detailed network performance tests were conducted with controlled transmission and capture of sampled value (IEC 61850-9-2) messages, and transduced analogue and digital events using Generic Object Oriented Substation Event (GOOSE, IEC 61850-8-1) messages. The precision Ethernet card used for PTP performance tests was used for this protocol testing, which reduced the cost of the test instrumentation. The results from this hardware-based test bed differ from previously published simulations, and show that sampled values, GOOSE and PTP do not unduly influence each other. This thesis presents an Ethernet addressing scheme for sampled values and GOOSE based on the IEC 81364 standard for plant identification that is used in the power industry. Field measurements from a live substation and a real-time simulator with merging unit capability were used to characterise the nature of process bus traffic. Real-time simulation with hardware-in-the-loop (the test bed) was used to link the time synchronisation and real-time networking results back to power system protection performance. The use of a Real Time Digital Simulator with sampled values, GOOSE and PTP in one system is novel, and provides a greater understanding of the factors that affect process bus performance. It accounts for unknown factors that cannot be modelled with software alone. Transformer differential protection was used to assess the influence of synchronising error and Ethernet network loading on the response time to faults. This ‘closed loop’ approach showed that the results produced by the component level test procedures presented in this thesis are an accurate predictor of protection performance. System level testing with real-time simulation enables the protection design to be proven, rather than validating that settings have been correctly entered into the protection relay with secondary injection tests. The research presented in this thesis provides a suite of tests that inform the design of multifunction process bus substation automation systems, and can assess the ongoing conformance of systems placed into service. This should give confidence to utilities considering adoption of NCITs or substation automation system refurbishment that the real-time Ethernet networks and time synchronising systems that underpin a digital process bus will meet their needs and reduce their exposure to risk.

Contents

Abstract

v

List of Figures

xi

List of Tables

xiii

List of Abbreviations

xv

List of Standards

xvii

Statement of Original Authorship

xix

Acknowledgments

xxi

Chapter 1 Introduction 1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1.1 Transmission substations . . . . . . . . . . . . . . . . . . . . . . . 1.1.2 Standardisation efforts for smart grid applications . . . . . . . . . . 1.1.3 Safety, environmental and community concerns . . . . . . . . . . . 1.1.4 Process buses and innovation in substation automation . . . . . . . 1.1.5 System level testing . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1.6 Relationship of parties involved in building substation automation systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1.7 Barriers to adoption of new technology . . . . . . . . . . . . . . . 1.2 Overall objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Specific aims and research questions . . . . . . . . . . . . . . . . . . . . . . 1.4 Research contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.1 Test methods for Ethernet process bus networks . . . . . . . . . . 1.4.2 Behaviour observations of process bus network traffic . . . . . . . 1.4.3 Design guidelines for shared process bus systems . . . . . . . . . . 1.5 Account of research progress . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5.1 Chapter linkage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 Thesis outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8 9 10 10 11 11 11 11 11 12 16

Chapter 2 Background and past research 2.1 Substation automation . . . . . . . . . . . . . . . . . . . . 2.1.1 Protective relaying . . . . . . . . . . . . . . . . . . 2.1.2 Non-Conventional Instrument Transformers . . . . 2.1.3 Digital switchyard connections . . . . . . . . . . . 2.2 The IEC 61850 object model . . . . . . . . . . . . . . . . . . 2.3 Power system protection using process bus connections . . 2.3.1 Process bus network reliability and topologies . . . 2.3.2 Impact of sampled values on protection algorithms 2.3.3 Testing of process bus protection systems . . . . .

19 19 19 20 20 22 24 25 26 26

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1 2 2 4 6 7 8

viii

CONTENTS

2.4

2.5

2.6

2.3.4 Implementation of process bus protection systems . . . . . 2.3.5 Real-time simulation of process buses protection . . . . . . Precision timing for substations applications . . . . . . . . . . . . . 2.4.1 Use of Precision Time Protocol in substations . . . . . . . . 2.4.2 Evaluating the performance of the Precision Time Protocol 2.4.3 Reliability of Precision Time Protocol systems . . . . . . . . Real-time data networks . . . . . . . . . . . . . . . . . . . . . . . . 2.5.1 Achieving determinism with switched full duplex Ethernet networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5.2 Network simulation and emulation . . . . . . . . . . . . . . 2.5.3 Network interactions with multi-protocol shared networks 2.5.4 Assessing the performance of real-time networks . . . . . . Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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27 27 28 29 30 31 31

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32 33 34 35 36

Chapter 3 Test and evaluation system for multi-protocol sampled value protection schemes

39

Chapter 4 Evaluation of precision time synchronisation methods for substation applications

49

Chapter 5 Use of precision time protocol to synchronise sampled value process buses

57

Chapter 6 Performance analysis of PTP components for IEC 61850 process bus applications

69

Chapter 7 Quantitative assessment of fault tolerant precision timing for electricity substations

81

Chapter 8 Direct evaluation of IEC 61850-9-2 process bus network performance

93

Chapter 9 Performance analysis of IEC 61850 sampled value process bus networks

97

Chapter 10 Network interactions and performance of a multi-function IEC 61850 process bus

109

Chapter 11 Multicast traffic filtering for sampled value process bus networks

121

Chapter 12 System level tests of transformer differential protection using an IEC 61850 process bus

129

Chapter 13 Conclusions 13.1 Research findings and implications . . . 13.2 Significance of findings . . . . . . . . . . 13.3 Limitations of the current study . . . . . 13.4 Suggestions for future work . . . . . . . 13.5 Recommendations for practice and policy

141 142 145 145 146 147

Appendix A Supporting conference paper

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149

CONTENTS

ix

Appendix B Test bed equipment details B.1 Photographs and network diagram . . . . . . . . . . . . . . . . . . . . . . B.2 Equipment specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

157 157 160

Appendix C Participation in internationals standards development

163

Appendix D Additional publications

167

References

169

List of Figures

1.1

Overlapping research domains that comprise process bus substation automation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1

1.2

Map of transmission lines and power stations in Australia. . . . . . . . . .

3

1.3

Examples of high voltage primary plant and substation automation systems at the 110 kV and 132 kV level in Australian substations. . . . . . .

1.4

Substation automation terminology, defining the station, bay and process levels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.5

4

5

Relationships between product vendor, system integrator, constructor and end-user for substation automation systems. . . . . . . . . . . . . . . . . .

9

1.6

Chapter map showing logical flow of this thesis. . . . . . . . . . . . . . . .

14

2.1

110 kV gas insulated indoor substation bay, showing switches (XSWI), current transformers (TCTR) and circuit breaker (XCBR). . . . . . . . . . .

2.2

23

The IEC 61850 logical nodes and interfaces required for transformer differential protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

24

B.1

Photograph of the test bed components in the RTDS Room. . . . . . . . . .

157

B.2

Photograph of the test bed components in the Secondary Systems Test and Development Centre. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

B.3

158

Schematic of how the test bed was configured for the majority of tests. Four dedicated fibre optic cables were installed for this project, and are shown as Fibre 1, Fibre 2, Fibre 3 and Fibre 4 on the diagram. . . . . . . . .

xi

158

List of Tables

1.1

IEC 61850-5 protection performance classes. . . . . . . . . . . . . . . . . .

6

1.2

List of peer reviewed papers forming chapters in this thesis. . . . . . . . .

13

1.3

Impact of journals in which papers presented in this thesis appear. . . . . .

14

2.1

List of logical nodes (LNs) commonly found in process bus applications. . .

22

B.1

Protection relays installed in the process bus test bed. . . . . . . . . . . . .

160

B.2

PTP grandmaster and slave clocks used in the test bed. . . . . . . . . . . .

160

B.3

Ethernet switches and PTP transparent clocks used in the test bed. . . . . .

160

B.4

Test equipment and network tools incorporated into the test bed. . . . . .

161

B.5

Test bed configuration and analysis software. . . . . . . . . . . . . . . . . .

161

D.1 List of supporting publications. . . . . . . . . . . . . . . . . . . . . . . . . .

167

xiii

List of Abbreviations 1-PPS

One Pulse Per Second

9-2LE

UCA International User Group Implementation Guidelines for IEC 61850-9-2

ASN.1

Abstract Syntax Notation One (ITU-T Rec X.680)

BMCA

Best Master Clock Algorithm

CFE

Correction Factor Error

CSMA/CD Carrier Sense Multiple Access with Collision Detection CT

Current Transformer

DAG

Data Acquisition and Generation

EPRI

Electric Power Research Institute

FPGA

Field Programmable Gate Array

FTA

Fault Tree Analysis

Gb/s

Gigabit per second

GIS

Gas Insulated Switchgear

GOOSE

Generic Object Oriented Substation Event (IEC 61850-8-1)

GPS

Global Positioning System

ICAP

IEEE Conformity Assessment Program

IEC

International Electrotechnical Commission

IEEE

Institute of Electrical and Electronic Engineers

IP

Internet Protocol (RFC 791)

iPASS

Intelligent Plug and Switch System

IRIG-B

Serial Time Code Format B (IRIG Std 200-04)

Mb/s

Megabit per second

MMS

Manufacturing Message Specification (ISO 9506-1)

MSTP

Multiple Spanning Tree Protocol

MTTF

Mean Time To Failure

MU

Merging Unit

NCIT

Non-Convention Instrument Transformer

NEM

National Electricity Market (Australia)

NIC

Network Interface Card

NIST

National Institute for Standards and Technology

xv

xvi

LIST OF ABBREVIATIONS

NTP

Network Time Protocol (RFC 5905)

OCT

Optical Current Transformer

OSI

Open Systems Interconnection (ITU-T Rec X.200)

PMU

Phasor Monitoring Unit

PRP

Parallel Redundancy Protocol (IEC 62439-3)

PSRC

Power Systems Relaying Committee (IEEE Power and Energy Society)

PTP

Precision Time Protocol (IEEE Std 1588)

RBD

Reliability Block Diagram

RSTP

Rapid Spanning Tree Protocol

RTDS

Real Time Digital Simulator

SAMU

Stand Alone Merging Unit

SAS

Substation Automation System

SCSM

Specific Communications Service Mapping

SF6

Sulphur Hexafluoride

SNMP

Simple Network Management Protocol

SV

Sampled Values

TC

Technical Committee

UCA2.0

Utility Communications Architecture Version 2.0

VLAN

Virtual Local Area Network (IEEE Std 802.1Q)

VT

Voltage Transformer

WAMS

Wide Area Monitoring System

WAPS

Wide Area Protection System

WG

Working Group

List of Standards

Standard

Title

IEC 60044-8

Instrument transformers - Part 8: Electronic current transformers

IEC 61850

Communication networks and systems for power utility automation

IEC TR 61850-1

Part 1: Introduction and overview

IEC 61850-3

Part 3: General requirements

IEC 61850-4

Part 4: System and project management

IEC 61850-5

Part 5: Communication requirements for functions and device models

IEC 61850-7-2

Part 7-2: Basic information and communication structure—Abstract communication service interface (ACSI)

IEC 61850-7-4

Part 7-4: Basic communication structure—Compatible logical node classes and data object classes

IEC 61850-7-420

Part 7-420: Basic communication structure—Distributed energy resources logical nodes

IEC 61850-8-1

Part 8-1: Specific communication service mapping (SCSM)—Mappings to MMS (ISO 9506-1 and ISO 9506-2) and to ISO/IEC 8802-3

IEC 61850-9-2

Part 9-2: Specific communication service mapping (SCSM)—Sampled values over ISO/IEC 8802-3

IEC 61850-10

Part 10: Conformance testing

IEC TR 61850-90-4

Part 90-4: Network engineering guidelines

IEC 61869-9

Instrument Transformers—Part 9: Digital interface for instrument transformers

IEC TS 62351-6

Data and communications security—Part 6: Security for IEC 61850

IEC 62439-3

High availability automation networks—Part 3: Parallel Redundancy Protocol (PRP) and High-availability Seamless Redundancy (HSR)

IEC 81346-1

Structuring principles and reference designations—Part 1: Basic rules

IEEE Std 802.1ak

Virtual Bridged Local Area Networks—Amendment 7: Multiple Registration Protocol

IEEE Std 802.1D

Media Access Control (MAC) Bridges xvii

xviii

LIST OF STANDARDS

Standard

Title

IEEE Std 802.1Q

Media Access Control (MAC) Bridges and Virtual Bridge Local Area Networks

IEEE Std 802.3

Local and metropolitan area networks—Part 3: Carrier sense multiple access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications

IEEE Std 802.3ba

Part 3: Carrier sense multiple access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications—Ammendment 4: Media Access Control Parameters, Physical Layers and Management Parameters for 40 Gb/s and 100 Gb/s Operation

IEEE Std 1588

IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems

IEEE Std C37.92

IEEE Standard for Analog Inputs to Protective Relays from Electronic Voltage and Current Transducers

IEEE Std C37.103

IEEE Guide for Differential and Polarizing Relay Circuit Testing

IEEE Std C37.118

IEEE Standard for Synchrophasors for Power Systems

IEEE Std C37.118.1

IEEE Standard for Synchrophasor Measurements for Power Systems

IEEE Std C37.238

IEEE Standard Profile for Use of IEEE 1588 Precision Time Protocol in Power System Applications

ISO 9506-1

Industrial automation systems—Manufacturing Message Specification

ITU-T Rec X.680

Abstract Syntax Notation One (ASN.1): Specification of basic notation

ITU-T Rec X.690

ASN.1 encoding rules: Specification of Basic Encoding Rules (BER), Canonical Encoding Rules (CER) and Distinguished Encoding Rules (DER)

Acknowledgments I would like to thank my supervisors, Professor Duncan Campbell, Adjunct Professor Richard Taylor and Mr Pascal Schaub, for their guidance and support throughout my candidature. Their experience and wisdom kept me on track in the face of many interesting diversions and challenges (including natural disasters) along the way. This project could not have happened without the support of Powerlink Queensland. Their generous provision of laboratory space, test equipment and access to subject matter experts is greatly appreciated. Many thanks go to Shane Williams for facilitating the project within Powerlink, and to Alwyn Janke for providing access to Powerlink’s RTDS. Bruce Capstaff, Katie Hadley and Lyndall Josey from Substation Standards were generous with their advice on power system protection and relay configuration. Anthony Kenwrick and Geoff Dusha from Secondary Systems Field Projects kindly provided assistance at Loganlea substation for field measurements during the final stages of their upgrade project. I would also like to thank Terry Easlea for accommodating my research in the Secondary Systems Test & Development Centre and for providing the ‘nuts and bolts’ that kept everything working. ABB, Belden Solutions (Hirschmann), Cisco Systems, Meinberg Funkhuren and Schneider Electric donated or supplied products on long term loan for research purposes. I am grateful for the opportunity to work with leading edge and prototype equipment, and thank them for their support of university research. Financial support came from the Australian Postgraduate Award, a QUT Deputy ViceChancellor’s Initiative Scholarship, and a Powerlink top-up scholarship. This made it possible to leave full-time employment and study full time. Finally I would like to thank my wife Wendy. Her support throughout this adventure has been essential, and I am grateful that I could call upon her for advice and proof reading of my papers and this thesis. It would not have been possible without her.

David Mark Edward Ingram Queensland University of Technology February 2013

xxi

CHAPTER 1

Introduction This chapter provides an introduction to the field of substation automation and describes the motivation for undertaking this research. Following from this is a statement of the aims, and specific research questions are presented to address these aims and guide the investigation. This is a thesis by publication, where the majority of the manuscript is based upon peerreviewed journal and conference papers. Details of the publications are provided, along a brief summary of how each paper contributes to the narrative as a whole. A more comprehensive introduction to each paper is presented at the start of each chapter. This research sits at the intersection of three fields: power system automation, precision timing and real-time data networks, as shown in Figure 1.1. Substation automation is itself comprised of two disciplines: protection and control. The following definitions of these are taken from the National Electricity Rules (AEMC, 2013): Protection:

Protects electrical equipment from damage due to an electrical or mechanical fault, or due to certain conditions of the power system.

Control:

A means of monitoring and controlling the operation of the power system.

Control can be considered to be the deliberate actions that take place in the power system, while protection responds to exceptional events. The two work together to provide a safe and secure power system.

Power System Automation

Process Bus Protection & Control

Real-Time Data Networking

Precision Timing

Figure 1.1: Overlapping research domains that comprise process bus substation automation.

1

2

CHAPTER 1. INTRODUCTION

1.1

Background

The high voltage power grid, with its interconnected network of transmission lines and substations, is an important part of everyday life, with many other utilities, including telecommunications and water supply, requiring electricity to operate. Increasing demand for electricity and limitations on the building of new power lines have led to increased operating voltages. Australian transmission lines operate up to 500 kV, with power lines operating up to 1125 kV overseas. High operating voltages increase the size of substations and impose greater stress on the instrument transformers used to measure currents and voltages. The cost of copper cabling to connect current transformers (CTs) and voltage transformers (VTs) in switchyards to control rooms is increasing due to the quantity of the cable required and rising commodity prices. Aged oil filled instrument transformers (CTs in particular) are prone to explosive failure, and many substations around Australia are approaching the end of their service lives. Modern CTs are insulated with sulphur hexafluoride (SF6 ) gas rather than oil; however SF6 is the most potent of the known greenhouse gases (Forster et al., 2007). The measurement technology used for protection and control has not fundamentally changed since CTs and VTs were introduced in the early twentieth century (Curtis, 1906; Edgcumbe & Ockenden, 1927). New technology for both the measurement of primary currents and voltage and transfer of these measurements to substation control systems enables significant improvements to the design and operation of substations. Digital distribution of measurement data simplifies the implementation of substation-wide monitoring systems, with many signals multiplexed into a single data connection. The flexibility that networked connections between high voltage switchyards and control rooms provide will facilitate many new substation automation functions that are not feasible with conventional analogue connections.

1.1.1

Transmission substations

Transmission substations are generally considered to be those that have an operating voltage above 100 kV. These are key nodes in the electricity grid, and reliability is of paramount importance. The 50 Hz alternating current transmission voltages in Australia are 110 kV, 132 kV, 220 kV, 275 kV, 330 kV and 500 kV. There are three High Voltage Direct Current links in Australia, and these operate at ±80 kV (Terranora Interconnector, New South Wales/Queensland), ±150 kV (Murraylink, New South Wales/South Australia) and +400 kV (Basslink, Tasmania/Victoria). Figure 1.2 shows the transmission grid in Australia, with the various operating voltages displayed in different colours. The eastern states and South Australia are interconnected and form the National Electricity Market (NEM). The grid around Perth (Western Australia) is known as the South West Interconnected System; however this is not interconnected with the NEM and operates under different rules and market conditions. There are 40 000 km of transmission lines operating at 110 kV and above in the NEM (AEMO, 2012) and a further 7 500 km of lines operating at 132 kV and above in the SWIS (Western Power, 2012). Approximately 19 million customers are supplied by the NEM via

1.1 Background

3

120°

140°

Darwin

Gove

Jabiru

Broome

Carnarvon Hill 50

Geraldton

Perth

Cannington

Ron Goodin

Plutonic

Collinsville Moranbah

Barcaldine

Yulara

Stanwell Roma

Moomba

Worsley

Whyalla

Ravensthorpe Esperance

Port Lincoln Adelaide

Albany

0

1000 km

500 kilovolts

Power station

Gladstone

Brisbane

Hunter Valley Newcastle Sydney

Hallett

Mount Gambier

20°

Tarong

Murrin Murrin Kalgoorlie Kambalda

400 kilovolts

Proserpine Mackay

Callide

Wiluna Mt Keith

330 kilovolts

Mt Stuart

Townsville

Mica Creek

275 kilovolts

Cairns

Kareeya

Mt Newman

Emu Downs Kemerton

220 kilovolts

Barron Gorge

Telfer

Paraburdoo

110 kilovolts

132 kilovolts

McArthur River

Tennant Creek

Port Hedland Karratha

National Energy Grid

Weipa

Pine Creek Katherine Kununurra Argyle Derby

Transmission lines and generators

CANBERRA Tumut Anglesea

Reece

Gordon

Melbourne

Poatina HOBART

40° 10-4831-2

Figure 1.2: Map of transmission lines and power stations in Australia. © Commonwealth of Australia (Geoscience Australia) 2012. This product is released under the Creative Commons Attribution 3.0 Australia Licence.

369 substations operated by Transmission Network Service Providers, and 118 of those are in Queensland. The electricity grid was developed extensively from the late 1960s and into the 1980s. As a result a significant amount of plant is reaching, or has reached, the end of its operational life. The Australian Government’s Energy White Paper 2012 identified the need for network costs to be reduced, and encouraged network operators to increase efficiency by adopting new technology (RET, 2012). Opportunities for innovation exist in high voltage switchyards, such as that shown in Figure 1.3(a), and in Substation Automation Systems (SASs), as shown in Figure 1.3(b). More compact switchgear is available from several manufacturers that combine the functions of previously separate items of plant, and this reduces the foot-print of a substation. An example of this is the Disconnecting Circuit Breaker that achieves space savings of up to 50%, which combines a circuit breaker, isolator, earth switch and optical current transformer. Networking technology such as Ethernet, widely used in other industrial applications, is now being considered for connections between the ‘process level’ in the switchyard and the ‘bay level’ control room. Figure 1.4 shows the hierarchy of the station, bay and process levels in a substation, along with the ‘station bus’ and ‘process bus’ connections between levels.

4

CHAPTER 1. INTRODUCTION

(a) High voltage switchyard at a 132 kV substation.

(b) Substation Automation System for a 110 kV substation.

Figure 1.3: Examples of high voltage primary plant and substation automation systems at the 110 kV and 132 kV level in Australian substations.

1.1.2

Standardisation efforts for smart grid applications

The US Electric Power Research Institute (EPRI) launched the Utility Communications Architecture project in 1986 to develop an architecture for substation communication that would incorporate protection, control, diagnostics and monitoring using object-oriented philosophies adopted from the information technology industry (IEEE PSRC Working Group H6, 2005). The Utility Communications Architecture Version 2.0 (UCA 2.0), produced in 1999 by EPRI and the Institue of Electrical and Electronic Engineers (IEEE), was intended for use by electricity, gas and water utilities (IEEE Standards Association, 1999). Technical Committee 57 (TC57) of the International Electrotechnical Commission (IEC) had been working since 1994 on a proposal to standardise communications in substation automation systems (IEC TC57, 2003a). EPRI and TC57 agreed in October 1997 to merge the European and North American approaches to avoid duplication of standards, and as a result the IEC 61850 series of standards build upon UCA 2.0, and are accepted worldwide (IEEE PSRC Working Group H6, 2005). The first release of IEC 61850 was named “Communication networks and systems in substations”. New standards, and updates of existing standards, in the IEC 61850 family are now named “Communication networks and systems for power utility automation” to reflect the

1.1 Background

5

Gateways to Control Centre

Station Level

Station Bus Ethernet switch or switches

Station Bus

Bay Level

Process Bus Ethernet switch or switches

Control Room

Process Bus

Process Level

Voltage Transformer

Circuit Breaker

Current Transformer

Isolator

Protection Relay

Master Clock

Power Transformer

Figure 1.4: Substation automation terminology, defining the station, bay and process levels.

wider scope of the standards, and their adoption by the wind, hydroelectric and distributed energy industries. Use of IEC 61850 is not limited to traditional transmission system operators, with the oil and gas industry now recognising the benefits of a consistent communication system (Montignies et al., 2011). IEC 61850 introduces a range of ‘performance classes’ and this reflects the wide range of applications for which the standards can be used, and that each application can have different performance requirements. Protection systems are defined by the three classes in IEC 61850-5 that are listed in Table 1.1, and these determine other performance standards such as communication transfer times (IEC TC57, 2003b). The IEC and US National Institute of Standards and Technology (NIST) have both prepared ‘roadmaps’ for the standardisation of smart grids (SMB Smart Grid Strategic Group, 2010; Office of the National Coordinator for Smart Grid Interoperability, 2012). These roadmaps recommend that the IEC 61850 series of standards be used for future transmission smart grid development. While the term ‘smart grid’ is somewhat nebulous, it is generally accepted that the smart transmission grid will use a digital platform for substation automation. Two standards, IEC 61850-8-1 (Generic Object Oriented Substation Event, GOOSE) and IEC 61850-9-2

6

CHAPTER 1. INTRODUCTION

Table 1.1: IEC 61850-5 protection performance classes.

Class

Description

P1

Distribution bays (< 100 kV), or where lower performance levels can be accepted.

P2

Transmission bays (≥ 100 kV), or where otherwise not specified by a customer.

P3

Transmission bays with ‘top performance’ synchronising or differential requirements.

(sampled values), define communications services that map the abstract communications of the IEC 61850 object model to Ethernet, and have been adopted by a wide range of manufacturers. GOOSE and sampled values are used to implement the process bus shown in Figure 1.4. Both mappings are implemented using ‘raw’ (OSI Layer 2) Ethernet frames with multicast (one to many) addressing to achieve fast transmission of their respective messages. Digital data acquisition systems, including those in substations, require a sampling clock. A system-wide time reference is required when digitised signals from multiple sources are compared to one another. Sampling rates and offsets can vary, however alignment and resampling of measurements requires a single time reference to maintain phase accuracy. The IEC and NIST smart grid roadmaps also recommend the use of IEEE Std 1588 Precision Time Protocol (PTP) for highly accurate time synchronisation. IEC 61850 and IEEE Std 1588 both use Ethernet, and therefore efficiencies can be made in the design and construction of substations through the use of a single network for multiple applications. Information technology is used to improve the operational response of utilities, and is a key feature of the smart grid in general.

1.1.3

Safety, environmental and community concerns

Current transformers are relatively low in cost, but the consequence of their failure can be catastrophic (James & Su, 2008). Explosive failures results in dangerous fragments of fractured porcelain insulation travelling a significant distance, which in turn poses a significant threat to nearby people and equipment. The failure of a high voltage CT in New South Wales (Australia) resulted in significant economic and plant loss, with a fireball caused by the failed CT failure tripping three other switchgear bays (AEMO, 2010). This event disconnected 3205 MW of generation and shed 1131 MW of load, and followed three previous CT failures at this substation since 1998. Australian utilities have been very fortunate to date in that no personnel have been in the vicinity of CTs that failed. The only damage has been to plant, including collateral damage to the surrounding equipment. Non-Conventional Instrument Transformers (NCITs), such as capacitive voltage sensors and optical current transformers that are safer and pose less risk to the environment, are now commercially available. These sensors are air-insulated, rather than using the oil or SF6 gas insulation required by conventional CTs (Blake & Rose, 2006; Kucuksari & Karady, 2010; Schaub et al., 2011). Widespread adoption of NCITs has been limited due to the lack of a standardised interface and multi-vendor interoperability. This is changing with increas-

1.1 Background

7

ing numbers of manufacturers using IEC 61850-9-2 sampled values for the digital interface between NCITs and protection relays. NCITs are not immune from manufacturing defects and the additional complexity of light sources and digital signal processing does reduce the inherent reliability of the product. NCIT instrumentation is self-monitoring and alerts operators to conditions that may impact performance. Redundant fibre drivers and secondary converters can be used to provide redundancy for the least reliable components. The explosive failure of a CT will destroy all cores, which in turn impacts the operation of all protection for the associated feeder or transformer. An NCIT failure will affect the connected automation equipment through loss of measurements, but will not result in collateral damage to surrounding plant. The cost of complexity of CT and VT secondary cabling is significantly reduced through the use of GOOSE and sampled values over Ethernet. This process bus technology has been adapted to provide digital connections to conventional magnetic CTs and VTs, and is suitable for refurbishments of established substations. More than 100 copper circuits can be replaced by a single pair of fibre optic cables. An additional benefit of digital secondary cabling is that the hazards of high voltages from open circuit CTs and high voltages from VT secondary circuits are eliminated from substation control rooms (Burger et al., 2009; McGinn et al., 2009a).

1.1.4

Process buses and innovation in substation automation

The benefits achieved with digital process buses extend beyond the immediate cost savings and safety benefits described in the previous section. Sampled value data is readily aggregated and distributed by Ethernet switches. This simplifies the connections required for centralised substation automation functions, including disturbance recording, bus protection, power quality monitoring and synchrophasor observations (Apostolov et al., 2006; Apostolov, 2009a,b). The reduction in the cabling that is installed (in terms of quantity and physical size) and relaxation of cable distances (as voltage drop is not a concern) allows the design of substation control rooms to be rethought (Vandiver & Apostolov, 2006). One such example is centralised substation protection with measurement transducers and a protection computer instead of protection relays. This type of protection architecture has been implemented in distribution substations in the Netherlands, albeit using proprietary protocols rather than IEC 61850 (Baldinger et al., 2008). The same principles could be applied to an IEC 61850 process bus based on GOOSE and sampled values, and may ultimately reduce a substation automation system to a pair (to meet redundancy requirements) of substation automation servers. Substation commissioning has traditionally focussed on device level testing. Primary injection testing is used to verify the performance and connectivity of instrument transformers, and secondary injection testing is used to verify the wiring and operation of protection relays (IEEE Power Engineering Society, 2004). Secondary injection testing requires expensive equipment to precisely generate the voltages and currents inputs to conventional protection relays, which limits the number of signals that can be simultaneously generated (Agudo et al.,

8

CHAPTER 1. INTRODUCTION

2000). Automated testing can be used for factory acceptance tests and site acceptance tests to exhaustively test the functionality of the protection system. The use of Automated Test Equipment is common in aerospace and defence industries (Schroer, 2002), but not in the electricity supply industry. Applying these tools to process bus substation automation will allow extensive regression testing of the whole system to take place when firmware is updated and when devices are repaired or replaced. Modern protection relays incorporate a number of protection elements in one device (e.g. differential fault, earth fault, over-current and under-voltage). Edition 2 of IEC 61850-9-2 expands the use of ‘test bits’, enabling testing of selected elements to take place while the other elements remain in service. This is simply not possible with conventional current and voltage inputs, and is an example of how digital communication within a substation enables novel test methods to be developed.

1.1.5

System level testing

Process bus connections enable system level testing to be performed as the cost of generating test data is much lower. This approach was adopted in the design of the substation automation test bed presented in this thesis. Synthetic sampled value and GOOSE messages were used to assess the performance of precision timing devices, Ethernet switches, and protection relays. This hybrid approach evaluates the performance of substation devices, but at reduced cost through the selective use of information technology to emulate substation devices. Real-time power system simulation with instruments such as the Real Time Digital Simulator (RTDS) is a similar approach that enables “hardware-in-the-loop” testing of power system devices such as protection relays or static var compensator control systems. A variety of power system conditions can be simulated, with the device under test feeding back into the simulation, without any risk to power system security. The RTDS hardware supports direct communication with IEC 61850 compatible devices (sampled values and GOOSE), and this allows all connections in the test bed to be based on Ethernet connections. The use of hardware-in-the-loop for power system simulation, combined with precisely controlled synthetic network traffic and the use of PTP to synchronise sampling is novel for a process bus test bed and provides great flexibility. Testing the entire protection system is a means of validating operation under extreme conditions, and from this the limits of operation can be determined.

1.1.6

Relationship of parties involved in building substation automation systems

The construction or refurbishment of a SAS involves a number of people from many organisations. The terminology to describe these parties used throughout this thesis is illustrated in Figure 1.5. The definition of tests (Factory Acceptance Test, Site Acceptance Test, routine test and type test) can be found in Section 7 of IEC 61850-4, which deals with system and project management (IEC TC57, 2002b).

1.1 Background

9

Vendor A Product Designers

Production Team Type Tests

Product A

Customer's Requirements Specification

Routine Tests

Vendor B Product Designers

Production Team Type Tests

Product B

Factory Acceptance Tests*

Routine Tests

Vendor C Product Designers

Production Team Type Tests

System Integrator

Product C Routine Tests

Construction Contractor & System Integrator Site Acceptance Tests

Utility Operator

* Optional, but recommended

Ongoing Performance Verification Tests

Figure 1.5: Relationships between product vendor, system integrator, constructor and end-user for substation automation systems.

System Integrators specify and engineer the SAS, using equipment from a number of hardware and software vendors to meet the customer’s specifications. Conformance testing is intended to ensure interoperability between vendors, with Factory Acceptance Testing confirming that the system design is sound. Site Acceptance Testing confirms to the customer that the system has been built correctly and meets their specifications. Udren et al. (2007) discusses in detail the importance of conformance testing for IEC 61850 systems. Some utilities act as the system integrator, and some vendors use a turnkey model and provide the equipment and system integration services. Schwarz (2007) describes several different models and the relative merits of each.

1.1.7

Barriers to adoption of new technology

The in-service performance of IEC 61850, especially with shared process buses (GOOSE and sampled values), is largely unknown. High voltage power systems are critical infrastructure, and therefore substation automation systems must be extremely reliable and proven to meet performance requirements before going into service. The traditional approach of electricity utilities is to use tangible point to point connections, and moves to adopt digital technology are often met with resistance. Recent publications of utility trials of process bus automation indicate that there are still concerns regarding the maturity of solutions (Cooney & Lynch, 2012). A number of trials continue around the world to gain operational experience under controlled conditions, including those in Mexico (Bautista Flores et al., 2012) and Australia (Schaub et al., 2011).

10

CHAPTER 1. INTRODUCTION

At present the only ‘production’ substations using process bus for protection and control are in China (Moore & Goraj, 2011) and Australia (Schaub et al., 2012). The majority of these substations use point to point Ethernet connections, rather than switched ‘whole of station’ Ethernet process buses.

1.2

Overall objectives

The intent of this research is to: • Develop tests to assist in the design and validation of timing systems and data networks for substation protection and control. These tests are primarily intended to be used by system integrators, utility maintenance staff and independent researchers. • Provide a greater understanding of how the various components in advanced Ethernetbased substation automation systems interact. • Provide evidence-based information about the behaviour of networked substation automation systems using Ethernet process connections for utilities considering adopting this technology. When utilities have detailed performance information at hand it is expected that this will facilitate the adoption of NCITs and digital process level connections, resulting in a safer work environment and reduce the environment impact of transmission substations.

1.3

Specific aims and research questions

The specific aims of this research are: • To characterise the performance and assess the suitability of network based time synchronisation for sampled value protection in transmission substations. • To understand the behaviour of high volume sample value network traffic and how this traffic is handled by switching devices in a multi-function shared process bus. • To develop specific tests that can be used to determine the suitability of products and systems for advanced substation automation, and to identify the potential points of failure in a shared process bus. • To assess the overall effect of the sampling synchronisation system and real-time Ethernet networks on power system protection performance. Three research questions were developed to guide the research to meet the aims stated above: • How do the devices used in a network-based timing system contribute to error, and how do these devices affect protection performance?

1.4 Research contributions

11

• Do the protocols used to implement a shared process-level network interact with each other, and can the performance requirements specified by grid codes and international standards be met? • Can the components of an advanced digital substation automation system be tested in isolation to predict performance in the completed system?

1.4

Research contributions

Several contributions have been made to the field of substations automation through publication of journal and conference papers, and oral presentations at conferences. The following sections summarise the contributions that arose from this research in three general areas.

1.4.1

Test methods for Ethernet process bus networks

The test cases and procedures that were developed to assess the performance of protocols and to gain an understanding of their operation have been described in detail in the published papers that form the body of this thesis. This enables other researchers to adapt and extend the methods to other situations, and provides tools for system integrators and designers to test conformance of automation systems. The equipment required for testing is not tied to any one vendor of automation equipment, which is important for testing multi-vendor automation systems.

1.4.2

Behaviour observations of process bus network traffic

The ‘scale model’ SAS contained in the test bed allowed the performance of PTP equipment to be observed under substation-like conditions. The lack of interaction between PTP and sampled values, and between sampled values and GOOSE, are notable findings. These experiments found that multifunction process buses, where a range of protocols share the same network, can operate at very high loads and provide acceptable performance.

1.4.3

Design guidelines for shared process bus systems

A design tools has been presented that will assist system integrators with the design of network addressing scheme, which is essential for multicast (one to many transmission) protocols such as GOOSE and sampled values. A reliability assessment method for PTP based timing systems is proposed that is based on Fault Tree Analysis. This allows the design of timing systems to be optimised, ensuring that reliability requirements are met without over-engineering.

1.5

Account of research progress

This is a Thesis by Publication, and the body of the thesis is comprised of peer-reviewed journal and conference papers. Each paper listed in Table 1.2 is either published, presented,

12

CHAPTER 1. INTRODUCTION

accepted or submitted for review. The standings of each publication, given by Impact Factor (Thompson Reuters Journal Citation Reports) and SCImago Journal Ranking (SJR) (SCImago, 2012) are listed in Table 1.3. The peer reviewed conference papers (Chapters 3, 4 and 11) were presented at major international IEEE conferences. Further publications resulting from this research but not forming chapters in this thesis are listed in Appendix A and Appendix D.

1.5.1

Chapter linkage

Chapters 3–12 form a cohesive narrative. A summary of each chapter is presented below, and the structure is shown diagrammatically in Figure 1.6. Chapters 4–7 focus on time synchronisation, and Chapters 8–11 focus on real-time network performance. Chapter 3 and Chapter 12 consider the overall system. Chapter 3 – Test and evaluation system for multi-protocol sampled value protection schemes This chapter describes a test and evaluation system that uses substation protection and timing equipment and real-time simulation with an RTDS. The benefits of a process bus are quantified with a comparison of conventional and digital process connections, and the results from test equipment validation experiments are presented. Chapter 4 – Evaluation of precision time synchronisation methods for substation applications The performance of established substation time synchronisation methods with a range of cable lengths that are representative of transmission substations are benchmarked in this chapter. The performance of PTP using the cable lengths was evaluated and compared to the existing methods to determine if the performance and features of PTP justify the additional complexity. Chapter 5 – Use of precision time protocol to synchronise sampled value process buses The performance of PTP was assessed to find the optimum operating parameters by varying the PTP message rates. This steady state testing was followed with transient testing, where the response of PTP clocks to outages of GPS receivers, master clocks and networks was assessed.

1.5 Account of research progress

13

Table 1.2: List of peer reviewed papers forming chapters in this thesis.

Chapter

Details of papers included in this thesis

3

D. M. E. Ingram, D. A. Campbell, P. Schaub & G. Ledwich (2011). “Test and evaluation system for multi-protocol sampled value protection schemes”. In Proceedings 2011 IEEE Trondheim PowerTech, pp. 1–7, Trondheim, Norway, doi:10.1109/PTC.2011.6019243.

4

D. M. E. Ingram, P. Schaub, D. A. Campbell & R. R. Taylor (2012). “Evaluation of precision time synchronisation methods for substation applications”. In 2012 International IEEE Symposium on Precision Clock Synchronization for Measurement, Control and Communication (ISPCS), pp. 37–42, San Francisco, USA, doi:10.1109/ISPCS.2012.6336630.

5

D. M. E. Ingram, P. Schaub & D. A. Campbell (2012). “Use of precision time protocol to synchronise sampled value process buses”. IEEE Transactions on Instrumentation and Measurement, vol. 61, no. 5, pp. 1173–1180, doi:10.1109/TIM.2011.2178676.

6

D. M. E. Ingram, P. Schaub, D. A. Campbell & R. R. Taylor (2013). “Performance analysis of PTP components for IEC 61850 process bus applications”. IEEE Transactions on Instrumentation and Measurement. vol. 62, no. 4, pp. 710–719, doi: 10.1109/TIM.2013.2245188.

7

D. M. E. Ingram, P. Schaub, D. A. Campbell & R. R. Taylor (2013). “Quantitative assessment of fault tolerant precision timing for electricity substations”. Submitted to IEEE Transactions on Instrumentation and Measurement. Accepted (in-press), doi: 10.1109/TIM.2013.2263673.

8

D. M. E. Ingram, F. Steinhauser, C. Marinescu, R. R. Taylor, P. Schaub & D. A. Campbell (2012). “Direct evaluation of IEC 61850-9-2 process bus network performance”. IEEE Transactions on Smart Grid, vol. 3, no. 4, pp. 1853–1854, doi:10.1109/TSG.2012.2205637.

9

D. M. E. Ingram, P. Schaub, R. R. Taylor & D. A. Campbell (2013). “Performance analysis of IEC 61850 sampled value process bus networks”. IEEE Transactions on Industrial Informatics, vol. 9, no. 3, doi: 10.1109/TII.2012.2228874.

10

D. M. E. Ingram, P. Schaub, R. R. Taylor & D. A. Campbell (2013). “Network interactions and performance of a multi-function IEC 61850 process bus”. IEEE Transactions on Industrial Electronics, vol. 60, no. 12, doi: 10.1109/TIE.2012.2233701.

11

D. M. E. Ingram, P. Schaub & D. A. Campbell (2011). “Multicast traffic filtering for sampled value process bus networks”. In Proceedings of the 37th Annual Conference of the IEEE Industrial Electronics Society, pp. 4710–4715, Melbourne, Australia, doi:10.1109/IECON.2011.6120087.

12

D. M. E. Ingram, P. Schaub, R. R. Taylor. & D. A. Campbell (2013). “System level tests of transformer differential protection using an IEC 61850 process bus”. Submitted to IEEE Transactions on Power Delivery.

14

CHAPTER 1. INTRODUCTION

Table 1.3: Impact of journals in which papers presented in this thesis appear.

2011 Impact Factor

Publication

2011 SJR

IEEE Transactions on Industrial Electronics

5.16

3.12

IEEE Transactions on Industrial Informatics

2.99

1.08

IEEE Transactions on Instrumentation & Measurement

1.21

0.75

IEEE Transactions on Smart Grid

n/a

1.43

Figure 1.6: Chapter map showing logical flow of this thesis.

1.5 Account of research progress

15

Chapter 6 – Performance analysis of PTP components for IEC 61850 process bus applications Additional PTP devices were added to the test bed, and this allowed for ‘matrix’ testing of each grandmaster against each slave clock. A detailed examination of how individual PTP devices influenced the performance of the timing system was undertaken and the results are presented in this chapter. A test method is presented that used a precision Ethernet capture card to assess the transparent clock performance of PTP Ethernet switches. Testing with high rate sampled values confirmed that provided the correct hardware is selected, PTP and sampled values can share a process bus. Chapter 7 – Quantitative assessment of fault tolerant precision timing for electricity substations This chapter outlines development of a reliability model for timing systems that uses Fault Tree Analysis (FTA) to generate a quantitative estimate of timing system reliability. Reliability estimates of commercially available PTP hardware were collected and used with the model to estimate the overall reliability of standard timing topologies. Two new timing topologies, using grandmaster clocks with dual PTP Ethernet ports, are presented and the FTA assessment was applied to show the improvement in availability this provides. Chapter 8 – Direct evaluation of IEC 61850-9-2 process bus network performance This chapter describes a technique that uses a precision Ethernet card to assess the performance of sampled value publishing devices, which takes advantage of the IEC 61850-9-2 specification. The technique is demonstrated using the RTDS GTNET sampled value interface cards. Chapter 9 – Performance analysis of IEC 61850 sampled value process bus networks Measurements taken from a process bus substation were used to develop an understanding of the network characteristics of ‘whole of substation’ process buses. The concept of ‘coherent transmission’ is presented, and the impact of this on Ethernet switches was examined. Observations from a process bus substation were used to investigate in detail the behaviour of Ethernet switches with sampled value traffic. Test procedures that assess the adequacy of an Ethernet network are proposed, and examples of the application and interpretation of these tests are provided. Chapter 10 – Network interactions and performance of a multi-function IEC 61850 process bus This chapter classifies and defines performance requirements for several protocols used in a process bus (PTP, GOOSE, sampled values and network management tools) on the basis of application. A method, based on the Multiple Spanning Tree Protocol (MSTP) and virtual local area networks (VLANs), is presented that separates management and monitoring traffic from

16

CHAPTER 1. INTRODUCTION

the rest of the process bus without requiring additional Ethernet switches. A quantitative investigation of the interaction between various protocols used in a process bus is described. It establishes that high volume sampled value data and time-critical circuit breaker tripping commands do not interact on a full duplex switched Ethernet network, even under very high network load conditions. Chapter 11 – Multicast traffic filtering for sampled value process bus networks A system of network traffic segregation using a combination of VLAN and multicast address filtering using managed Ethernet switches is presented in this chapter. This includes VLAN prioritisation of various traffic classes, including IEC 61850 and PTP. Multicast filtering is used to limit the delivery of sampled value and GOOSE traffic to defined groups of subscribers. A method to map substation plant reference designations to multicast destination address ranges is proposed. This physical to logical mapping enables engineers to determine the type of traffic and location of the source by inspecting the destination address of multicast frames. Chapter 12 – System level tests of transformer differential protection using an IEC 61850 process bus This chapter adopts an experimental approach for the assessment of protection performance, rather than relying on simulation models. The sources of variation in transformer differential protection response were determined experimentally. Performance with process bus connections was benchmarked against conventional hard-wired CT inputs and relay contact outputs for transformer differential protection. The influence of background network traffic and synchronizing error on differential protection was assessed, and detailed test methods are presented. Network impairment tests show that network latency has a direct effect on protection performance.

1.6

Thesis outline

A concise review of existing peer-reviewed literature and industry information in the fields of substation automation, precision timing for industrial applications, real-time networks and digital substation protection is presented in Chapter 2. Chapters 3–12 form the body of the thesis and are comprised of the papers listed in Table 1.2. The thesis concludes with Chapter 13. Chapter 5 is an extension of a conference paper presented at the 2011 IEEE International Instrumentation and Measurement Technology Conference, and a copy of this conference paper is included as Appendix A. Appendix B contains detailed technical information on the final test bed, including photographs, network diagrams and a list of the equipment used. Appendix C contains personal references from the chairs of two standards working groups stating the author’s contributions to IEC and IEEE standards development. Appendix D lists other publications, not forming part of this thesis, that were co-authored in the course of this research.

1.6 Thesis outline

17

Details of citations in this chapter and the background and past research in the following chapter are provided in the reference list at the end of this thesis. References for the other chapters are contained within the journal or conference paper, and are in the style of the original publication.

CHAPTER 2

Background and past research This chapter provides a summary of historic and current research in the fields that relate to this thesis, along with details of trials by utilities, product information and grid code requirements. As a result, the source material includes industry magazines, manufacturers’ product specifications, international standards and regulatory documents in addition to traditional peer-reviewed sources. Sections 2.1 and 2.2 provide background information, with a review of substation automation in general and specific examination of the IEC 61850 object model as it relates to process bus automation. Sections 2.3–2.5 review sampled value protection, time synchronisation and real-time networking research activity. This chapter concludes with a summary of important aspects, identification of gaps in the body of knowledge, and discussion of how the research presented in this thesis addresses these gaps.

2.1

Substation automation

This section provides a brief history of substation automation, with an emphasis on power system protection. Substation automation has evolved significantly and this provides the context for the development of the IEC 61850 family of standards.

2.1.1

Protective relaying

Protection relays have been used for more than 100 years to protect electrical equipment from damage when faults occur. The technology used for relaying evolved significantly throughout the twentieth century. The first electromechanical relays protected against over-current and reverse-current in generators (Torchio, 1903), but before long were providing distance protection and differential protection (Hester et al., 1922). Electronic relays, using vacuum tube technology, were first proposed by Fitzgerald (1928) to simplify long distance differential protection. This scheme was not adopted due to the cost and unreliability of the valves available at the time, but others implemented electronic versions of the common electromechanical relays. Adamson & Wedepohl (1956) were one of the first to propose the use of ‘solid state’ technology in a protection relay, with distance protection implemented with junction transistors. The most recent stage in the evolution of protection relay technology is the ‘numerical relay’, where protection functions are implemented with a microprocessor. Early numerical protection relays implemented over-current protection (Schweitzer & Aliaga, 1980),

19

20

CHAPTER 2. BACKGROUND AND PAST RESEARCH

current differential and distance protection (Akimoto et al., 1981) and transformer differential protection (Thorp & Phadke, 1982). Microprocessor based protection relays now support digital communications, and integrate the functions of what were separate devices into a single device. As a result protection relays are sometimes referred to as ‘intelligent electronic devices’, however ‘protection relay’ is the terminology used in this thesis.

2.1.2

Non-Conventional Instrument Transformers

The term ‘Non-Conventional Instrument Transformer’, or NCIT, is used to describe any measurement transformer that does not use magnetic induction and iron cores. NCITs have been adopted in power systems due to their compact size, wide frequency response and excellent linearity (Kirchesch, 2002). Applications range from low voltage to extra high voltage and include standalone and integrated sensors (Kojovic et al., 2010). The two most common types of current measurement NCIT are the ‘Rogowski Coil’ aircored transformer (Rogowski & Steinhaus, 1912) and the optical current transformer (OCT) first described by Saito (1966). An OCT using a Sagnac interferometer that overcame the need for exceptionally stable optical components and that was insensitivity to vibration was presented by Blake et al. (1996). The use of NCITs for voltage measurement is less common; however optical and electronic transducers are available. The Pockels electro-optic effect can be used to measure voltage with a birefringent crystal (Cruden et al., 1995), and can be combined with OCTs into a single device (Luo et al., 1999; Sanders et al., 2002). Capacitive voltage dividers are widely used in gas insulated switchgear (GIS), often in combination with a Rogowski coil (Hossenlopp et al., 2008). NCITs offer two significant benefits over conventional inductive transformers: 1. Instrument transformers can be either integrated into switchgear or supported by switchgear (Kristofersson et al., 1997). This significantly reduces the footprint of high voltage substations. 2. OCTs and some Rogowski coils are air-insulated instead of using oil or sulphur hexafluoride (SF6 ) gas for high voltage insulation. Many utilities avoid using SF6 where possible, as it is a very potent greenhouse gas, having a 100 year warming potential 22 800 times that of carbon dioxide (Forster et al., 2007). The low power output signal from NCITs has been an impediment to their adoption for substation automation (Blake & Rose, 2006). Despite international standards for analogue lowpower connections (IEEE Power Engineering Society, 2005) and digital serial connections (IEC TC38, 2002) being in place for more than a decade, most manufacturers have not incorporated these interfaces into protection relays.

2.1.3

Digital switchyard connections

Digital and low power connections between instrument transformers and control rooms have existed for a number of years. The simplest such connection is the transmission of low voltage

2.1 Substation automation

21

representations of current and voltage signals, such as IEEE Std C37.92 with 0.2 V for nominal current and 4 V for nominal voltage, rather than conventional 1 A and 110 V respectively (IEEE Power Engineering Society, 2005). Proprietary digital systems use serial data transmission over fibre optic links (Schett et al., 1996); however this restricts the customer in the choice of protection relays that can be used. One such system is the ABB Intelligent Plug and Switch System (iPASS) hybrid GIS used by Powerlink Queensland (Martin, 2001). The fibre optic connection conveys all measurements from the switchgear module (which incorporates Rogowski coils, capacitive voltage sensors, a circuit breaker, isolators and an earth switch) to the protection relay, and all commands from the protection relay to the switchgear. The first international standard for digital NCIT connections was IEC 60044-8 (IEC TC38, 2002), and was used experimentally by RTE (Réseau de Transport d’Électricité, the French national transmission system operator) and Alstom at the ‘Vielmoulin’ 400 kV substation (Chatrefou, 2010). IEC 60044-8 is a 2.5 Mb/s serial protocol, and this limits the distribution of data when fibre optic cables are used. The IEC 60044-8 digital dataset of four voltages and four currents and its time synchronisation requirements have been adopted by more recent standards. Digital process connections are of interest to utilities for a number of reasons, and can be used by ‘merging units’ for conventional instrument transformers as well as for NCITs. The amount of cabling required in a substation is significantly reduced, as many signals can be multiplexed onto a fibre optic cable (Burger et al., 2009; McGinn et al., 2009a). Digital data connections are self-monitoring, and depending on the protocol selected, may support redundancy (Tibbals & Dolezilek, 2011). A widely accepted standards-based digital interface facilitates the adoption of NCITs, as utilities now have interoperability between vendors. The implementation of a process bus will vary depending on whether a substation is a ‘greenfield’ site (establishing a new substation) or a ‘brownfield’ site (extension or refurbishment of an existing substation). NCITs are favoured for greenfield sites and primary plant refurbishments, while stand-alone merging units that interface to existing current transformers (CTs) and voltage transformers (VTs) are preferred for secondary system refurbishments (Henrion et al., 2012). IEC 61850 standards provide a great deal of flexibility, and while this works towards futureproofing the standard, it poses its own challenges when manufacturers choose different options and interoperability cannot be achieved. This was the case with IEC 61850-9-2, and it was identified that a limited set of options with reduced functionality was required (Tholomier & Chatrefou, 2008). The dataset from IEC 60044-8 was adapted to IEC 61850-9-2, sampling rates were limited to two possibilities (80 and 256 samples per power cycle), and time synchronisation requirements were defined in a guideline that is commonly referred to as ‘9-2 Light Edition’ or ‘9-2LE’ (UCAIug, 2004). 9-2LE was only ever intended to be a stepping stone, and limitations are now apparent (Skendzic & Steinhauser, 2012). IEC Technical Committee 38 is writing a new standard, IEC 61869-9 “Instrument Transformers – Part 9: Digital interface for instrument transformers”, to address these limitations and formalise the 9-2LE industry-based guideline.

22

CHAPTER 2. BACKGROUND AND PAST RESEARCH

All of the sampled value process bus equipment described in this thesis used the 9-2LE guideline for sampled value communication.

2.2

The IEC 61850 object model

The IEC 61850 series of standards are based on an object-oriented data model used to represent an automation system (Brand, 2004; Kostic et al., 2005; Ozansoy et al., 2009). Functional decomposition introduces the concept of the ‘logical node’, the smallest reusable part of a function that exchanges data. Logical nodes are defined in detail in IEC 61850-7-4 (IEC TC57, 2010), and functions are built on from these. Distributed automation functions require communications links when interconnected logical nodes are implemented in physically separate devices. These communication links are abstracted, and this decouples the object model from limitations of current communications technologies. IEC 61850 is much more than a protocol—it is a systems engineering approach to the design of substation automation systems (Preiss & Wegmann, 2003; Janssen & Apostolov, 2008). Logical nodes covering a wide range of functions are defined in IEC 61850-7-4, with the second edition of the standard recently introducing many more. Other standards have been released that define logical nodes for particular functions, for example IEC 61850-7-420 for distributed energy resources (Ustun et al., 2012). Logical nodes in the ‘S’ (supervision and monitoring), ‘T’ (instrument transformers and sensors), ‘X’ (switchgear) and ‘Y’ (power transformer) ranges deal with devices, while ‘C’ (control) and ‘P’ (protection) logical nodes generate actions for switchyard devices. The logical nodes that are particularly relevant to process bus applications are listed in Table 2.1. Table 2.1: List of logical nodes (LNs) commonly found in process bus applications.

LN

Description

PDIS

Distance protection

PDIF

Differential protection

PTOC

Time over-current protection

PTRC

Protection trip conditioning (used to combine multiple protection functions to trip a single circuit breaker)

TCTR

Current transformer

TVTR

Voltage transformer

XCBR

Circuit breaker, capable of interrupting fault current

XSWI

Circuit switch (e.g. disconnector or earth switch)

Figure 2.1 is an annotated photograph of an indoor 110 kV GIS feeder bay showing the location of the physical plant that the respective logical nodes represent. This particular switchgear has its single line diagram drawn on the bus work. Each phase of the four current transformer cores is represented by a separate TCTR logical node (giving a total of twelve

2.2 The IEC 61850 object model

23

TCTRs) and is an example of instantiating multiple objects.

XCBR TCTR

XSWI XSWI

Figure 2.1: 110 kV gas insulated indoor substation bay, showing switches (XSWI), current transformers (TCTR) and circuit breaker (XCBR).

‘Interfaces’ are defined in IEC 61850-1 to link the process, bay and station levels of a substation, which were defined in Figure 1.4 (IEC TC57, 2003a). Information modelling defines the services, data objects, attributes that enable information to be readily exchanged. Interface IF4 is defined to be “CT and VT data exchange between process and bay levels” and interface IF5 defines control data exchange between the process and bay levels. IF4 and IF5 together are be considered to be the process bus. Substation automation devices that are compliant with IEC 61850 are interoperable, but not necessarily inter-changeable through the use of common logical nodes and interfaces (Apostolov, 2009a). The Abstract Communication Service Interface defined in IEC 61850-7-2 is independent of the underlying physical communications system and describes a means of client-server (connection based) and publisher-subscriber (connectionless) communication (Ozansoy et al., 2007). Specific Communication Service Mappings (SCSMs) provide a concrete means of exchanging data in the physical world, and IEC 61850-8-1 Generic Object Oriented Substation Event (GOOSE) and IEC 61850-9-2 sampled values are examples of these. The IEC elected to use existing international standards where possible when developing the IEC 61850 family, and this includes the use of Ethernet as the communication medium for GOOSE and sampled values (IEC TC57, 2003a). Figure 2.2 shows a simplified connection of logical nodes and interfaces for transformer differential protection. Four different types of logical nodes are used to implement the protection system, with six instances of the TCTR current transformer node in use (three on the high voltage CT and three on the low voltage CT). The IF4 and IF5 interfaces carry information

24

CHAPTER 2. BACKGROUND AND PAST RESEARCH

between logical nodes that are in different physical devices. Communication between logical nodes in the same physical device, such as PTRC and PDIF in this example, does not require an SCSM to be used.

IF5

XCBR

SampledOvalues GOOSE

CB Tripping

TCTR CurrentOTransformer

CircuitOBreakerOwith integratedOcommunications

TCTR

IF4

PTRC

HV Current

MergingOUnit

TCTR

PDIF

DifferentialOProtection

PTRC ProtectionOTripOConditioning XCBR CircuitOBreaker

PDIF IF4 LV Current

Transformer ProtectionORelay

MergingOUnit

IF5 Transformer Tap Position

Figure 2.2: The IEC 61850 logical nodes and interfaces required for transformer differential protection.

2.3

Power system protection using process bus connections

The performance of IEC 61850-9-2 sampled value protection schemes has been evaluated by a number of researchers, using event based simulation with tools such as OPNET and OMNeT++ (Thomas & Ali, 2010; Kanabar & Sidhu, 2011; Ferrari et al., 2012b), real-time simulation (Kuffel et al., 2010; Sun et al., 2012), replay of off-line power system simulations (Kanabar et al., 2011) and protection secondary injection test sets (Crossley et al., 2011). Transmission line distance protection (Kanabar et al., 2011; Sun et al., 2012) and current differential feeder protection (Crossley et al., 2011) schemes have been used as protection test cases. The performance of GOOSE messages for circuit breaker trip commands has been studied, and found to be faster than traditional relay contacts for circuit breaker tripping (Mo et al., 2010; Sidhu et al., 2011; Steinhauser, 2011). The capability of a process bus to be used for control as well as protection has recently been explored, with GOOSE proposed for transformer tap changer control and monitoring (Parikh et al., 2012). This is a relatively slow-speed application, limited by the mechanical movement of the tap changer itself, but requires a number of connections between the tap changer and controller for raise/lower commands and position reporting. These could be encoded as GOOSE messages, rather than using many cores in a multi-core copper cable. The use of a process bus for multiple functions, including sampled values for instrument transformer messaging and GOOSE for trip indication, is now attracting research interest (Li et al., 2011; Blair et al., 2013; Crossley et al., 2012; Sun et al., 2012; Yang et al., 2012).

2.3 Power system protection using process bus connections

2.3.1

25

Process bus network reliability and topologies

The architecture and topology of process bus networks is an area of active research, with the reliability of these networks a particular focus. Sampled value process bus Ethernet topologies can be classified as either point to point links or switched networks. The point to point topology replicates the layout of analogue CT and VT secondary cabling, albeit with a fibre optic network, and is the approach taken by the General Electric ‘HardFiber’ system (Kasztenny et al., 2008; GE Multilin, 2009). Network capacity is not a concern in a point to point process bus as each link is limited to two devices. Some process bus devices, capable of being used in a switched network, are used in point to point configurations to address specific needs. One such example is Powerlink Queensland’s Loganlea substation, where multiple point to point links are used to avoid the need for centralised time synchronisation (Schaub et al., 2012). Switched networks have been implemented in Chinese substations with operating voltages of 110 kV, 220 kV, 500 kV and 750 kV (Moore et al., 2010; Song et al., 2010; Fan, 2012). A switched ‘whole of station’ process bus enables monitoring and protection functions to be implemented by distributing raw current and voltage data, rather than processed measurements. Applications include distributed disturbance monitoring, power quality monitoring and distributed bus protection using current samples rather than phasors (Apostolov et al., 2006; Apostolov, 2009a,c). Reliability is a major concern for protection applications. One of the first quantitative assessments of process bus reliability was performed by Tournier & Werner (2010). This work compared tree and ring topologies and introduced the Parallel Redundancy Protocol (PRP) and High-availability Seamless Rings for process bus applications. The best performing network topology was a dual star network implemented with PRP, where merging unit and protection relays were connected via two independent networks. The calculated Mean Time To Failure (MTTF) was 7.0 years, a significant improvement over the MTTF of 1.9 years for the single star network. More complicated designs using ring topologies were not as reliable as the PRP dual-connected star. The disadvantage of PRP is the higher capital cost for the additional Ethernet switches and network cabling. Reliability Block Diagrams (RBDs) are the most commonly used tool for reliability modelling (Kanabar & Sidhu, 2009); however Fault Tree Analysis (FTA) has also been used to model network availability in substations (Scheer & Dolezilek, 2000). The fundamental difference between RBD and FTA is that RBD models the ‘success space’ (what is required for the system to operate correctly), while FTA models the ‘failure space’ (the event sequence required for the system to fail). Boolean logic reduction can be used with FTA to identify the minimum fault conditions that result in failure (the ‘cut sets’), and is a useful tool for identifying weaknesses in a design (Vesely et al., 1981; Ericson, 2005). More detailed reliability models that incorporate failure dependency, based on Markov chains, were produced by Kanabar (2011).

26

CHAPTER 2. BACKGROUND AND PAST RESEARCH

2.3.2

Impact of sampled values on protection algorithms

Digital process connections between instrument transformers and protection relays, particular those based on 9-2LE, behave differently to traditional CT and VT analogue inputs. Firstly, the sampling rate is fixed at 80 samples per cycle, regardless of the protection relay that is used. Secondly, the sampling rate is fixed in relation to the nominal power system frequency (50 Hz or 60 Hz), rather than adapting to the actual mains frequency. Commercially available protection relays have implemented 9-2LE sampled value into existing products, but condition the incoming data to reuse their existing protection algorithms (ABB, 2012; Alstom Grid, 2012). This conditioning often involves re-sampling the fixed rate data to a lower rate with frequency tracking, such as 48 samples per cycle (Hossenlopp et al., 2008). Detailed information about the algorithms used in protection relays is not available, however researchers have investigated the performance of various over-current, distance and differential algorithms for process bus applications (Demeter et al., 2007). Further research examined techniques that accommodate the loss of sampled value data for distance protection (Kanabar, 2011). This work is notable as it included experimental validation of the technique using a protection relay implemented using the QNX real-time operating system. Virtual merging units have been created by linking power system simulation in Matlab/Simulink to sampled value publishing software (Zhao, 2012). This is a ‘one way’ approach in that the protection relay under test is not able to influence the simulation; however it is an effective means of assessing the protective relaying functions in detail. Delay compensation, where relays wait for a fixed time for data to arrive, is used by some protection relays to ‘time align’ incoming sampled value messages from multiple merging units, while other relays wait until the required data arrives. If the maximum allowable transfer time (3 ms for class P2 or P3 protection, as described in Section 1.1.2) elapses then an error condition can be raised and protection functions are inhibited. This time alignment means that the current or voltage samples from the same point in time are compared, even if the messages arrive some time apart at the protection relay. This eliminates phase error that would arise if protection relays considered the message arrival time to be the instant of sampling. The results presented in Chapter 12 demonstrate that sampled value message latencies of up to 10 ms do not result in maloperation of protection due to phase error, but do delay the overall response. Conversely, errors in the synchronising signal used by a merging unit will result in phase errors, even if the messages arrive simultaneously at the protection relay.

2.3.3

Testing of process bus protection systems

The testing and commissioning of process bus networks requires a different skill-set to traditional substation automation commissioning. Commissioning teams need to have training in data networks as well as the traditional skills held by electricians. Transmission utilities around the world are working on policies, procedures and plans for automation systems of the future (Barron & Holliday, 2010; Haude, 2010; Schaub et al., 2011). The second editions of IEC 61850-8-1 and IEC 61850-9-2 include specific test features,

2.3 Power system protection using process bus connections

27

however commercially available products do not yet support features such as ‘test mode’ in a consistent manner (Brunner, 2010; Schossig, 2012). It is for this reason that test mode was not used in the process bus test bed described in this thesis.

2.3.4

Implementation of process bus protection systems

AREVA T&D1 , Siemens and Landis+Gyr have worked on several multi-vendor sampled value process bus trials (Chatrefou et al., 2006). These trials have been in France with RTE (‘Saumade’ 245 kV, Rogowski coils and capacitive voltage sensors), Canada with Hydro-Québec (‘La Prairie’ 315 kV, optical CT and conventional VT) and the UK with National Grid (‘Osbaldwick’ 400 kV gas insulated transmission line, Rogowski coils and capacitive voltage sensors) (Hossenlopp et al., 2008). The ‘Saumade’ trial found that protection only worked when the relay and merging unit were from the same manufacturer (AREVA T&D), as the Siemens protection did not successfully operate with the AREVA merging unit (Duplan, 2007). Recent tests in Mexico at the CFE (Comisión Federal de Electricidad, the Federal Electricity Commission) ‘Manuel Moreno Torres’ substation assessed the interoperability of two optical CTs and four protection relays using an IEC 61850-9-2 network (Bautista Flores et al., 2012). These tests showed that the process bus performed correctly, including during a 400 kV feeder fault. A partial installation of the General Electric HardFiber system has taken place at the AEP (American Electric Power, Columbus, Ohio, USA) ‘Corridor’ substation (Burger et al., 2009). This installation provides distance protection for two 345 kV transmission lines and breaker fail protection for the bus coupler breaker (the two feeder breakers and the coupler breaker form a breaker-and-a-half diameter), but the circuit breaker trip and close features of the HardFiber brick were not used (McGinn et al., 2009b). NCIT trials have been undertaken in Queensland, using optical CTs and Rogowski coils (Schaub et al., 2011). The iPASS switchgear, installed more than ten years ago, is being refurbished and the proprietary process bus is being replaced with a 9-2LE Ethernet process bus (Schaub & Kenwrick, 2009), and the first substation at ‘Loganlea’ (275 kV) is now complete (Schaub et al., 2012). This may enable protection relays from other manufacturers to be used in the future. China is the only other country with substations using sampled value process buses on a production basis (Moore & Goraj, 2011), with most of the installed equipment being produced domestically (Chen et al., 2011; Fan et al., 2011). The ‘Dalv’ 110/10 kV substation was the first to use the Precision Time Protocol to synchronise sampling on a 9-2LE sampled value process bus (Fan, 2012).

2.3.5

Real-time simulation of process buses protection

Secondary injection testing, where a test set simulates the output of CTs and VTs, is an established method of confirming that the correct settings have been loaded into a protection relay. System level testing takes this a step further and validates the protection design. This can either be done through the replay of waveforms generated by simulation software (Kanabar 1

AREVA T&D was acquired by an Alstom Grid/Schneider Electric consortium on 7 June 2010. Alstom Grid acquired the transmission business and Schneider Electric acquired the distribution business.

28

CHAPTER 2. BACKGROUND AND PAST RESEARCH

& Sidhu, 2011), or with real time simulation with computer hardware capable of executing a simulation faster than the minimum time step. The Real Time Digital Simulator (RTDS) achieves this with parallel processing and custom hardware (McLaren et al., 1992), while the Opal-RT simulator uses a combination of a PC-based simulation and custom hardware (Baracos et al., 2001). Westermann & Kratz (2010) presented a substation automation test bed based that used an RTDS to evaluation power system control functions. A similar approach was adopted for this process bus protection test bed. A dedicated interface card for IEC 61850 applications was developed by RTDS Inc. for their simulator. The ‘GTNET’ card publishes sampled value and GOOSE messages, and subscribes to GOOSE messages (Desjardine et al., 2007). By communicating with a protection relay over Ethernet, many of the difficulties faced with amplifiers for power hardware-in-the-loop simulations are avoided (Ren et al., 2011). A complete protection testing system can be built using the RTDS to simulate the power system, and to simulate a control system and operator’s interface. The only connections between the protection relay and the RTDS are via Ethernet, which eliminates hazardous voltages from the test environment (Kuffel et al., 2010). Automated protection testing is well suited to the RTDS. Batch mode testing is performed using a C-like language in the run-time environment (Kuffel et al., 1998). The script file is able to adjust ‘sliders’ (analogue adjustments), activate push-buttons, toggle switches and read meters. Repetitive testing allows a large number of faults to be simulated, which improves the statistical significance of results. The method for conformance testing substation automation devices specified in IEC 61850-10 requires 1000 tests to be performed. Test reports are required to state the resulting mean and standard deviation (IEC TC57, 2005). Batch testing with the RTDS is a straightforward means of conducting these tests in a controlled and repeatable manner.

2.4

Precision timing for substations applications

Time synchronisation is required in substations for consistent event time-stamping when investigating power system incidents and for some Wide Area Protection Schemes (WAPS) (Apostolov, 2004; Dickerson, 2007). More accurate time-stamping, in the order of 1 μs, is now required for phasor monitoring and for sampled value process buses (Brunner & Antonova, 2011). PTP, defined in IEEE Std 1588, is one means of achieving the high level of performance required by these new applications with an Ethernet network (Jasperneite et al., 2004; Lixia et al., 2009). The primary source of time in a PTP system is the ‘grandmaster’ clock that usually includes a GPS receiver, providing a common time reference between PTP systems. The end-users are ‘slave clocks’ that are either embedded in another device or are stand-alone ‘protocol converters’ that re-generate a local 1-PPS or IRIG-B. Substation automation systems generally use IRIG-B and Network Time Protocol (NTP) for distribution of absolute time (Range Commanders Council, 2004; Mills, 2010; Steinhauser et al., 2010). The one pulse per second (1-PPS) signals defined in IEC 60044-8 provide a straightforward means of synchronising events (IEC TC38, 2002), but do not include time of

2.4 Precision timing for substations applications

29

day information (also referred to as ‘absolute time’). IRIG-B and 1-PPS are unidirectional and do not compensate for propagation delay (Behrendt & Fodero, 2006), while NTP and PTP are bidirectional network based systems that do compensate for network delays. Improvements were made to PTP, resulting in the release of IEEE Std 1588-2008, which is referred to as PTPv2 when a distinction is required. PTPv2 improves accuracy, precision, robustness, generates less network traffic, but is not backward compatible with PTPv1 (Eidson, 2006). The most significant change in PTPv2 was the introduction of ‘transparent clocks’ that calculate switch residence times, first proposed as ‘bypass clocks’ by Jasperneite et al. (2004). All references to PTP in this thesis are to PTPv2. Practical investigations of the performance of PTP in a range of applications have been widely published. These applications include substation topology analysis (Liu et al., 2010), distributed measurement systems (Ferrari et al., 2008b; Han & Jeong, 2010), particle physics (Soppelsa et al., 2010; Lipiński et al., 2012) and deep sea research (Milevsky & Walrod, 2008; del Río et al., 2012). The reported synchronisation accuracy results range from ±0.4 ns to ±200 ns, with the European Organization for Nuclear Research (CERN) ‘White Rabbit’ timing system giving the best performance (Lipiński et al., 2012).

2.4.1

Use of Precision Time Protocol in substations

The smart grid roadmaps discussed in Section 1.1.2 both recommend the use of PTP for high accuracy time synchronisation in substations. The IEEE Std C37.238 ‘Power System Profile’ defines a set of PTP parameters optimised for power system applications and mandates additional data to be transmitted (IEEE Power & Energy Society, 2011; IEEE PES PSRC Working Group H7/Sub C7 Members and Guests, 2012). The same Ethernet network infrastructure can therefore be used for time synchronisation and substation automation (Steinhauser et al., 2010; Brunner & Antonova, 2011). This is of particular benefit when the timing system is installed in a large switchyard. Synchrophasor monitoring enables utilities to gain an overall view of how the power system is performing through the use of Wide Area Monitoring Systems (WAMS), and to respond to faults in a coordinated fashion with WAPS (Begovic et al., 2005). Synchrophasors have application beyond the day to day operation of power systems, and are a means of measuring the response of load to perturbations in system voltage (Ledwich & Moyano, 2011). This information can be used by power system planning engineers studying the future stability of the grid. The US National Institute of Standards and Technology has developed a test bed to assess the performance of Phasor Monitoring Units (PMUs) that calculate synchrophasor quantities when synchronised by PTP (Amelot et al., 2011). WAMS, and to some degree WAPS, do not impose any risk on a power system—a WAPS sits above conventional protection, rather than supplanting it. As a result, utilities appear more willing to install PMUs on their networks (Martin & Carroll, 2008; Phadke et al., 2008). This may explain the research into PTP synchronisation of PMUs by substation automation researchers (Carta et al., 2009; Pallarés-López et al., 2010; De Dominicis et al., 2011; Lixia et al., 2011).

30

CHAPTER 2. BACKGROUND AND PAST RESEARCH

PTP is now being used to synchronise merging units in Chinese substations (Moore et al., 2010; Zhao et al., 2011), and merging units are now available that incorporate PTP slave clocks (Fan et al., 2011; Vizimax, 2013). Discussion of sampled values and synchronisation with PTP has been limited to reports on the installations, rather than performance tests under controlled conditions.

2.4.2

Evaluating the performance of the Precision Time Protocol

A significant benefit of PTP is that the experience gained in other industries is applicable to power systems; however some of the operating conditions with sampled values, notably high levels of multicast background traffic, are unique to power systems. Research into the general operation and behaviour of PTP has examined the servo response of slave clocks, hardware limitations, synchronising performance, transparent clock behaviour, and fault tolerance. A model of a PTP slave clock was developed using OMNeT++ by Giorgi & Narduzzi (2007) to examine fundamental parameters of networked synchronisation. The LAN eXtensions for Instrumentation instrumentation standard was used to generate background traffic. The same researchers later developed an improved slave clock servo based on a Kalman filter (Giorgi & Narduzzi, 2011). A different approach was taken by Chao et al. (2011), where a switching controller alternated between a fuzzy control scheme and a traditional proportional-integral scheme to achieve fast transient response and stable steady-state operation. This type of controller would address the slave response deficiencies identified in Chapter 5. Scheiterer et al. (2009) presented an analysis of the sources of error in a PTP timing system, in particular the effect of oscillator drift on master and slave clock accuracy. They showed that a high quality master clock is critical in the timing system, and that expenditure on the master rather than slave clocks is recommended. Loschmidt et al. (2012) analysed the influence of jitter sources on Ethernet-based time synchronisation, including for PTP. They found that timestamping inaccuracy and oscillator jitter cannot be distinguished unless the synchronising interval is varied. Plotting accumulated clock variance with respect to synchronising interval can be used to optimise the update rate, avoiding unnecessary network traffic (Figure 10 in Loschmidt et al., 2012). A grandmaster that estimates the drift of its internal oscillator will be more accurate, and this will improve holdover capability if there is an outage of the primary time reference (Tournier & Xiao Yin, 2008). The performance of transparent clocks has been assessed by several groups using dedicated timing test equipment such as the Agilent N2X2 (Burch et al., 2009; Zarick et al., 2011) and Symmetricom PacketProbe (Cosart, 2011). Burch et al. (2009) introduced Correction Factor Error as a metric for transparent clock performance, and this is used in the transparent clock assessments presented in Chapter 6. Other PTP test equipment is now on the market (Calnex, 2012) that automates many routine PTP tests, however these dedicated test sets are very expensive.

2

Agilent sold the N2X networking testing product line to Ixia on 30 October 2009.

2.5 Real-time data networks

2.4.3

31

Reliability of Precision Time Protocol systems

The reliability of protection systems is of utmost important in the electric power system. Grid codes include communications and timing equipment that are necessary for the protection system to function in their protection reliability standards (AEMC, 2013; NGET, 2013). The operation of sampled value protection schemes and WAPS requires accurate time synchronisation to operate, and this imposes a higher level of dependability on the timing system than is currently needed to time-stamp event logs or for WAMS. A distributed timing system is comprised of many components, and the reliability of each affects the overall availability. Network redundancy protocols such as Rapid Spanning Tree Protocol are a means of dealing with network failures in a looped or meshed network (Harada et al., 2012), but do not address network failures at the point a grandmaster clock connects to the network. Uncertainty in timing systems also affects performance, and is affected by the loss or degradation of grandmaster clocks (Ferrari et al., 2012a). A concern with fail-over redundancy is the time required for the selection of a new grandmaster, as slave clocks will be free-running while there is no active grandmaster (Ferrari et al., 2012a). There is also a concern regarding the slave servo response when there is a change of active grandmaster (Kozakai & Kanda, 2010), and it has been suggested that the election of a new grandmaster can take hundreds of seconds (Bondavalli et al., 2013). The results presented in Chapter 7 of this thesis show that grandmaster elections take less than ten seconds, and that the slave clocks only exhibit a step in their outputs if there is an offset between the primary and backup grandmaster clocks’ internal references. Schriegel et al. (2010) identified the servo response of slave clocks as a concern; however they questioned whether a grandmaster time step would be a valid PTP slave test case. The results presented in Chapter 5 show that this is indeed a necessary test, as grandmaster clocks resynchronising to a primary time reference (e.g. GPS) after a period of drift or free-running do experience step changes, and these steps are published in PTP messages. A formal clock synchronization model is presented by Gaderer et al. (2010) that improves the robustness of a timing system. The possibility of detecting slave clock loss through the detection of missing messages from slave clocks to the grandmaster has been proposed (Gaderer et al., 2010), but this is not applicable to substation timing for two reasons. Firstly, the peer-delay timing method is mandated by the C37.238 Power System Profile and therefore slave clocks do not communicate directly with the grandmaster. Secondly, the messages used for peer-delay measurement are optional for slave clocks that implement the C37.238 profile. A slave clock that can estimate the error of the grandmaster has been presented by Bondavalli et al. (2013). Such a clock would enable alarms to be raised if the accuracy requirements of the application (e.g. process bus or synchrophasors) were not met.

2.5

Real-time data networks

‘Horizontal communication’ in substations is the communication between protection relays (inter-tripping) or within a bay (process connections). ‘Vertical communication’ is the control

32

CHAPTER 2. BACKGROUND AND PAST RESEARCH

of substation equipment through a local operator interface, or from a remote control centre. Horizontal communication is generally more time-sensitive and uses a publisher-subscriber model, while vertical communication is more focussed on reliability and a client-server model is most commonly used (Gaj et al., 2013). The Manufacturing Message Specification (MMS) is specified in IEC 61850-8-1 for point to point reliable communications (ISO, 2003). GOOSE and sampled values both use multicast (one to many) transmission of messages to implement the publisher-subscriber model. The Publisher-subscriber model does not guarantee delivery or report failure (as client-server does), and this is why GOOSE messages are transmitted several times when a state change occurs (Eugster et al., 2003). The continuous transmission of sampled value data is the only means of mitigating lost frames, unless network redundancy protocols are used. Communication networks are critical for smart grid applications, and the benefits of a smart grid will not be realised if the performance of these networks is inadequate (Yang et al., 2011). Much of the focus to date on smart grid communications has been on distribution networks (Sauter & Lobashov, 2011; Güngör et al., 2013) or synchrophasors (Kansal & Bose, 2012), both of which are wide area networks. The network characteristics of a sampled value process bus local area network, with high data rates and strict performance requirements, have not been described in the literature. Industrial networks are moving from proprietary networks, which are often incompatible with one another, to shared Ethernet networks (Sauter & Lobashov, 2011). Some industrial protocols use ‘vanilla Ethernet’, while others modify the standard to include guaranteed bandwidth and time slots (Decotignie, 2005). Applications with high performance requirements that use standard Ethernet tend to communicate with ‘raw’ Ethernet frames (OSI layer 2), rather than use more complex protocols such as the Internet Protocol (IP) (Felser, 2005). GOOSE, sampled values and PTP (when the Power System Profile is used) all communicate with Layer 2 multicast Ethernet frames. Ethernet is attractive for industrial networking (and substation automation) due to ready availability of networking hardware at competitive prices (Decotignie, 2009). Industrial applications often face similar environmental conditions as those found in substations, but the electromagnetic compatibility (EMC) requirements for a substation are much harsher (Pozzuoli & Moore, 2006). IEC 61850-3 specifies a number of EMC standards and performance levels that networking equipment must meet in order to be suitable for use in substations (IEC TC57, 2002a).

2.5.1

Achieving determinism with switched full duplex Ethernet networks

Ethernet has evolved significantly since its introduction as a shared network with Carrier Sense Multiple Access with Collision Detection (CSMA/CD) access arbitration (Metcalfe & Boggs, 1976). The speed of Ethernet networks has steadily increased from the original 3 Mb/s to 1 Gb/s in common use, and recent amendments introduced 40 Gb/s and 100 Gb/s Ethernet variants (IEEE Computer Society, 2010). Most substation networks operate at 100 Mb/s, with 1 Gb/s fibre optic networks (1000BASE-LX10) recommended for trunk links and process bus

2.5 Real-time data networks

33

trunks (IEC TC57, 2012). The suitability of switched full-duplex Ethernet networks for real-time factory communication was modelled by Jasperneite & Neumann (2001), and found to be stable up to the theoretical performance limits. Georges et al. (2002) modelled a switched network using Network Calculus (Cruz, 1991a,b), and calculated maximum end to end delays for various configurations. Ethernet has generally been regarded as non-deterministic, however this was due to random bus arbitration using CSMA/CD that is required for coaxial networks or twisted pair networks built with repeater hubs. The 1993 release of IEEE Std 8021.D introduced switching and used in combination with full-duplex links creates a microsegmented network (each link is a collision domain with one transmitter and one receiver), and hence there is no possibility of collision (Jasperneite et al., 2002). Frame transfer times are not static, as switching introduces queuing delays to instead of collision retransmission delays (Loeser & Haertig, 2004). The ‘longest path’ problem has been used by Schmidt & Schmidt (2010) to evaluate the worst case packet delay of a switched Ethernet network. Their model requires that the exact number of packets that can be generated at a node is known, and fortunately this is often the case for process bus networks. Despite demonstrations by factory automation experts that switched full duplex Ethernet is effectively deterministic when designed properly, substation engineers have been reluctant to accept Ethernet as a communications medium (Sperl, 2010). GOOSE transmission delays of tens of milliseconds are still being attributed to collision detection, even in switched process bus substations (Liu et al., 2012). Industrial Ethernet protocols have adopted priority tagging using IEEE Std 802.1Q (IEEE Computer Society, 2011) to improve the real-time performance of the data networks when there are various classes of traffic (Jasperneite et al., 2007). IEC 61850-8-1, IEC 61850-9-2 and IEEE Std C37.238 mandate the use of 802.1Q for prioritisation of messages. Priority tagging using 802.1Q for Ethernet is considered a Class of Service (CoS) indication rather than a Quality of Service (QoS) specification as there is no firm guarantee of performance in vanilla Ethernet (Thrybom & Prytz, 2009). A detailed network design, using of CoS and limiting traffic, is needed to meet latency, jitter and packet loss performance requirements of real-time Ethernet based applications. The use of IEEE Std 802.1Q to create virtual local area networks (VLANs) and multicast filtering based on IEEE Std 802.1D (IEEE Computer Society, 2004) reduces the size of the multicast domain, and hence the number of stations that receive the multicast frames (Ali & Mahmood, 2008). Multicast filtering is recommended to restrict the transmission of sampled values, GOOSE, PTP and other industrial protocols (such as PROFINET IO) to devices that have a need for the data. Multicast messages will otherwise become broadcast traffic if filtering is not used (Thrybom & Prytz, 2010; Imtiaz et al., 2010).

2.5.2

Network simulation and emulation

Network Calculus and other analytic techniques have been used to predict network behaviour when the load is variable (Schmidt & Schmidt, 2010). The self-similarity of ‘normal’ network traffic (its fractal nature) has been used in auto-regressive and wavelet traffic models (Kolbusz

34

CHAPTER 2. BACKGROUND AND PAST RESEARCH

et al., 2006); however such traffic is generally based on human activity (random and noncoordinated network activity). Sampled value networks by their nature have a near constant load. Occasional time-critical events occur in the reverse direction, such as circuit breaker operations, but the majority of the traffic is not influenced by human actions. A significant amount of process bus network performance modelling using event-based simulation has been undertaken (Thomas & Ali, 2010; Kanabar & Sidhu, 2011). These models are only as accurate as the assumptions used to create them, and some have sampling rates and message sizes that do not reflect current implementations, such as 9-2LE. Obtaining accurate models of hardened switches for substation applications (IEC 61850-3 compliant) can prove difficult as there is much less demand for these devices than for switches with widespread commercial application. Event based simulation is more accurate but slower than analytical approaches, and some tools have adopted a hybrid approach to reach a performance compromise. Jasperneite & Neumann (2000) spent considerable effort on modelling real-time Ethernet systems. They recommend that network traffic be collected for a week to ensure that simulated traffic has the same characteristics as the system being investigated. This length of monitoring may not be necessary for a sample value process bus as the architecture is publish/subscribe rather than two-way communications. Industrial automation protocols that use handshaking, such as MMS, will result in more varied traffic and a longer recording period may be required. It is recognised in the literature that network emulation is a valuable tool for fully understanding the behaviour of network protocols, with most applications involving wide area networks (Henning et al., 1997; Zheng & Ni, 2004), or for wireless applications (Sobeih et al., 2006). Network emulation allows hardware devices to be tested in a controlled manner, and takes into account device characteristics that are unknown (Webb, 2007). Several open-source software systems exist to emulate networks at the IP level (OSI layer 3), but the layer 2 multicast nature of 9-2LE, GOOSE and PTP mean that these tools are not suitable and that network emulators based on custom hardware are required. Layer 2 network emulators, such as the Anue GEM (Anue Systems, Inc., 2012) and Simena NE1000, are capable of introducing a variety of impairments into real Ethernet networks. Ozansoy (2006) used a network hardware-in-the-loop approach with OPNET Modeler to prototype communication gateways for IEC 61850. This enabled the timing of a real-time packet exchange of hardware Ethernet switches to be assessed. This is the opposite of network emulation, in that the network is real and the end points are simulated. A similar approach may be feasible for sampled values or GOOSE, but has not been published in the literature.

2.5.3

Network interactions with multi-protocol shared networks

The communications requirements of smart grid applications are now being documented (Sauter & Lobashov, 2011; Güngör et al., 2013), however process buses within substations are often omitted from discussion. The interaction of protocols has been identified as an issue in general for industrial real time networks (Silvestre-Blanes et al., 2011). The primary protocols used in a process bus (sampled values, GOOSE and PTP) are layer 2 multicast protocols. These

2.5 Real-time data networks

35

are non-routable and are limited in size to one Ethernet frame. Other IP-based protocols are used for configuration, monitoring and management of devices. A shared process bus presents the case where several protocols are in use, and each is critical for the safe operation of the power network. Sampled value messages cannot be delayed, otherwise protection response is impaired, and similarly GOOSE messages cannot be delayed otherwise circuit breaker tripping will occur too late. It has also been suggested by several authors that PTP messages must be handled with high priority to maintain synchronisation accuracy (De Dominicis et al., 2011; Zarick et al., 2011). The results presented in Chapter 6 of this thesis show this is not the case, provided the PTP network is built using transparent clocks. This is because the residence time (the time a frame remains buffered in an Ethernet switch due to queuing delay) is measured and published by the transparent clock. Slave clocks use this ‘correction’ information when estimating the time difference from the grandmaster. Some substations use other Ethernet protocols in addition to IEC 61850. These include DNP3, EtherCAT and PROFINET IO. The influence of an industrial networking protocol such as PROFINET IO on IEC 61850 network performance has been modelled by Ferrari et al. (2012b).

2.5.4

Assessing the performance of real-time networks

Evaluating the performance of real-time networks presents its own challenges. Most network interface cards (NICs) support ‘promiscuous’ mode where all received frames is passed to the host computer. This data can be recorded with tools such as Wireshark for later analysis (Combs, 2012). The introduction of switched Ethernet networks limits the traffic that a monitoring system can capture, however there are two ways of dealing with this. The first is to use ‘mirror ports’ on Ethernet switches to copy traffic from one port to another, and the second method is to use a ‘tap’ inserted between the device under test and the network (Schafer & Felser, 2007). Mirror ports do not preserve accurate timing information, and where this information is important taps are recommended (Zhang & Moore, 2007). These taps can be active electrical devices or passive optical devices that bleed some light from a fibre optic cable (NetOptics, 2013). Measuring real-time network performance with conventional NICs, regardless of the connection, introduces errors due to processing latencies in the host operating system. This reduces the accuracy of packet time stamps, and high data rates can overload the measuring system (Schafer & Felser, 2007). An alternative is to use precision Ethernet capture cards with hardware time-stamping units that can capture full line rate data on multiple ports without dropping frames. The Endace DAG and Napatech NT4 cards are two commercially available families of Ethernet cards that use field programmable gate arrays (FPGA) to accelerate performance (Endace, 2012; Napatech, 2012). These cards are significantly more expensive than conventional NICs, leading some researchers to develop their own precision Ethernet capture hardware (Depari et al., 2008). The hardware on the multi-port DAG cards time-stamps all frames upon arrival with a common time base (Micheel et al., 2001). This limits the time stamp error for frames captured

36

CHAPTER 2. BACKGROUND AND PAST RESEARCH

on the same card to the resolution of the time stamp clock (7.5 ns). The ability to synchronise the time stamp clock to an external 1-PPS source (often derived from a GPS receiver) means that the time stamp error for frames captured on different cards is less than 1 μs. Accurate time stamps with nanosecond resolution enable real-time network performance to be assessed (Ferrari et al., 2008a), and for the behaviour of time synchronising protocols to be assessed (Ridoux & Veitch, 2009). Network capture tools allow a researcher to observe a network, but traffic injection is required to stimulate the network to elicit responses. Traffic generation tools range from opensource software such as tcpreplay (Turner, 2012) to proprietary systems such as the DAG and NT4 cards. Sitting in the middle of the continuum is open-source hardware, such as NetFPGA card that was designed for network teaching and research (Gibb et al., 2008). The NetFPGA is however limited to operation at 1 Gb/s and does not presently support the 100 Mb/s Ethernet used by most substation automation equipment. Software systems introduce variation in inter-frame time (Botta et al., 2010), and therefore validation of traffic generators with precise capture cards is recommended. Tools like tcpreplay are an economic way of generating background traffic when precise inter-frame times are not required (Bonaventure, 2004). The Calibre traffic generation tool is based on the NetFPGA platform and achieves with interframe time errors of approximately 10 ns (Ghobadi et al., 2012), similar to the performance of the DAG and NT4 cards. IEC 61850 specific traffic generation tools have been presented that assist in characterising network performance, both for sampled values (Konka et al., 2011) and GOOSE (Blair et al., 2013).

2.6

Summary

NCITs offer many advantages in substations, particularly in terms of reducing the space required and the elimination of potentially hazardous voltages from control rooms. Vendorindependent interfaces are required for interoperability between NCITs and protection relays. Digital interfaces, using IEC 61850-8-1 and IEC 61850-9-2 over Ethernet, are becoming the industry standard. Early trials showed that incompatibility was still an issue, however recent Mexican field trials were more successful, but some interoperability issues remain. Test systems are required that enable products to be assessed for conformance and performance, and a combination of ‘real’ hardware and vendor-independent synthetic traffic has been proven for IEC 61850 applications. Process bus network performance has previously been modelled using event-based simulation, but the models need to reflect the protocols that are adopted by industry, such as 9-2LE. Many reported studies have used network traffic from obsolete standards, resulting in incorrect frame sizes and transmission rates being used in the models. While the simulations were executed with diligence, the results cannot be related to the protection and networking equipment installed by or available to utilities. Laboratory protection tests with commercially available protection relays are now being reported, with feeder protection (distance and current differential) commonly used. The published results of this testing tend to be single

2.6 Summary

37

data points, which does not provide detail on the variability of results or uncertainty in the protection relays. More comprehensive testing following the guidelines in IEC 61850-10 is required to determine the true nature of protection performance. Real-time simulation testing of protection relays has been used by several groups, but no benchmarks have been provided that validate the results obtained from the RTDS with process bus connections. Measurement uncertainty is generally not considered, with most researchers using software based tools to assess performance. The use of hardware accelerated Ethernet cards with FPGAs that off-load processing from the host CPU is recommended, as this minimises measurement system error when assessing network performance. Similarly, generating synthetic test data with an FPGA-based Ethernet card ensures that the frames are transmitted at exactly the required rate, which is critical for ‘bursty’ traffic. PTP has been used in a range of industries for the past ten years. The 2008 revision to the standard (PTPv2) and the Power System Profile (IEEE Std C37.238) provide a networked timing solution for substation applications that require a synchronising accuracy better than of ±1 μs. Much of the PTP effort has focussed on synchrophasors for WAMS and WAPS, with no work published that evaluated the suitability of PTP for sampled value synchronisation until the research presented in this thesis commenced. A single model of PTP clock was used to synchronise laboratory merging units implemented with a real-time operating system, but this was not the focus of the research (Kanabar, 2011). The reliability requirements for process bus protection are greater than for WAMS since this is the primary protection for high voltage plant. Reliability research for PTP in the power industry has concentrated on steady state performance and the response to network outages. The availability of PTP timing systems has not attracted the same attention that the availability of process bus networks have, yet they are a critical component of a process bus when used to synchronise merging units. The wealth of knowledge on the behaviour of PTP devices in general industry can be used to design substation PTP systems, and is a benefit of adopting a widely used timing protocol. Research has shown that concentrating investment into grandmaster clocks gives better performance than investing equally across grandmaster and slave clocks. The response of slave clocks to contingencies, both in the data network and in the primary time source, is not specified by standards. The effect of network outages on slave clock performance is reasonably well understood; however the effect of contingencies affecting grandmaster clocks that remain connected to the network is largely unknown. This has implications for substations where heterogeneous systems are the norm (to ensure the grid code redundancy requirements are complied with) and slave clock transient responses are likely to differ. This thesis examines the foundations of a process bus network: precision timing and real-time networks. These two areas have a number of unresolved questions regarding performance. The research objectives presented in Section 1.2 are intended to address these questions and provide quantitative information that can be used by researchers to refine simulation models. The use of high performance network capture equipment and PTP clocks from a number of vendors devices is key to understanding how networks and timing affect performance. The commercial availability of sampled value protection relays and recently

38

CHAPTER 2. BACKGROUND AND PAST RESEARCH

released standards, such as the PTP Power System Profile, presents an opportunity to assess protection performance with a realistic scale model of a substation automation system. This enables any deficiencies in standards or products to be identified and the results can be used to refine simulation models. Simulation can then in turn be used for large-scale studies once the parameters are validated.

CHAPTER 3

Test and evaluation system for multi-protocol sampled value protection schemes This chapter provides an introduction to the ‘scale model’ Substation Automation System (SAS) used to investigate the behaviour and performance of process bus automation that was built with commercially available protection relays and precision clocks. This model SAS is the first to incorporate control, protection and Precision Time Protocol (PTP) timing into one evaluation system. Real-time simulation of the power system provides a controlled environment for testing the limits of performance, with no risk to power system security. The test bed was built in two parts which simulated the separation of switchyard and control room found in substations. All communication between the two sections was via dedicated fibre optic cables, which added realism to the test environment. This chapter details the equipment used to perform the experiments that are presented in later chapters, and presents the experimental methodology used to design these in-depth investigations. Three proof-of-concept studies are presented that verified the SAS test bed performed correctly and provided the controlled environment required for further testing. This gave confidence that an experimental investigation using a selected sample of devices was feasible and would provide a quantitative assessment of system performance.

©2011 IEEE. Reprinted, with permission, from D.M.E. Ingram, D.A. Campbell, P. Schaub & G. Ledwich, “Test and evaluation system for multi-protocol sampled value protection schemes”, Proceedings 2011 IEEE Trondheim PowerTech, June 2011.

39

Statement of Contribution The authors listed below have certified* that: 1.

they meet the criteria for authorship in that they have participated in the conception, execution, or interpretation, of at least that part of the publication in their field of expertise;

2.

they take public responsibility for their part of the publication, except for the responsible author who accepts overall responsibility for the publication;

3.

there are no other authors of the publication according to these criteria;

4.

potential conflicts of interest have been disclosed to (a) granting bodies, (b) the editor or publisher of journals or other publications, and (c) the head of the responsible academic unit, and

5.

they agree to the use of the publication in the student’s thesis and its publication on the QUT ePrints database consistent with any limitations set by publisher requirements.

In the case of this chapter: Title

Test and Evaluation System for Multi-Protocol Sampled Value Protection Schemes

Conference

2011 IEEE Trondheim PowerTech. Trondheim, Norway.

DOI

10.1109/PTC.2011.6019243

Status

Presented, June 2011

Contributor David M. E. Ingram

Statement of contribution* Experimental design, constructed test bed, data analysis and drafting the manuscript.

12 October 2012 Duncan A. Campbell

Conception and design of the project, critical revision of the paper.

Gerard Ledwich

Critical revision of the paper.

Pascal Schaub

Conception and design of the project, critical revision of the paper.

Principal Supervisor Confirmation I have sighted email or other correspondence from all co-authors confirming their certifying authorship. Prof Duncan A. Campbell

12 October 2012 Signature

1

Test and Evaluation System For Multi-Protocol Sampled Value Protection Schemes David M. E. Ingram, Senior Member, IEEE, Duncan A. Campbell, Member, IEEE, Pascal Schaub, Member, IEC TC57 WG10, and Gerard Ledwich, Senior Member, IEEE

Abstract—Proposed transmission smart grids will use a digital platform for the automation of substations operating at voltage levels of 110 kV and above. The IEC 61850 series of standards, released in parts over the last ten years, provide a specification for substation communications networks and systems. These standards, along with IEEE Std 1588-2008 Precision Time Protocol version 2 (PTPv2) for precision timing, are recommended by the both IEC Smart Grid Strategy Group and the NIST Framework and Roadmap for Smart Grid Interoperability Standards for substation automation. IEC 61850-8-1 and IEC 61850-9-2 provide an inter-operable solution to support multi-vendor digital process bus solutions, allowing for the removal of potentially lethal voltages and damaging currents from substation control rooms, a reduction in the amount of cabling required in substations, and facilitates the adoption of non-conventional instrument transformers (NCITs). IEC 61850, PTPv2 and Ethernet are three complementary protocol families that together define the future of sampled value digital process connections for smart substation automation. This paper describes a specific test and evaluation system that uses real time simulation, protection relays, PTPv2 time clocks and artificial network impairment that is being used to investigate technical impediments to the adoption of SV process bus systems by transmission utilities. Knowing the limits of a digital process bus, especially when sampled values and NCITs are included, will enable utilities to make informed decisions regarding the adoption of this technology. Index Terms—Ethernet networks, IEC 61850, IEEE 1588, performance evaluation, power system simulation, power transmission, protective relaying, smart grids, time measurement

ACRONYMS GOOSE IED LN MU 1PPS NCIT PTPv2 RTDS SV TAI VLAN

Generic Object-Oriented Substation Event Intelligent Electronic Device Logical Node Merging Unit One pulse per second Non-Conventional Instrument Transformer Precision Time Protocol version 2 Real Time Digital Simulator Sampled Values International Atomic Time Virtual Local Area Network

David Ingram, Duncan Campbell and Gerard Ledwich are with the School of Engineering Systems, Queensland University of Technology, Brisbane, Queensland 4000, Australia. Pascal Schaub is with Powerlink Queensland, Virginia, Queensland 4014, Australia.

I. I NTRODUCTION HE ‘smart grid’ has been defined as an umbrella term for technologies that are an alternative to the traditional practices in power systems, with the following benefits: reliability, flexibility, efficiency and environmentally friendly operation [1]. Much of the smart grid focus has been in the distribution arena where distributed automation provides many benefits, but there is also an opportunity to introduce smart technologies into transmission networks to improve observability and control of the power system, and to achieve greater interoperability. It is the novelty in the way that tasks are implemented that signifies the smart grid, and some suggest strongly that the smart grid should not be used to emulate existing systems, but should be used to promote new thinking, particularly with regard to protection schemes [2]. The IEC and NIST have developed smart grid vision documents that identify the IEC 61850 series of standards to be key components of substation automation and protection for the transmission smart grid [3], [4]. The objective of the IEC 61850 series of substation automation (SA) standards is to provide a communication standard that meets existing needs, while supporting future developments as technology improves. IEC 61850 communication profiles are based, where possible, on existing international standards. SA functions are decomposed into ‘logical nodes’ (LNs) that describe the functions and interfaces that are required, and are described in [5]. IEC 61850-9-2 details how high speed sampled values (SV) shall be transmitted over an Ethernet network [6]. IEC 61850-8-1 defines how transduced analogue values and digital statuses can be transmitted over an Ethernet network using Generic Object Oriented Substation Events (GOOSE) and Manufacturing Messaging Specification (MMS, ISO 9506) [7]. The most stringent of the various GOOSE timestamp accuracy requirements is 100 µs, and the most stringent requirement for SV is 1 µs [8]. Ethernet is a key component and provides a means for connecting intelligent electronic devices (IEDs) with primary plant and for interconnection between IEDs [9]. Alternatives to oil/paper insulation and porcelain for high voltage current transformers (CTs) have been available for some time. One option is to use polymer insulation and SF6 gas [10], but these have only found

T

2

favour at the higher voltages (typically 500 kV and above) and there is concern regarding the use of SF6 as it is a very potent greenhouse gas, having a 100 year warming potential 22 800 times that of CO2 [11]. A second option is to use ‘non-conventional instrument transformers’ (NCITs) that do not rely on traditional iron cored inductive principles. These include air-cored transformers, such as Rogowski coils and fibre optic sensors, with the first fibre-optic CT (using Faraday rotation) for use in high voltage power systems demonstrated by Japanese researchers in 1966 [12]. NCITs provide significant safety and environmental benefits, greater dynamic range, wider frequency response and ease of installation [13]. This work presents a test and evaluation system that is being used to assess the performance of protection systems using Ethernet for a process bus and for sampling synchronisation. A test and evaluation system based on SV, GOOSE, MMS, PTPv2 and a real time digital simulator (RTDS) is used to assess SV protection schemes using ‘live’ equipment against the requirements of the National Electricity Rules (NER). This system will provide information on how the competing demands of these protocols can be met and is described in the rest of this paper. Previously published work has described a SV protection test system [14], but this work extends this by describing a specific test system and by incorporating PTPv2 for SV sample synchronisation. II. BACKGROUND

SinglexPhasexCapacitivexVoltagexTransformer Maximumxofx108 CopperxConductors

ThreexPhasexCapacitivexVoltagexTransformer

Toxsubstation controlxroom

CurrentxTransformer CircuitxBreaker

Multicores

Isolator

Multicores

CT Marshalling Kiosk(s) Multicores

1xBus

/6 /6 /6 /6 /6 /6

/6 /6 /6 /6 /6 /6

/6 /6 /6 /6 /6 /6

2xBus

To Feeder

To Transformer

/2

/2

/4

VT Marshalling Kiosk(s) Maximumxofx8 CopperxConductors

HVxConductor CT/VTxSecondary

Toxsubstation controlxroom

(a) HVEConductor CT/VTESecondary TimeESyncEb1PPSF Trip/Close/Monitor Ethernet

ThreeEPhaseECapacitiveEVoltageETransformer CurrentETransformer

Ethernet Switch

CircuitEBreaker Isolator

Time Synchroniser

Time Synchroniser Circuit Breaker IED

1EBus

1PPS

Merging Unit /6

/4

Circuit Breaker IED

EthernetEonEtwo fibreEopticEcores

ToEsubstation controlEroom

Time Synchroniser

1PPS

1PPS

Merging Unit

Merging Unit

/6 /4

/6 /4

To Transformer

Circuit Breaker IED

2EBus

To Feeder

A. Transmission Substations Fig. 1 shows a ‘breaker and a half’ transmission substation bay, typically used at 220 kV and above in Australia. The primary plant (transmission lines, circuit breakers, instrument transformers and power transformers) is connected to the secondary systems (control, protection and metering) through ‘process level’ connections. A digital process bus provides the process connections in a digital form rather than as scaled voltages and currents (typically 110 V and 1 A) or switched relay contacts. Merging units (MUs) digitise instantaneous analogue signals, typically the output of three or four voltage transformers (each using the ‘TVTR’ LN) and three or four current transformers (each using the ‘TCTR’ LN) and ‘publish’ (transmit) the results in multicast Ethernet frames. Protection IEDs ‘subscribe’ (receive) these frames and extract the instantaneous measurements of voltage and current. Multicasting allows more than one IED to use a single transmission. The publish/subscribe model is a one-tomany approach. B. Automation Standards IEC 61850-9-2 details how SV data shall be transmitted over Ethernet, but does not explicitly define what information should be transmitted, nor at what rate [6]. Generic Object Oriented Substation Events (GOOSE) and Manufacturing Messaging Specification (MMS, ISO 9506) are used to transmit transduced

(b) Fig. 1. Schematic of a breaker-and-a-half (1½ CB) transmission substation bay using (a) conventional CT and VT wiring, and (b) digital process connections.

analogue values or digital status from high voltage plant [7]. A digital process bus may use proprietary systems, but those based upon IEC 61850 (GOOSE, MMS and SV) are the subject of this research. In an attempt to reduce the complexity and variability of implementing SV complying with [6], an implementation guideline was developed in 2004 by the UCA Internation User Group (UCAIug) that is commonly referred to as ‘9-2 Light Edition’ or ‘9-2LE’ [15]. This guideline specifies the data sets that are transmitted, sampling rates, time synchronisation requirements and physical interfaces, but does not specify the transient response of devices. The transient response of NCITs differs from conventional magnetic CTs and VTs, and this has ramifications for differential protection [13]. The IEC 61869 series of standards are being developed by IEC Technical Committee 38 (TC38) to include this and are based in part on 9-2LE, which has roots in IEC 60044-8 [16]. Several vendors of non-conventional instrument transformers (NCITs) are using 9-2LE to interface their equipment to IEDs from other manufacturers, and this inter-operability is a definite benefit of an Ethernet SV process bus.

DAVID INGRAMet al.: TEST AND EVALUATION SYSTEM FOR MULTI-PROTOCOL SAMPLED VALUE PROTECTION SCHEMES

3

MUs throughout a substation must accurately time stamp each sample to allow protection IEDs to use SV data from several MUs (through the use of time alignment of samples in buffer memory). This concept has been termed ‘relative temporal consistency’ by Decotignie [17]. 9-2LE specifies an optical 1 pulse per second (1PPS) timing signal with ±1 µs accuracy for this purpose. It should be noted that other automation systems exist that are based upon IEC 61850-9-2, however most, if not all, are not based on 9-2LE and use point to point connections and are therefore outside the scope of the test system presented here. C. Timing IEEE Std 1588-2008, version 2 of the Precision Time Protocol (PTPv2) [18], significantly improves time synchronising performance [19], making this a viable option for synchronising MUs. The same IEC and NIST smart grid strategies that propose IEC 61850 for substation automation and control also recommend the use of IEEE Std 1588-2008 for high accuracy time synchronisation [3], [4]. The same data network infrastructure can then be used for SV, GOOSE and for time synchronisation. This is of great benefit when MUs are located throughout a substation, adjacent to the primary plant they are connected to. Synchronising with 1PPS signals over fibre optic cable is straightforward when MUs are located in substation control rooms (as done by many suppliers of non conventional instrument transformers), but distributed MUs would require a separate fibre optic network throughout the substation just for 1PPS, and this is avoided with PTPv2. Recently published work has described the first of many process bus substations in China using PTPv2 for time synchronisation of an IEC 61850-9-2 process bus [20]. III. T HE T EST S YSTEM A test bed to evaluate the performance of protection systems using SV has been constructed. This test bed comprises the following components: RTDS, PTPv2 clocks, Ethernet emulator, traffic generator and a precision Ethernet capture card. These are shown in schematic form in Fig. 2. The test system can be separated into two areas: the ‘field’ and the ‘control room’. The ‘field’ comprises the instrument transformers, MUs and time synchronisation devices, and is represented by the RTDS and equipment shown in Fig. 3. The ‘control room’ contains Ethernet switches, grandmaster clocks and protection IEDs and is shown in Fig. 4. This work complements proposals for control system simulation [21] by focussing on protection applications, and differs from the analysis of SV systems by event-based simulation [22] by implementing a scale model using production or late stage prototype devices. A. Real Time Digital Simulator The Real Time Digital Simulator (RTDS) is a multiprocessor simulation system that is running electromagnetic transient program (EMTP) simulations of

Fig. 2.

Schematic of the test and evaluation system.

Fig. 3. Photograph of the ‘field’ equipment, with the RTDS acting as the SV source and PTP slave clocks providing time synchronisation.

power systems in real time [23]. Power system models are created using a graphical interface, compiled and then executed on the RTDS hardware. The real-time execution speed allows the EMTP model to respond to external stimuli and for hardware (such as protection IEDs) to interact with the simulation. This is a significant improvement over playback of pre-calculated faults, as the response of the IEDs changes the outcome of the simulation. GTNET cards enable the RTDS to send and receive GOOSE messages (to take the place of digital IO) and to send SV messages (which act as analogue outputs) over Ethernet [24]. The RTDS used in this test bed has a total of 28 processors and three GTNET cards. Scripting in the RTDS power system model varies the location and impedance of faults. It is expected that different protection schemes will respond differently to network latencies, and using the RTDS will permit

4

Fig. 5. Typical 1PPS waveforms generated by a grandmaster and a slave clock. C3 is the PTP slave clock and C4 is a reference GPS. C1 is used as the reference point for timing. The time scale is 1 µs per division.

B. Time Synchronisation

Fig. 4. Photograph of the ‘control room’ components, including Ethernet switches, Ethernet simulator and grandmaster clocks.

these schemes to be exhaustively tested under a variety of communication network conditions and fault locations. Conventional protection testing using secondary injection verifies that the protection settings have been correctly entered into the IED, but testing with the RTDS demonstrates that the protection settings are themselves correct. GTNET cards will act as MUs by generating SV streams, rather than using analogue connections and power amplifiers. Protection IED operation will be evaluated by having the RTDS subscribe to GOOSE trip and close messages generated by the IEDs. These GOOSE messages will be transmitted over a separate Ethernet network representing a station bus, or over the process bus when the RTDS takes the role of a circuit breaker interface IED. The effect of differences in transient response between electromagnetic CTs and NCITs will be modelled using the RTDS, and the effect upon various protection schemes will be assessed.

The MUs available for testing and the RTDS GTNET cards do not yet directly support PTPv2, and so PTPv2 slave clocks that generate a 1PPS signal are an interim means of integrating IEEE 1588 with IEC 61850-9-2. MUs use this 1PPS signal as if it were generated from a GPS or IRIG-B receiver, but without the propagation delays inherent in these systems (which can be significant in transmission substations). Automatic pulse delay measurements were made with a digital oscilloscope sampling at either 500 ps (one or two channels) or 1 ns (three or four channels) between samples. The standard record length was 200 000 samples per channel, giving a pulse delay measuring range of ±100 µs when three or four channels were in use. The oscilloscope was computer controlled, with a standard configuration sent to the oscilloscope at the start of each test. Fig. 5 is a sample of the 1PPS waveforms captured by the oscilloscope, with infinite persistence to show the jitter on screen. Pulse delay measurements in each direction were transferred to the PC after each 1PPS pulse for further statistical analysis. It is expected that most grandmaster clocks in substations will be synchronised to International Atomic Time (TAI) via the GPS constellation, as GPS is an excellent tool for time transfer [25]. Synchronisation to TAI allows for synchronisation between substations, which is used to achieve common time-stamps in ‘sequence of events’ records and for some feeder protection schemes. A time clock providing PTPv2 grandmaster functions may also be an IRIG-B or 1PPS source for legacy devices within the substation control room, and an NTP master clock for less demanding IEC 61850 applications. Two PTPv2 grandmaster clocks are used in this system so the effect of clock failure can be assessed. A monitoring system continually records the delay between 1PPS signals generated by the grandmasters and 1PPS signals generated by the slave clocks. C. Ethernet Switches A significant amount of network traffic is created by SV sources, ranging from 4.2 Mb/s–5.8 Mb/s for

DAVID INGRAMet al.: TEST AND EVALUATION SYSTEM FOR MULTI-PROTOCOL SAMPLED VALUE PROTECTION SCHEMES

5

Slave Power−up Acquisition

9-2LE, and is dependent on the nominal power system frequency and implementation options. Managed switches allow data to be segregated and prioritised based upon VLAN tags or multicast destination addresses [26]. This test system will allow different communication architectures and prioritisation to be investigated. D. Network Emulation Network emulation is a technique where a device simulates communication network impairment, but in a controlled and repeatable manner. Common impairments include packet delay variation, packet loss and packet corruption. An Data Link Layer emulator has been selected as SV, GOOSE and PTPv2 use OSI Layer 2 Ethernet frames. The emulator has the ability to selectively filter or modify frames based on source or destination address, payload type and VLAN ID. The selective nature of filtering allows the evaluation system to increase bit error rates for selected protocols and to drop individual devices from the network to test fail-over schemes. E. Protection IEDs SV capable protection relays that implement distance and differential protection have been sourced from major manufacturers. All trip and close signals are sent from the IEDs via GOOSE messages rather than using relay contacts. Communication network impairment will be used to determine at what stage protection functions are adversely affected. This will provide information on the suitability of the performance requirements specified in IEC 61850-5 [8]. Other work has shown that GOOSE trip messages transmitted with a high priority (802.1Q priority 7) have trip times that are within 0.1 ms of that achieved with relay contact tripping [27]. As a result this work will use focus on GOOSE tripping for protection IED feedback to the RTDS. F. Ethernet Capture An Ethernet capture card with precise time-stamping captures SV and GOOSE traffic at the point of generation and at the point of transmission and at the point where IEDs ‘consume’ the data. This enables the delays that the network emulator is creating and the delays induced by Ethernet switches with high traffic loads to be measured. Network captures at the source are made with a passive Ethernet tap. Fig. 6 shows this arrangement, and the switch can be replaced by any other device or system under test. Two capture streams are saved to separate files and post-processing used to extract absolute timing information and a summary of 9-2LE parameters including

5000

Vendor A Slave Vendor B Slave

3000

Ethernet timing measurement system.

Jitter (ns)

Ethernet capture card

1000

Fig. 6.

1PPS Output

Ethernet switch Passive tap

−1000

Sampled value source

0

Minimum offset 5 = 22.7 µs

10

15

Time (minutes)

Fig. 7.

Power up performance for slave clock from two vendors.

source and destination addresses, MU name (svID) and sample counter (smpCnt). A checksum based on CRC32 is used to match frames received on the two ports, and then the difference in arrival time can be calculated. Other timing tests can be performed by combining the two capture streams and then examining the elapsed time between frames. This is necessary when the message contents do not vary, as the CRC32 matching algorithm requires unique frames. IV. R ESULTS A. PTPv2 Slave Clock Startup Performance Slave clocks vary significantly in their ability to synchronise to a grandmaster when first powered on. Slaves from two different manufacturers were connected to the same grandmaster through a transparent clock and were powered up at the same time. Fig. 7 shows the 1 PPS output from each slave, relative to the grandmaster. The slave clock from Vendor A required 35 s to synchronise and its 1 PPS output was within the 9-2LE specification (±1 µs) immediately. Vendor B’s slave clock required 10 min to stabilise, although it was within the ±1 µs specification at 5 min and exhibited less jitter overall (albeit with an offset). This has ramifications for substation operation after maintenance, especially since Vendor B’s slave clock enabled its 1PPS output when the offset exceeded 20 µs. MU samples would be skewed if these slaves were providing the sampling reference, and may result in deterioration of protection performance (especially for differential protection due to increased spill current). B. Effect of SV on PTPv2 SV data puts some stress on an Ethernet switch, and this results in variation in transit times through the Ethernet switch. The PTPv2 peer-peer transparent clock is designed to compensate for this. A test was performed where eight SV streams were injected into a transparent clock that had two slaves attached, as shown in Fig. 8 (only three SV sources are shown for the sake of clarity). VLAN filtering was used to prevent SV frames from being sent to the PTP slave clocks, and so the jitter variation is most likely to be due to variations in transit

6

5000

Four Switches + 74 m Fibre Slave clock with 1pps output

3000

Frequency

Sampled value sources

Digital oscilloscope

Slave clock with 1pps output and integrated transparent clock

1000

Grandmaster with GPS

0

Fig. 8. Test arrangement to evaluate effect of SV data on PTP performance.

59

60

61

62

63

64

Interframe Time (µs)

Fig. 10.

Frame delay variation with four Ethernet switches.

1PPS Output Same Switch

Wire Mode

−200

0

200

600 0.00

0.15

800

Fixed Delay 2 ms

Frequency

600

200

400

0

200

Frequency

0.10

Fixed Delay 1 ms

0

1.00

1.05

1.10

1.15

1.95

2.00

2.05

2.10

2.15

Interframe Time (ms)

Interframe Time (ms)

Uniform Distribution 1−20 ms

Normal Distribution mean = 10 ms, var = 5 ms

200

Frequency

300

600

0.95

Frequency

0.05

Interframe Time (ms)

0

A test of frame delay measurement was performed by injecting test frames into a switch via a passive tap, and from there to three Ethernet switches connected in a chain. 74 m of fibre optic cable inserted into the Ethernet network provided additional delay. Fig. 10 shows that Ethernet frames took between 60 µs and 63 µs to travel from the source to the destination. This confirms that the alignment of frames from separate captures works and can be used to measure switching latencies when the process bus is heavily loaded. The network emulator selected for this testbed provides a range of impairments that operate at Layer 2, and are therefore suitable for SV and PTP frames. Network timing measurements were used to validate variable delays introduced by the network emulator. Four modes were chosen: wireline (no impairment), uniform delay (1 ms and 2 ms), uniformly distributed delay (1–20 ms) and normally distributed delay (x=10 ms, σ 2 =5 ms). A test stream of SV frames with 100 ms spacing was generated by an Ethernet test set and then injected into the network emulator. Fig. 11 shows the resulting inter-frame times of these

0.15

100

C. Frame Delay Measurement

0.10

0

time. The results of Figs. 7 and 9 suggest stability and responsiveness may be mutually exclusive. The design of the servo-loop in the clock recovery function is a compromise between smoothing out variation in frame arrival times (low frequency) and noise (high frequency), and also affects start-up time [28]. The offset in Vendor A’s slave clock is due to an offset in ITS 1 PPS output system, and the vendor has stated this will be remedied with the firmware release.

0.05

Interframe Time (ms)

800

Fig. 9. Jitter distribution of two slave clocks with eight SV streams on the shared transparent clock.

400

Frequency

0 0.00

600

−400 Jitter (ns)

400

−600

400

−800

200

−1000

200

4000 0

2000

0.004

Frequency

6000

0.008

Vendor A Slave Vendor B Slave

0.000

Density

0.012

PTP with 8x SV Streams

0

5

10

15

20

Interframe Time (ms)

25

0

5

10

15

20

25

30

Interframe Time (ms)

Fig. 11. Inter-frame delay under a variety of emulated delay conditions.

four modes. The ‘Same Switch’ connection bypassed the network emulator and was used to show that the timing variation was not due to the Ethernet switches or the measurement system. The normal distribution is truncated at 0 ms as the network emulator is not capable of transmitting frames before it has received them. These results show that the network emulator creates precisely controlled network delays and that the frame delay measurement system is accurate. V. C ONCLUSIONS This test and evaluation system enables all aspects of an Ethernet process bus incorporating SV, transduced values and digital inputs/outputs to be controlled, and

DAVID INGRAMet al.: TEST AND EVALUATION SYSTEM FOR MULTI-PROTOCOL SAMPLED VALUE PROTECTION SCHEMES

for end-to-end protection performance to be assessed. A scale-model with ‘live’ protection IEDs accounts for unknown factors that cannot be explicitly modelled in software. It is expected that this test bed will yield valuable information regarding the optimum communications architecture for various substation topologies, and will enable the capability limits of Ethernet for various protection schemes to be defined. The novel test bed described here can be used to test new protection and communications designs, for fault investigations and the design of new protection schemes. Results to date show that PTPv2 is a credible option for synchronising IEC 61850-9-2 MUs, but variations in transient and stead-state response between slave clocks will require further investigation. Future work will extend the capability of the test system to include Unified Modeling Language (UML) models of IEC 61850, with the aim of supporting fully automated functional testing of substation protection and control. A digital process bus is a key component of smart substation automation for the smart grid, and enhances safety within substations through the elimination of potentially dangerous currents and voltages in substation control rooms. Knowing the limits of a digital process bus, especially when SV and NCITs are included, will enable utilities to make informed decisions regarding the adoption of this technology. R EFERENCES [1] V. Hamidi, K. S. Smith, and R. C. Wilson, “Smart grid technology review within the transmission and distribution sector,” in Proc. Innov. Smart Grid Tech. Conf. Europe 2010 (ISGTE), Gothenburg, Sweden, 11–13 Oct. 2010, pp. 1–8. [2] D. Tholomier and L. Jones, “Vision for a smart transmission grid,” in Proc. Bulk Pwr Sys. Dyn. Control – VIII 2010 iREP Symp., Rio de Janeiro, Brazil, 1–6 Aug. 2010. [3] SMB Smart Grid Strategic Group. (2010, Jun.) Smart grid standardization roadmap. IEC. [Online]. Available: http:// www.iec.ch/smartgrid/downloads/sg3_roadmap.pdf [4] Office of the National Coordinator for Smart Grid Interoperability, “NIST framework and roadmap for smart grid interoperability standards,” National Institute of Standards and Technology, Gaithersburg, MD, USA, Tech. Rep. NIST SP 1108, Jan. 2010. [Online]. Available: http://www.nist.gov/public_affairs/releases/ upload/smartgrid_interoperability_final.pdf [5] IEC TC57, Communication Networks and Systems for power utility automation – Part 7-4: Basic information and communications structure – Compatible logical node classes and data object classes, IEC 61850-7-4 ed2.0, Mar. 2010. [6] ——, Communication networks and systems in substations – Part 9-2: Specific communication service mapping (SCSM) – Sampled values over ISO/IEC 8802-3, IEC 61850-9-2:2004, Apr. 2004. [7] ——, Communication networks and systems in substations – Part 8-1: Specific communication service mapping (SCSM) – Mappings to MMS (ISO 9506-1 and ISO 9506-2) and to ISO/IEC 8802-3, IEC 61850-8-1:2004, May 2004. [8] ——, Communication Networks and Systems in Substations – Part 5: Communication Requirements for Functions and Device Models, IEC 61850-5:2003, Jul. 2003. [9] M. S. Thomas and I. Ali, “Reliable, fast, and deterministic substation communication network architecture and its performance simulation,” IEEE Trans. Power Del., vol. 25, no. 4, pp. 2364–2370, Oct. 2010. [10] R. E. James and Q. Su, Condition Assessment of High Voltage Insulation in Power System Equipment. Stevenage, UK: The Institution of Engineering and Technology, 1 Feb. 2008.

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[11] P. Forster, V. Ramaswamy, P. Artaxo, T. Berntsen, R. Betts, D. Fahey, J. Haywood, J. Lean, D. Lowe, G. Myhre, J. Nganga, R. Prinn, G. Raga, M. Schulz, and R. V. Dorland, “Changes in atmospheric constituents and in radiative forcing,” in Climate Change 2007: The Physical Science Basis. Contribution of Working Group I to the Fourth Assessment Report of the Intergovernmental Panel on Climate Change, S. Solomon, D. Qin, M. Manning, Z. Chen, M. Marquis, K. Averyt, M. M. B. Tignor, and J. Miller, Henry LeRoy, Eds. Cambridge, UK: Cambridge University Press, 2007, ch. 2. [12] S. Saito, Y. Fujii, K. Yokoyama, J. Hamasaki, and Y. Ohno, “8C1–the laser current transformer for EHV power transmission lines,” IEEE J. Quantum Electron., vol. 2, no. 8, pp. 255– 259, Aug. 1966. [13] S. Kucuksari and G. G. Karady, “Experimental comparison of conventional and optical current transformers,” IEEE Trans. Power Del., vol. 25, no. 4, pp. 2455–2463, Oct. 2010. [14] L. Yang, P. Crossley, X. Sun, M. Redfern, W. An, and H. Grasset, “Protection performance testing in IEC 61850 based systems,” in Proc. 10th IET Int. Conf. Dev. Power Sys. Prot. (DPSP), Manchester, UK, 29 Mar. – 1 Apr. 2010. [15] UCAIug. (2004, 7 Jul.) Implementation guideline for digital interface to instrument transformers using IEC 61850-9-2 R2-1. UCA International Users Group. Raleigh, NC, USA. [Online]. Available: http://iec61850.ucaiug.org/ Implementation%20Guidelines/DigIF_spec_9-2LE_ R2-1_040707-CB.pdf [16] IEC TC38, Instrument transformers – Part 8: Electronic current transformers, IEC 60044-8:2002, Jul. 2002. [17] J.-D. Decotignie, “Ethernet-based real-time and industrial communications,” Proc. IEEE, vol. 93, no. 6, pp. 1102–1117, Jun. 2005. [18] IEEE Instrumentation & Measurement Society, IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, IEEE Std. 1588-2008, 24 Jul. 2008. [19] J. Han and D.-K. Jeong, “A practical implementation of IEEE 1588-2008 transparent clock for distributed measurement and control systems,” IEEE Trans. Instrum. Meas., vol. 59, no. 2, pp. 433–439, Feb. 2010. [20] J. McGhee and M. Goraj, “Smart high voltage substation based on IEC 61850 process bus and IEEE 1588 time synchronization,” in Proc 1st IEEE Int. Conf. on Smart Grid Commun. (SmartGridComm), Gaithersburg, MD, USA, 4–6 Oct. 2010, pp. 489–494. [21] D. Westermann and M. Kratz, “A real-time development platform for the next generation of power system control functions,” IEEE Trans. Ind. Electron., vol. 57, no. 4, pp. 1159– 1166, Apr. 2010. [22] M. G. Kanabar and T. S. Sidhu, “Performance of IEC 618509-2 process bus and corrective measure for digital relaying,” IEEE Trans. Power Del., vol. 26, no. 2, pp. 725–735, Apr. 2011. [23] R. Kuffel, P. Forsyth, H. Meiklejohn, and J. Holmes, “Batch mode operating software for relay test applications of the RTDS simulator,” in EMPD ’98, vol. 1, Singapore, 3–5 Mar. 1998, pp. 356–361. [24] M. Desjardine, P. Forsyth, and R. Mackiewicz, “Real time simulation testing using IEC 61850,” in 2007 Int. Conf. Pwr Sys. Transients (IPST), Lyon, France, 4–7 Jun. 2007, pp. 1–5. [Online]. Available: http://www.ipst.org/techpapers/2007/ipst_ 2007/papers_IPST2007/Session26/177.pdf [25] W. Lewandowski, J. Azoubib, and W. J. Klepczynski, “GPS: Primary tool for time transfer,” Proc. IEEE, vol. 87, no. 1, pp. 163–172, Jan. 1999. [26] L. Thrybom and G. Prytz, “Multicast filtering in industrial Ethernet networks,” in Proc. 8th IEEE Int. Wkshp Fact. Comm. Sys. (WFCS), Nancy, France, 18–21 May 2010, pp. 185–188. [27] J. Mo, J. C. Tan, P. A. Crossley, Z. Q. Bo, and A. Klimek, “Evaluation of process bus reliability,” in Proc. 10th IET Int. Conf. Dev. Power Sys. Prot. (DPSP), Manchester, UK, 29 Mar. – 1 Apr. 2010, pp. 1–5. [28] R. Subrahmanyan, “Timing recovery for IEEE 1588 applications in telecommunications,” IEEE Trans. Instrum. Meas., vol. 58, no. 6, pp. 1858–1868, Jun. 2009.

CHAPTER 4

Evaluation of precision time synchronisation methods for substation applications When a new technology is proposed it is necessary to compare the proposal with the status quo as all change has an associated risk. This risk must be balanced against the benefits that the new technology brings. This chapter presents the results of a benchmarking experiment that compared the performance of Precision Time Protocol (PTP) to existing substation time transfer methods. The strict synchronising performance requirements imposed by sampled value process buses, and path lengths in excess of 500 m between control rooms and high voltage instrument transformers, poses a challenge in large high voltage substations. Compensation of path delay is required when traditional time transfer mechanisms, such as IRIG-B or 1-PPS, are used. The results presented in this chapter show that PTP implemented with the IEEE Std C37.238 Power System Profile effectively compensates for path delay, with no adjustment required by end users, even if the network is reconfigured. The results confirmed that PTP is particularly suited to substation automation retrofits when conventional current and voltage transformer secondary connections are replaced by a process bus. Standalone merging units are best located in the switchyard adjacent to the instrument transformers, and the connections to the control room made over Ethernet. When merging units are installed in the control room, as is the norm for optical CTs, the best performance is achieved with 1-PPS as path is not an issue due to the short cable lengths. In addition, PTP provides a richer dataset, including absolute time and clock identification, than 1-PPS.This information will be needed in the future for cybersecurity, including protection against replay attack. In conclusion, adoption of PTP by utilities will give them the flexibility to install merging units in the most cost-effective location, without the need to manually compensate synchronising signals.

©2012 IEEE. Reprinted, with permission, from D.M.E. Ingram, P. Schaub, D.A. Campbell & R.R. Taylor, “Evaluation of precision time synchronisation methods for substation applications”, 2012 International IEEE Symposium on Precision Clock Synchronization for Measurement, Control and Communication, September 2012.

49

Statement of Contribution The authors listed below have certified* that: 1.

they meet the criteria for authorship in that they have participated in the conception, execution, or interpretation, of at least that part of the publication in their field of expertise;

2.

they take public responsibility for their part of the publication, except for the responsible author who accepts overall responsibility for the publication;

3.

there are no other authors of the publication according to these criteria;

4.

potential conflicts of interest have been disclosed to (a) granting bodies, (b) the editor or publisher of journals or other publications, and (c) the head of the responsible academic unit, and

5.

they agree to the use of the publication in the student’s thesis and its publication on the QUT ePrints database consistent with any limitations set by publisher requirements.

In the case of this chapter: Title

Evaluation of Precision Time Synchronisation Methods for Substation Applications

Conference

2012 International IEEE Symposium on Precision Clock Synchronization for Measurement, Control and Communication (ISPCS). San Francisco, USA.

DOI

10.1109/ISPCS.2012.6336630

Status

Presented, September 2012

Contributor David M. E. Ingram

Statement of contribution* Experimental design, performed experiments, data analysis and drafting the manuscript.

12 October 2012 Duncan A. Campbell

Conception and design of the project, critical revision of the paper.

Pascal Schaub

Experimental design, critical revision of the paper.

Richard R. Taylor

Critical revision of the paper.

Principal Supervisor Confirmation I have sighted email or other correspondence from all co-authors confirming their certifying authorship. Prof Duncan A. Campbell

12 October 2012 Signature

Evaluation of Precision Time Synchronisation Methods for Substation Applications David M. E. Ingram∗ , Pascal Schaub† , Duncan A. Campbell∗ and Richard R. Taylor∗ ∗ School

of Electrical Engineering & Computer Science Queensland University of Technology Brisbane, QLD 4000, Australia email: [email protected]

Abstract—Many substation applications require accurate time-stamping. The performance of systems such as Network Time Protocol (NTP), IRIG-B and one pulse per second (1-PPS) have been sufficient to date. However, new applications, including IEC 61850-9-2 process bus and phasor measurement, require accuracy of one microsecond or better. Furthermore, process bus applications are taking time synchronisation out into high voltage switchyards where cable lengths may have an impact on timing accuracy. IEEE Std 1588, Precision Time Protocol (PTP), is the means preferred by the smart grid standardisation roadmaps (from both the IEC and US National Institute of Standards and Technology) of achieving this higher level of performance, and integrates well into Ethernet based substation automation systems. Significant benefits of PTP include automatic path length compensation, support for redundant time sources and the cabling efficiency of a shared network. This paper benchmarks the performance of established IRIG-B and 1-PPS synchronisation methods over a range of path lengths representative of a transmission substation. The performance of PTP using the same distribution system is then evaluated and compared to the existing methods to determine if the performance justifies the additional complexity. Experimental results show that a PTP timing system maintains the synchronising performance of 1-PPS and IRIG-B timing systems, when using the same fibre optic cables, and further meets the needs of process buses in large substations. Index Terms—Ethernet networks, IEC 61850, IEEE 1588, performance evaluation, power transmission, protective relaying, Precision Time Protocol, smart grids, time measurement

I. I NTRODUCTION The ‘smart grid’ is defined as an umbrella term for technologies that are an alternative to traditional practices in power systems, offering improved reliability, flexibility, efficiency and reduced environmental impact [1]. Much of the smart grid focus has been in electricity distribution, however smart grid applications are now being proposed for the transmission sector. Improved disturbance recording and state estimation through phasor measurement is a goal of the transmission smart grid [2], and a networked process bus improves power network visibility by simplifying the connections required for advanced monitoring systems [3]. Time synchronisation is required in substations for consistent event time-stamping when investigating power system incidents and for some long distance

† Substation

Design, Engineering Powerlink Queensland Virginia, QLD 4014, Australia

protection schemes [4]. More accurate time-stamping, in the order of 1 µs, is now required for phasor monitoring and for digital process buses [5]. New time synchronisation systems, such as IEEE Std 1588 Precision Time Protocol (PTP) [6], are a means of achieving the high level of performance required by these new applications [7], [8]. Substation automation systems generally use IRIG-B [9] and Network Time Protocol (NTP) [10] for distribution of absolute time [11]. One pulse per second (1-PPS) provides an accurate synchronisation reference, but does not include time of day information. IRIG-B and 1-PPS are unidirectional and do not compensate for propagation delay [12]. NTP and PTP are bidirectional network based systems that compensate for network delays. PTP provides master clock traceability and support for redundant master clocks. The International Electrotechnical Commission (IEC) Smart Grid Vision and US National Institute of Standards and Technology (NIST) standardisation ‘roadmaps’ both recommend the use of PTP for high accuracy time synchronisation in substations [13], [14]. PTP also provides flexibility in its implementation. The IEEE Std C37.238 ‘power system profile’ [15] specifies how PTP will be used for power system applications by restricting options and mandating additional data to be transmitted, and is recommended by the NIST roadmap. The same Ethernet network infrastructure can therefore be used for substation protection, monitoring and control, and for time synchronisation. This is of particular benefit when the timing system is installed in a large switchyard. There is a need to consider the performance of established substation timing techniques to see whether these meet the requirements for synchrophasors and process buses, and then to see what additional benefits a PTP system will provide, and at what cost. This paper describes a series of experiments to measure performance of 1-PPS, IRIG-B and PTP using the same communications media, and using the same substation clock devices.

Table I S AMPLED VALUE TIME ACCURACY CLASSES FROM IEC 61850-5.

Figure 1. Transformer differential protection with (a) two merging units and (b) one merging unit and one conventional input.

II. BACKGROUND A. Substation Application The high voltage equipment in a substation (for example bus bars, circuit breakers, isolators, earth switches, power transformers, current transformers and voltage transformers) is referred to as the ‘primary plant’. The control equipment in a substation is termed the substation automation system (SAS), and includes protection, control, automation and monitoring devices. A ‘process bus’ carries sampled value measurements and status information from the primary plant to the SAS, and conveys commands from the SAS to the high voltage circuit equipment (e.g. circuit breakers and transformer tap change controllers), over a digital network. Merging units (MUs) sample the output of conventional current transformers and voltage transformers and transmit this information over the process bus. Secondary converters (SCs) convert the proprietary output of Non-Conventional Instrument Transformers (such as optical or electronic transducers) into a standard form that then connects to the SAS. IEC 61850-9-2 defines an interoperable format for the sampled value output of MUs and SCs using a process bus [16]. Some protection schemes, in particular transformer protection, require inputs from either two or more MUs/SCs, or from process bus and conventional analogue inputs. Intelligent electronic devices (IEDs) require that the current/voltage samples are synchronised. Any synchronising error (regardless of method used) will manifest as phase error, and this in turn gives ‘spill current’ in differential protection schemes, increasing the chance of false tripping. Fig. 1 shows two example configurations where this is required. IEC 61850-9-2 specifies the requirements for an inter-operable process bus. This standard provides significant flexibility in its implementation. The UCAIug Implementation Guideline, commonly referred to as ‘9-2 Light Edition’ (9-2LE), was developed to provide a reduced set of options to simplify implementation and to improve multi-vendor interoperability [17]. B. Synchronisation Requirements Process buses based on IEC 61850-9-2 must meet sampling accuracy requirements specified by IEC 61850-5 [18]. Table I lists the timing classes from IEC 61850-5 ed.1 that are relevant to process bus networks, along with the proposed classes in a draft of IEC 61850-5 ed.2. Protection class P2 is

Protection Class

Required Accuracy

Edition 1 Timing Class

Edition 2 Timing Class

P1

±25 µs

T3

TS3

P2

±4 µs

T4

TS4

P3

±1 µs

T5

TS5

intended for transmission substation bays and class P3 for transmission substation bays with high accuracy requirements. Class P1 is for distribution substations. 9-2LE specifies that one pulse per second (1-PPS) timing pulses with an accuracy not exceeding ±1 µs be used to synchronise MUs and SCs. Up to 2 µs of propagation delay in the synchronising signal is permitted without the need for compensation, giving an overall synchronising error range of –1 µs to +3 µs. This meets the requirements of the T4/TS4 class and allows for some sampling error within the MU or SC. If the propagation delay exceeds 2 µs then location specific compensation is required at the MU or SC, and some manufacturers support this in product available on the market today. A widely adopted standard for phasor measurement, IEEE Std C37.118, specifies a maximum Total Vector Error of 1%, taking into account phase and magnitude [19]. If there is no magnitude error this equates to ±26 µs for a 60 Hz power system and ±31 µs for a 50 Hz power system [5]. Magnitude errors, especially those from instrument transformers, must be allowed for, and so it has been generally agreed that the synchronising accuracy will be no worse than ±1 µs. Outdoor transmission-level substations (typically 110 kV and above) cover a large area, and cable lengths can be significant [8]. IRIG-B can be distributed over copper or fibre optic cables, however the amplitude modulated code used with coaxial cable does not have the accuracy required for process bus synchronisation. Cable runs of 300–500 m are not uncommon in transmission substations, particularly those operating at 275 kV and above [20]. Signal propagation speeds are generally specified in two ways: metallic cables with a velocity factor (VF) specified as a percentage of the speed of light in a vacuum, while for glass fibre, propagation speed is specified in terms of the refractive index of the glass. A Cat 5 twisted pair Ethernet cable has a VF ≈ 66% and multimode silica glass fibre optic cable has n ≈ 1.5 [21]. In each case the unit delay is very close to 5 ns/m. A cable run 500 m long would result in propagation delays in excess of 2.5 µs, requiring the connected MUs or SCs to be compensated. The compensation of each MU/SC will differ, and require detailed knowledge of cable lengths or measurement with an Optical Time Domain Reflectometer (OTDR). C. Absolute Time Transfer The 9-2LE guideline only requires synchronisation (relative time) of MUs or SCs, and not the time of day (absolute time). This is adequate for simple process

Figure 2. Test equipment used for accuracy testing, using a digital oscilloscope to measure pulse delays. Three lengths of fibre optic cable were used (0.7 m, 66 m and 998 m).

bus networks where IEDs are installed in substation control rooms, and are provided with absolute time via IRIG-B or NTP. Absolute time is required in the switchyard for several new applications. The first of these is the adoption of information security standards such as IEC TS 62351-6 that are intended to prevent tampering and replay-attacks of sampled value messages [22]. This level of security will likely be required when process bus connections are used for revenue metering and will take the place of security seals on conventional connections. Absolute time, using the IEC 61850 UTCtime type, ensures each sampled value message has a limited lifetime. The 9-2LE guideline does not include absolute time, but this is an optional attribute in IEC 61850-9-2 (RefrTm, attribute 4). Utilities are starting to install IEDs in the switchyard using suitable protective enclosures. This reduces the size of control rooms and the field cabling required. Synchrophasors require absolute time to enable comparison of measurement between substation, and PTP is the only Ethernet based system that achieves the required accuracy. III. M ETHOD This section describes the experiments that determined the ‘benchmark’ performance of 1-PPS and IRIG-B, as well as PTP performance. Three lengths of fibre optic cable were used to evaluate the effect of propagation delay on synchronising performance. Actual fibre lengths were determined by the printed length markers on the cable sheath. The test method used is an established means of assessing synchronising accuracy of clocks, and is based on 1-PPS electrical outputs of master and slave clocks. A digital oscilloscope (Tektronix DPO2014) sampling at 109 samples/s calculated the time difference (which is referred to as ‘Master-Slave Offset’ in these results) between the reference (master) and slave over a 30 minute period. A computer recorded each measurement (1800 in total for each test) for statistical analysis which is presented in Section IV. Fig. 2 shows this general arrangement, with the ‘cloud’ representing the various synchronising methods under test, and Fig. 3 shows accumulated 1-PPS waveforms for one test where PTP was used for synchronisation. A range of fibre optic cable lengths were used to simulate the variation in distance that occurs in a transmission substation. A short jumper cable (0.7 m long) was used to assess delays in clock outputs and provided

Figure 3. Screen capture of 1-PPS waveforms on the oscilloscope used for measurement. Table II PTP SETTINGS USED FOR EVALUATION TESTS . Parameter Sync Message Rate Announce Message Rate Path Delay Mechanism Path Delay Rate Line Rate Message Type

Setting 1s 1s Peer to Peer 1s 100 Mb/s Layer 2 Multicast

the baseline time for comparing changes in propagation delay. The 66 m cable represents connections within a substation control room or an indoor substation, and the 998 m cable represents a large outdoor substation. Matched length coaxial cables were used to connect the 1-PPS output of the clocks to the oscilloscope. A. One Pulse Per Second The Master A clock transmitted an identical 1-PPS signal on its electrical output and its optical output. A fibre optic receiver was used to regenerate an electrical signal from the received light pulse after it had travelled through the three lengths of fibre optic cable. The short jumper cable enabled any delays introduced by the optical receiver to be measured. B. IRIG-B Two master clocks were used to transmit IRIG-B messages using the ‘B002’ code. The optical output of Master A was used directly to drive the fibre. The other clock (Master B) required a fibre optic transmitter to inject the IRIG-B signal into the fibre optic cables. The same fibre optic receiver used for 1-PPS testing was used to convert the optical IRIG-B signal to an electrical form that was suitable for decoding by the slave clock. C. Precision Time Protocol The settings required by IEEE Std C37.238 were used by all PTP devices, even though they did not explicitly support this profile, and are given in Table II. A PTP transparent clock (TC) was required by one of the master clocks as it had a copper 100BASE-TX Ethernet connection. The TC was used with the other master to ensure consistency. The PTP slave clock had a 100BASE-FX optical interface and was connected directly to the fibre optic cable.

than 2 ns for 1000 m of fibre optic cable. The need for compensation is apparent in Fig. 4, with average delays exceeding 5 µs when a 998 m fibre optic cable is used. B. IRIG-B

Figure 4. One pulse per second (1PPS) synchronising performance with three lengths of fibre optic cable.

The Master A and Master B clocks used for IRIG-B timing were PTP capable, and were used as the grandmasters (GMs) for these experiments. The IRIG-B slave clock also supported PTP and was used to generate a 1-PPS output based on the incoming PTP timing messages. IV. R ESULTS Table III summarises the synchronising performance of the three methods tested. Delays are normalised to those of the 0.7 m cable to highlight  theeffect of path length, and are shown as the mean ∆td and standard deviation (std ). The 1-PPS and IRIG-B results are very close to the predicted delay, with some variation expected as the refractive index of the fibre optic cable was an estimate. Table III S YNCHRONISING PERFORMANCE RESULTS FOR THE THREE METHODS UNDER TEST. Method

66 m Fibre

998 m Fibre

td = 330 ns

td = 4493 ns

1-PPS

∆td = 351 ns std = 0.561 ns

∆td = 5048 ns std = 1.23 ns

IRIG-B Master A

∆td = 361 ns std = 52.3 ns

∆td = 5054 ns std = 52.0 ns

IRIG-B Master B

∆td = 352 ns std = 24.6 ns

∆td = 5015 ns std = 25.6 ns

PTP Master A

∆td = 0.904 ns std = 73.6 ns

∆td = −1.62 ns std = 52.1 ns

PTP Master B

∆td = 21.2 ns std = 26.8 ns

∆td = 34.1 ns std = 30.0 ns

Predicted Delay

Fig. 5 shows the IRIG-B synchronising performance with two master clocks. As with 1-PPS, the mean delay varies linearly with cable length. There is more jitter, and the standard deviation with IRIG-B is approximately 120 times that of 1-PPS. A second IRIG-B master clock was used with the original slave to look for device dependent performance variation. Master B has less jitter in the observed delay than Master A, however the distribution is bimodal. The bimodal nature of IRIG-B synchronisation with Master B was confirmed with a time series plot, as the same distribution may have been created by a step change in the delay. The two minute time series extract in Fig. 6 shows that the 1-PPS delay between the slave and master periodically increases by 50–100 ns. The mechanism for this bimodality is unknown, as the design of the IRIG-B master device is not published by the manufacturer. A possibility is a periodic correction of a phase locked loop. De Dominicis et al. found the majority of IRIG-B pulses in their system were in a 50 ns range [23], whereas the best results presented here (Master B) have an approximate range of 150 ns. The clocks used in this experiment were specifically designed for substation applications and used low cost crystal oscillators (XOs) and temperature compensated crystal oscillators (TCXOs). C. Precision Time Protocol Two series of tests were conducted using PTP for synchronisation; one each with the two GM clocks.

A. One Pulse Per Second Fig. 4 shows the statistical distribution of time difference between the 1-PPS receiver (slave) and transmitter (master) for the three lengths of fibre. Density on the y-axis of the graphs represents the probability distribution of the offset, and is effectively a continuous histogram. The reference delay is 5.8 ns, and this shows that the fibre optic receiver does not introduce a significant delay to the timing pulse. The increase in jitter of approximately two times with the 998 m fibre is of interest. This is most likely due to modal dispersion, as the pulse is monochromatic (wavelength of 850 nm) and multimode fibre was used [21]. The 1-PPS synchronising method yields timing pulses with little jitter, with a standard deviation of less

Figure 5. IRIG-B synchronising performance with three lengths of fibre optic cable and two master clocks. The same slave clock was used for all tests.

Figure 6. Time series of IRIG-B synchronising performance for Master B with 66 m of fibre optic cable.

B. Large Substations

Figure 7. PTP synchronising performance with two grandmaster clocks, each with three lengths of fibre optic cable. The same slave clock was used for all tests.

Fig. 7 shows the synchronising performance with Master A and Master B. As was the case with IRIG-B, Master B (TCXO local oscillator) gave much better performance than Master A (XO local oscillator), with reduced jitter. The results shown in Table III and Fig. 7 demonstrate that path delay compensation was effective with PTP, but there were device dependent fixed offsets in observed delays. A conventional two-port switching media converter was used in place of the TC to assess the requirement for sophisticated networking equipment. 1-PPS synchronising errors in excess of 14 µs were observed. Media converters are often two-port switches, and should not be overlooked in a PTP network. This confirms that all active Ethernet devices in a peerdelay PTP network need to support the peer-delay mechanism required by IEEE Std C37.238. V. D ISCUSSION Table III shows that the mean offset increases linearly. While compensation is possible with some MUs and SCs, this requires access to accurate cable length records or an OTDR to measure distance. This process is time consuming and subject to human error, particularly in large substations. The upper cable length limit, without remote end compensation, is 400 m. It should be noted that any reconfiguration or changes to cabling would require the timing system to be checked for compliance. A. Small Substations All three synchronisation methods examined meet the requirements of 9-2LE (and hence IEC 61850-5) for physically small substations where propagation delay does not exceed the 2 µs guideline. 1-PPS and IRIG-B will still require a separate distribution network. Distribution of these signals with active devices (to reduce the amount of cabling used) is not trivial, as the additional delays created by these devices cannot be measured with an OTDR. If active distribution (for example in tree or cascade topologies) is not used, each MU/SC will require a separate fibre optic cable and a master clock capable of driving all of these cables. When MUs and SCs are mounted in the control room, rather than in the switchyard, this is not an insurmountable problem [24].

The key finding of Table III is that a PTP timing system provides very similar jitter performance to IRIG-B, albeit with significantly reduced offset, using the same clock hardware. PTP also offers the following benefits of an Ethernet-based distribution system: • Reduced cabling. No additional field cabling is required as the Ethernet network used to convey sampled value measurements from the switchyard to the control room is used to carry timing messages from the control room to the switchyard. • Improved redundancy. The Best Master Clock algorithm defined in IEEE Std 1588 allows multiple GM clocks to be placed on a network, with automatic fail-over when either the quality of a GM reduces (e.g. antenna failure) or if the primary GM stops transmission (e.g. network failure). Process bus networks are critically dependent on time synchronisation for normal steady-state monitoring and control, and therefore redundancy is highly desirable. • Path compensation. Large transmission substations may have in excess of 50 MUs, with cable lengths ranging from 10 m to 700 m. Automatic path compensation using the peer to peer delay mechanism reduces time required for commissioning, and handles changes to network topology during operation. The automatic measurement of delay reduces the chance of human error and provides real-time detail of network delays. • Source clock information, such as that required by IEC 61850-9-2 ed.2, is included in PTP messages. This provides traceability of the synchronising source. Cascaded transparent clocks will be required in a substation to build the “tree” connection, and may include bay, diameter (for breaker-and-a-half or double-bus configurations) and voltage level switches. IEEE Std C37.238 requires that the overall error does not exceed 1 µs with sixteen hops, and 800 ns is allocated to the transparent clocks. Testing of transparent clocks for substation applications is the subject of research yet to be published, however other researchers have looked at the performance of transparent clocks in general [25]. A fully corrected PTP system should not have any offset between the grandmaster and slave clocks, however network asymmetry can result in an offset. The Cat 5 network cables used in these experiments were less than 2 m long, and the fibre-optic cable was a two-core design. As a result network based asymmetry would be minimal. Previous testing has shown that the slave clock does exhibit an offset in its 1-PPS output, while its PTP system reports no offset. VI. C ONCLUSIONS This paper has assessed the accuracy of two established substation time synchronisation methods (1-PPS and IRIG-B) to provide a benchmark for PTP. 1-PPS provides the least jitter of any method, but does not

convey absolute time information required for cybersecurity or field based phasor measurement, and does not compensate for path delay. IRIG-B conveys absolute time, but is not capable of passing source clock information that will be required by IEC 61850, does not compensate for path delay, and requires a separate distribution network. PTP overcomes the short-comings of 1-PPS and IRIG-B through a bidirectional protocol. This allows for a comprehensive set of information to be transmitted from the GM to slave clocks. Significant benefits of PTP include automatic path length compensation, support for redundant time sources and the efficiency of a shared network. The results presented in this paper show that these benefits are not at the expense of synchronising performance, and that PTP is suitable for precision synchronisation in substation applications. ACKNOWLEDGMENTS The support of Belden Solutions, Cisco Systems and Meinberg Funkuhren for this research is appreciated. R EFERENCES [1] V. Hamidi, K. S. Smith, and R. C. Wilson, “Smart grid technology review within the transmission and distribution sector,” in Proc. Innov. Smart Grid Tech. Conf. Europe 2010 (ISGTE), Gothenburg, Sweden, 11–13 Oct. 2010, pp. 1–8. [2] D. E. Bakken, A. Bose, C. H. Hauser, D. E. Whitehead, and G. C. Zweigle, “Smart generation and transmission with coherent, real-time data,” Proc. IEEE, vol. 99, no. 6, pp. 928– 951, Jun. 2011. [3] Fangxing Li, Wei Qiao, Hongbin Sun, Hui Wan, Jianhui Wang, Yan Xia, Zhao Xu, and Pei Zhang, “Smart transmission grid: Vision and framework,” IEEE Trans. Smart Grid, vol. 1, no. 2, pp. 168–177, Sep. 2010. [4] A. P. Apostolov, “Requirements for automatic event analysis in substation automation systems,” in IEEE PES Gen. Meet. 2004, Denver, CO, USA, 6–10 Jun. 2004, pp. 1055–1060. [5] C. Brunner and G. S. Antonova, “Smarter time sync: Applying the IEEE PC37.238 standard to power system applications,” in Proc. 64rd Ann. Conf. Prot. Rel. Eng., College Station, TX, USA, 11–14 Apr. 2011, pp. 91–102. [6] IEEE Instrumentation & Measurement Society, IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, IEEE Std. 1588-2008, 24 Jul. 2008. [7] M. Lixia, C. Muscas, and S. Sulis, “Application of IEEE 1588 to the measurement of synchrophasors in electric power systems,” in Proc. 2009 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Brescia, Italy, 12–16 Oct. 2009, pp. 1–6. [8] D. M. E. Ingram, P. Schaub, and D. A. Campbell, “Use of precision time protocol to synchronize sampled value process buses,” IEEE Trans. Instrum. Meas., vol. 61, no. 5, pp. 1173– 1180, May 2012. [9] Range Commanders Council, IRIG Serial Time Code Formats, IRIG Standard 200-04, Sep. 2004. [10] D. L. Mills, Network Time Protocol (Version 4) – Specification, Implementation and Analysis, IETF RFC 5905, Jun. 2010. [Online]. Available: http://tools.ietf.org/html/rfc5905

[11] F. Steinhauser, C. Riesch, and M. Rudigier, “IEEE 1588 for time synchronization of devices in the electric power industry,” in Proc. 2010 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Portsmouth, NH, USA, 27 Sep. – 1 Oct. 2010, pp. 1–6. [12] K. Behrendt and K. Fodero, “The perfect time: An examination of time-synchronization techniques,” in Proc. 33rd Ann. West. Prot. Rel. Conf., Spokane, WA, USA, 17–19 Oct. 2006, pp. 1–19. [Online]. Available: http://www.pes-psrc.org/i/ TP6226_PerfectTime_KB_20050922.pdf [13] SMB Smart Grid Strategic Group. (2010, Jun.) Smart grid standardization roadmap. IEC. [Online]. Available: http:// www.iec.ch/smartgrid/downloads/sg3_roadmap.pdf [14] Office of the National Coordinator for Smart Grid Interoperability, “NIST framework and roadmap for smart grid interoperability standards, release 2.0,” National Institute of Standards and Technology, Gaithersburg, MD, USA, Special Publication 1108R2, Feb. 2012. [Online]. Available: http://www.nist.gov/smartgrid/ upload/NIST_Framework_Release_2-0_corr.pdf [15] IEEE Power & Energy Society, IEEE Standard Profile for Use of IEEE 1588 Precision Time Protocol in Power System Applications, IEEE Std. C37.238-2011, 14 Jul. 2011. [16] IEC TC57, Communication networks and systems in substations – Part 9-2: Specific communication service mapping (SCSM) – Sampled values over ISO/IEC 8802-3, IEC 618509-2:2004, Apr. 2004. [17] UCAIug. (2004, 7 Jul.) Implementation guideline for digital interface to instrument transformers using IEC 61850-9-2 R2-1. UCA International Users Group. Raleigh, NC, USA. [Online]. Available: http://iec61850.ucaiug.org/ Implementation%20Guidelines/DigIF_spec_9-2LE_ R2-1_040707-CB.pdf [18] IEC TC57, Communication Networks and Systems in Substations – Part 5: Communication Requirements for Functions and Device Models, IEC 61850-5:2003, Jul. 2003. [19] IEEE Power Engineering Society, IEEE Standard for Synchrophasors for Power Systems, IEEE Std. C37.118-2005, 21 Oct. 2005. [20] D. M. E. Ingram, D. A. Campbell, and P. Schaub, “Use of IEEE 1588-2008 for a sampled value process bus in transmission substations,” in Proc. IEEE Int. Instrum. Meas. Technol. Conf. 2011 (I2MTC), Hangzhou, China, 10–12 May 2011, pp. 871– 876. [21] G. P. Agrawal, Fiber-Optic Communication Systems, 3rd ed. New York, NY, USA: John Wiley & Sons, Inc., 2002. [22] IEC TC57, Power systems management and associated information exchange – Data and communications security – Part 6: Security for IEC 61850, IEC TS 62351-6 ed.1, Jun. 2007. [23] C. M. De Dominicis, P. Ferrari, A. Flammini, S. Rinaldi, and M. Quarantelli, “On the use of IEEE 1588 in existing IEC 61850-based SASs: Current behavior and future challenges,” IEEE Trans. Instrum. Meas., vol. 60, no. 9, pp. 3070–3081, Sep. 2011. [24] P. Schaub, J. Haywood, D. M. E. Ingram, A. Kenwrick, and G. Dusha, “Test and evaluation of Non Conventional Instrument Transformers and sampled value process bus on Powerlink’s transmission network,” in CIGRÉ Sth East Asia Prot. Autom. Conf. 2011 (SEAPAC), Sydney, Australia, 10–11 Mar. 2011, pp. 1–18. [Online]. Available: http://eprints.qut.edu.au/40921/ [25] R. Zarick, M. Hagen, and R. Bartoš, “Transparent clocks vs. enterprise Ethernet switches,” in Proc. 2011 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Munich, Germany, 12–16 Sep. 2011, pp. 62–68.

CHAPTER 5

Use of precision time protocol to synchronise sampled value process buses The studies detailed in Chapter 4 demonstrated that the Precision Time Protocol (PTP) is an effective means of transferring time in substations, and was unique in its ability to automatically compensate for path delay. This chapter presents a more detailed evaluation of PTP performance by considering steady-state and transient performance, and is an extension of the conference paper included in this thesis as Appendix A. PTP time transfer with message passing over Ethernet is a compromise between estimating slave clock rate errors (less frequent is better), changing network conditions (more frequent is better) and network traffic (less frequent is better). The PTP peer to peer delay mechanism, required by the IEEE Std C37.238 Power System Profile reduces the impact of network traffic on synchronising performance and decouples slave devices from the grandmaster. The synchronising message rates in a PTP test system were varied in this work to assess the synchronising error between a grandmaster and slave clock. Comparison of one pulse per second (1-PPS) outputs from PTP clocks are an established means for assessing PTP performance, and were used in this study as this reflects the interface between a slave clock and a merging unit. A number of experiments presented in this chapter identify weaknesses in PTP slave clock designs. These include offsets in the 1-PPS output that reduce the capacity of the system to accommodate variation before exceeding performance limits. The transient performance of slave clocks is not defined by international standards. This manifests as synchronising error at start-up when a slave clock activates its output before it is fully synchronised and in the dynamic response to step changes in time transmitted by grandmaster clocks. The key recommendation of this chapter is for system integrators to select a grandmaster clock with an extremely stable internal oscillator. The experimental results show that this will reduce the drift experienced during primary time reference (e.g. GPS) outages, and therefore limit the size any corrections back to the reference time. The results presented in this chapter provide an independent evaluation of grandmaster clock accuracy reports with GPS antenna outages for the first time. Accurate self-reporting of clock quality is critical for the correct operation of PTP redundancy; however not all grandmasters performed well. This confirms the need to validate the behaviour of PTP devices as part of a product selection process. ©2012 IEEE. Reprinted, with permission, from D.M.E. Ingram, P. Schaub & D.A. Campbell, “Use of precision time protocol to synchronise sampled value process buses”, IEEE Transactions on Instrumentation and Measurement, May 2012.

57

Statement of Contribution The authors listed below have certified* that: 1.

they meet the criteria for authorship in that they have participated in the conception, execution, or interpretation, of at least that part of the publication in their field of expertise;

2.

they take public responsibility for their part of the publication, except for the responsible author who accepts overall responsibility for the publication;

3.

there are no other authors of the publication according to these criteria;

4.

potential conflicts of interest have been disclosed to (a) granting bodies, (b) the editor or publisher of journals or other publications, and (c) the head of the responsible academic unit, and

5.

they agree to the use of the publication in the student’s thesis and its publication on the QUT ePrints database consistent with any limitations set by publisher requirements.

In the case of this chapter: Title

Use of Precision Time Protocol to Synchronise Sampled Value Process Buses

Publication

IEEE Transactions on Instrumentation & Measurement

DOI

10.1109/TIM.2011.2178676

Status

Published, May 2012 (vol. 61, no. 5, pp. 1173–1180)

Contributor David M. E. Ingram

Statement of contribution* Experimental design, performed experiments, data analysis and drafting the manuscript.

12 October 2012 Duncan A. Campbell

Conception and design of the project, critical revision of the paper.

Pascal Schaub

Conception and design of the project, critical revision of the paper.

Principal Supervisor Confirmation I have sighted email or other correspondence from all co-authors confirming their certifying authorship. Prof Duncan A. Campbell

12 October 2012 Signature

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1

Use of Precision Time Protocol to Synchronise Sampled Value Process Buses David M. E. Ingram, Senior Member, IEEE, Pascal Schaub, Member, IEC TC57 WG10, and Duncan A. Campbell, Member, IEEE,

Abstract—Transmission smart grids will use a digital platform for the automation of high voltage substations. The IEC 61850 series of standards, released in parts over the last ten years, provide a specification for substation communications networks and systems. These standards, along with IEEE Std 1588-2008 Precision Time Protocol version 2 (PTP V 2) for precision timing, are recommended by the both IEC Smart Grid Strategy Group and the NIST Framework and Roadmap for Smart Grid Interoperability Standards for substation automation. IEC 61850, PTPv2 and Ethernet are three complementary protocol families that together define the future of sampled value digital process connections for smart substation automation. A time synchronisation system is required for a sampled value process bus, however the details are not defined in IEC 61850-9-2. PTP V 2 provides the greatest accuracy of network based time transfer systems, with timing errors of less than 100 ns achievable. The suitability of PTP V 2 to synchronise sampling in a digital process bus is evaluated, with preliminary results indicating that steady state performance of low cost clocks is an acceptable ±300 ns, but that corrections issued by grandmaster clocks can introduce significant transients. Extremely stable grandmaster oscillators are required to ensure any corrections are sufficiently small that time synchronising performance is not degraded. Index Terms—Ethernet networks, IEC 61850, IEEE 1588, performance evaluation, power transmission, protective relaying, PTP, smart grids, time measurement

ACRONYMS GOOSE IED MU 1PPS PTP V 2 SV TAI

Generic Object-Oriented Substation Event Intelligent Electronic Device Merging Unit One pulse per second Precision Time Protocol version 2 Sampled Values International Atomic Time I. I NTRODUCTION

HE ‘smart grid’ has been defined as an umbrella term for technologies that are an alternative to the traditional practices in power systems, with the following benefits: reliability, flexibility, efficiency and environmentally friendly operation [1]. It is the novelty in the way that tasks are implemented that signifies the smart grid, and some suggest strongly that the

T

D. Ingram and D. Campbell are with the School of Engineering Systems, Queensland University of Technology, Brisbane, Queensland 4000, Australia (email: [email protected]rg; [email protected]). P. Schaub is with Powerlink Queensland, Virginia, Queensland 4014, Australia (email: [email protected]).

Fig. 1.

Substation equipment definitions.

smart grid should not be used to emulate existing systems, but should be used to promote new thinking, particularly with regard to protection schemes [2]. Sampled value (SV) process buses are a means of achieving this [3], and the benefits of a digital process bus have been well documented in the literature [4]– [6]. Full scale process bus based substations have been commissioned in China, and more are under construction [7]. The IEC Smart grid vision standardisation ‘roadmap’ identifies the IEC 61850 series of standards to be key components of substation protection, automation and control for the transmission smart grid [8]. The objective of substation automation standardisation with IEC 61850 is to provide interoperable communication standards that meets existing needs, while supporting future developments as technology improves. The primary plant in a substation is the high voltage equipment and includes bus bars, circuit breakers, isolators, power transformers, current transformers (CTs) and voltage transformers (VTs). The control equipment, the ‘intelligence’ in a substation, is termed the Substation Automation System (SAS), and includes protection, control and automation devices. The links between the primary plant and SAS are called ‘process connections’, and are generally copper multi-core cables with analogue voltages and currents (typically 110 VAC and 1 AAC respectively in Australia), or digital signals based on switching battery voltage (typically 125 VDC in Australia). Fig. 1 shows this diagrammatically for a double-bus feeder bay in a 132 kV transmission substation. The GOOSE (defined in IEC 61850-8-1) and SV (defined in IEC 61850-9-2) protocols are ‘Specific Communication Service Mappings’ and provide tangible interfaces to the abstract data model that underlies

2

IEC 61850 based systems [9], [10]. GOOSE is primarily used to transmit binary data such as indications, alarms and tripping signals, but can also be used to transmit transduced analogue values. SV is currently used to send instantaneous current and voltage samples from CTs and VTs to the SAS, but may be used to send Boolean or transduced data in the future. A digital process bus carries information from the primary plant to the SAS (such as voltage and current samples, transformer temperature and circuit breaker status), and from the SAS to the primary plant (for example circuit breaker tripping and closing commands) over a digital network — it is not just the one-way flow of sampled CT and VT data. All likely protocols need to be considered (GOOSE, SV and PTP V 2) in the design of a shared network process bus, especially the way in which they may interact. GOOSE and SV specify Ethernet as the transport protocol, and define structures and encoding schemes (ASN.1) that ensure that data can be exchanged between devices in an inter-operable fashion. GOOSE data typically updates tens of times per second and for intermittent events, while SV is more suited to thousands of updates per second. GOOSE and SV have been designed for the rapid publication of information to many subscribers. This is achieved through connection-less multicast (one to many) addressing of data packets to implement the publisher/subscriber transfer model. A Merging Unit (MU) collects (from digital systems) or samples (from analogue systems) the output of three or four CTs and VTs (neutral measurements are often omitted) and transmits this information in a standardised form. MUs throughout a substation must accurately time stamp each sample if Intelligent Electronic Devices (IEDs), such as protection relays, use SV data from multiple MUs (through the use of time alignment of samples in buffer memory). This concept has been termed ‘relative temporal consistency’ by Decotignie [11]. An example of the digital process bus connections in a breaker-and-a-half ‘diameter’ is given in [12]. IEC 61850-9-2 details how SV data shall be transmitted over Ethernet, but does not explicitly define what information should be transmitted, nor at what rate. In an attempt to reduce the complexity and variability of implementing SV process buses complying with IEC 61850-9-2, an implementation guideline was developed in 2004 by the UCA International User Group (UCAIug) that is commonly referred to as ‘9-2 Light Edition’ or ‘9-2LE’ [13]. This guideline specifies the data sets that are transmitted, sampling rates, time synchronisation requirements and physical interfaces. The physical interface for time synchronisation in 9-2LE is based upon the one pulse per second (1PPS ) signals defined in IEC 60044-8 [14]. The ±1 µs accuracy requirement of 9-2LE is derived from the T4 timing class in IEC 61850-5 [15] (overall timing error within ±4 µs) when propagation delays and sampling errors are considered. The T4 class is intended for use with protection class P2 (transmission bays) and

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metering class M1 (class 0.5 and up to the 5th harmonic). A higher time performance class, T5, exists for protection class P3 (transmission bay with high performance synchronising) and metering classes M2 (class 0.2 and up to 13th harmonic) and M3 (up to the 40th harmonic). The overall accuracy requirement for T5 is ±1 µs, and this is the ‘stretch target’ for substation timing systems. The same smart grid strategy that proposes IEC 61850 for substation automation and control recommends the use of IEEE Std 1588-2008, version 2 of the Precision Time Protocol (PTP V 2) [16], for high accuracy time synchronisation in substations. Annex F of IEEE Std 1588-2008 defines a mapping for PTP V 2 over Ethernet using multicast messages. The IEEE Std C37.238 ‘power system profile’ specifies how PTP V 2 will be used for power system applications, requires that Annex F be used with this profile [17]. The same data network infrastructure can therefore be used for SV, GOOSE and for time synchronisation. The combination of multicast GOOSE and SV messages for substation automation and multicast PTPV2 messages means that these protocols can affect one another, especially if the default settings for VLAN tagging are used (VID of 0). Much of the research into the application of PTP and PTPv2 has been in the areas of industrial automation [18], telecommunications [19] and audio-video bridging [20]. It is only in recent years that power system applications have been investigated. Most of the power systems work to date has focused on phasor measurement [21], [22]. Some groups are investigating applications of PTP V2 for substation automation [23], [24], but only recently has the application of PTPv2 to SV process buses been discussed and reported upon [7], [25], [26]. The work in this paper extends that of De Dominicis et al. [23] by focusing on the SV process bus application, and by looking at the effect of outages in the timing system. The PTP V 2 testbed for power system applications described by Amelot et al. did not examine grandmaster holdover and recovery from loss of GPS synchronisation [27], but is investigated by this paper, which is a technical extension of [12]. The paper is organised in the following manner. Section II describes the use of PTP V 2 for SV time synchronisation. Section III presents the test methodology that was used, with the results shown in Section IV. Conclusions are discussed in Section V. II. U SE OF PTP V 2 FOR S AMPLED VALUE T IME S YNCHRONISATION It is expected that most master clocks in substations will be synchronised to International Atomic Time (TAI) via the GPS constellation, as GPS is an excellent tool for time transfer [28]. Outdoor transmission-level substations (typically 110 kV and above) cover a large area of land and cable lengths are significant. IRIG-B can be distributed over copper or fibre optic cables, but requires individual

DAVID INGRAM et al.: USE OF IEEE 1588 PRECISION TIME PROTOCOL FOR SUBSTATION AUTOMATION AND PROTECTION

calibration of each MU [23]. 1PPS distributed over a dedicated fibre optic cable network is recommended in 9-2LE, but this does not contain the absolute time information that is required by the data security techniques specified in IEC TS 62351-6 to prevent ‘replay’ attacks of GOOSE and SV traffic [29]. 1PPS systems do not automatically compensate for propagation delay as transmissions are unidirectional. A typical ‘general arrangement’ diagram of an urban transmission substation is shown in [12]. The longest cable distance from the control building to an instrument transformer at this site is approximately 420 m, and this would result in propagation delays in excess of 2 µs for fibre optic cable (velocity factor of 0.62). Cable runs of 300–400 m are not uncommon in transmission substations. PTP V 2 provides a means of distributing time across a substation that compensates for propagation delay and provides absolute time. A. Generation of 1PPS Signal by a PTP V 2 Time Slave PTP V 2 slave clocks that can generate a 1PPS signal are available from many suppliers. MUs can use this 1PPS signal as if it was generated from a GPS or IRIGB receiver, but will not experience the propagation delays associated with distant time sources. 9-2LE requires MUs to compensate for propagation delay if this exceeds 2 µs and this is supported by several manufacturers, but this is not an issue for locally generated 1PPS signals. B. Native Support for PTP V 2 in Merging Units Native support of PTP V 2 is desirable as most of the extra data available with PTP V 2 is lost with 1PPS, including accuracy information, absolute time and date (which could be incorporated into SV or synchrophasor messages) and details of the clock source. MUs are now available in the marketplace that have native support for PTP V 2 and this avoids the need for an external slave clock [7], [30]. A disadvantage with in-built PTP V 2 slaves is that there is no longer an external timing signal that can be used to analyse the response of the slave, and so all work in this paper uses standalone slave clocks with 1PPS outputs. Packet capture based analysis can look at network performance, but it does not reveal the internal synchronisation performance of slave clocks. Integrating the slave clock function into the MU should lead to increased reliability as there are fewer components. The complexity and number of devices required in a digital Process Bus and its effect on reliability has been widely studied [31], [32]. III. T EST M ETHOD Jitter is defined in ITU-T G.810 as “the shortterm variations of the significant instants of a timing signal from their ideal positions in time”, and wander is defined in the same standard as “the long-term variations of the significant instants of a digital signal from their ideal position in time” [33].

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Fig. 2. Experimental arrangement to assess performance of PTP V 2 with directly connected grandmaster and slave. 2.00 V/div C1 - Grandmaster (reference)

C3 - Slave clock

C4 - Reference GPS 1.00 μs/div

Fig. 3. Sample captures from oscilloscope based pulse delay measurement.

Tests were performed with commercially available PTP V 2 clocks to determine whether PTP V 2 is a viable source of 1PPS timing signals for MUs. These tests examined the steady-state and dynamic performance of slave clocks, with particular emphasis on recovery from contingencies. Fig. 2 illustrates the equipment used to measure the jitter and wander of 1PPS outputs from a slave clock directly connected to a grandmaster, representing the best case scenario. The GPS reference clock provided a 1PPS signal synchronised to TAI at all times and allowed the wander of the grandmaster to be measured when its GPS antenna was disconnected. This technique is similar to that described in [34]. Automatic pulse delay measurements were made with an oscilloscope (LeCroy WaveSurfer 424) sampling the 1PPS outputs of the grandmaster clock and slave clocks, which is an established technique [35], [36]. The sampling rate was 109 sample/s, with a timebase accuracy of 10 ppm. The record depth was 200 000 samples per channel, giving a pulse delay measuring range of ±100 µs with 1 ns precision. The oscilloscope was computer controlled, with a standard configuration sent to the oscilloscope at the start of each test. Fig. 3 is a sample of the 1PPS waveforms captured by the oscilloscope, with infinite persistence to visualise the jitter on screen during the test. Pulse delay measurements were transferred to the PC after each 1PPS pulse for detailed statistical analysis. It is the intent of a SV process bus to use a common Ethernet network for SV data and for PTP V 2 synchronisation, and therefore Ethernet switches will be needed to connect MUs and slave clocks in the field, and to connect IEDs and grandmaster clocks at the control room. This was achieved through the use

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A Grandmaster with GPS and 1pps output

Slave clock with 1pps output

B

C Grandmaster with GPS

Transparent clock

Transparent clock

Fig. 5. Jitter observed between 1PPS outputs of a grandmaster and slave, using peer-peer path delay and one-step operation. TABLE I A NALYSIS OF DIRECTLY CONNECTED PTP V 2 CLOCK JITTER .

Slave clock with 1pps output Slave clock with 1pps output and integrated transparent clock

Fig. 4.

Network topologies for PTP jitter evaluation.

of peer-peer transparent clocks, as mandated in the C37.238 power system profile. The Ethernet network topology was varied to assess the effect of transparent clocks on synchronising performance. Initial tests were performed without the use of any transparent clocks so as to avoid the effect of any other network traffic. Fig. 4 shows the network topology for (A) direct connection, (B) one transparent clock and (C) three transparent clocks. The accuracy and timeliness of PTP announce messages were assessed by capturing all PTP V 2 messages with Wireshark [37] while the wander tests were performed. A script was written for Wireshark to extract the grandmasterClockQuality.clockClass and grandmasterClockQuality.clockAccuracy fields from each announce message, and then save these to a file for further analysis. Detailed satellite visibility information was logged directly from the grandmaster clock’s GPS receiver through a dedicated RS232 connection. IV. R ESULTS Jitter and wander were the two performance indicators considered, with jitter being of most interest with the system intact, while wander was of more importance during contingency events. A. Steady State Performance PTP V 2 provides flexibility in how the synchronisation system will operate and a key parameter is synchronisation message rate (although this can be restricted by a PTP V 2 profile). The results presented here show that less frequent synchronising messages resulted in less jitter. Fig. 5 shows the tails of 1PPS jitter probability density observed over one hour intervals with sync message rates ranging from once every

Message Rate

x

σ

Range

0.5 Sync/s

-21 ns

63 ns

-246 to 212 ns

1 Sync/s

-14 ns

65 ns

-313 to 296 ns

2 Sync/s

-5 ns

82 ns

-516 to 646 ns

4 Sync/s

-9 ns

67 ns

-317 to 534 ns

8 Sync/s

-13 ns

68 ns

-431 to 562 ns

16 Sync/s

-5 ns

102 ns

-556 to 645 ns

two seconds through to sixteen times per second. In each case, the grandmaster and slave were directly connected to each other with a cross-over Ethernet cable to remove any influence from other network traffic. Peerpeer delay requests and grandmaster announcements were set to 2 s intervals and one-step operation was used. Table I shows that the mean jitter is very close to zero for this combination of grandmaster and slave and that the standard deviation of jitter is between 60 ns and 70 ns for most sync message rates. The variation between rates is most apparent in the extremities of observed jitter. The final PTP V 2 power profile has since explicitly restricted sync, announce and peerdelay messages to once per second, and the results here support this decision. Scheiterer et al. suggested that less frequent updates allow a slave clock to better estimate its rate correction factor (RCF) used for local oscillator compensation, and this would improve performance when clock aging was not an issue [18]. The best performance was found to be with a synchronising message sent every one or two seconds, which is contrary to results presented by Amelot et al. [27]. Amelot used slave clocks with high performance TXCO local oscillators, whereas the slave clocks in this study used low cost crystal oscillators (XO) without compensation. An XO oscillator may naturally deviate further from its nominal frequency, and so improved RCF estimation through less frequent updates may outweigh the noise reduction a faster update rate would provide. Best case jitter was approximately ±300 ns, and for much of the time was less than ±200 ns. This meets the requirements of 9-2LE, and future work

DAVID INGRAM et al.: USE OF IEEE 1588 PRECISION TIME PROTOCOL FOR SUBSTATION AUTOMATION AND PROTECTION

Fig. 6. Steady state comparison of two slave clocks as a time series and probability density.

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Fig. 7.

Effect of transparent clocks on jitter offset.

Fig. 8.

Power up performance for slave clock from two vendors.

will determine whether this is achievable with a larger timing network and in the presence of SV network traffic (up to 5.4 Mbit/s per MU). The steady state performance of two makes of slave clock were examined to look for performance variation between vendors. The probability density plot in Fig. 6 shows a noticeable difference, with Vendor B’s clock having less jitter, albeit with an offset in its 1PPS output. B. Effect of Transparent Clocks The effect of adding peer-peer transparent clocks to the timing network was material, with the average synchronising error increasing by more than 500 ns for some slaves. The spread of jitter also increased, but not significantly. Ethernet cables were less than 2 m long, limiting propagation delay to no more than 10 ns, and so the pulse output offset is largely the effect of transparent clocks. Fig. 7 shows that the 1PPS offset between the grandmaster and both makes of slave clock increases as the number of transparent clocks used increases. The mean jitter remains constant over the 30 minute observation period, and does not show the convergence modelled by Fontanelli and Macii [38]. Variation in bridge delay may limit the ability of the PTP system to completely compensate for delays introduced by transparent clocks. The follow-up message correction field contains estimates of the bridge and link delays between the grandmaster and that point, therefore, if the bridge delays vary, the correction field may not be accurate. Adoption of one-step operation where the sync message is modified as it passes along the bridges would ensure the delay estimate is as current as possible. The effect of transparent clocks on time error is likely to be more of an issue when the transparent clocks are passing SV messages, as this effects bridge delay. Further investigation of these interactions would be required. This is a concern as PTP V 2 based timing networks for substations as these may incorporate several levels of transparent clock, ranging from the bay level up to the station level. The combination of three transparent clocks and an offset in 1PPS output from Vendor B is pushing the upper limits of jitter close to the ±1 µs

limit specified by 9-2LE. The presence of SV network traffic is expected to increase jitter and will be the subject of further research. Peer-peer transparent clocks are specified instead of standard Ethernet switches for their ability to compensate for switching and network delays, but this cannot be at the expense of increased timing error for 1PPS outputs.

C. Power On Performance Slave clocks vary significantly in their ability to synchronise to a grandmaster when first powered on. Slave clocks from two vendors were connected to the same grandmaster with a transparent clock, and were powered up at the same time. Fig. 8 shows the 1 PPS output from each slave, relative to the grandmaster. The slave clock from Vendor A required 35 s to synchronise and its 1 PPS output was within the 9-2LE specification (±1 µs) as soon as it was activated. Vendor B’s slave clock required 10 minutes to stabilise, although it was within the ±1 µs specification at 5 minutes and exhibited less jitter overall (albeit with an offset). This has ramifications for substation operation after maintenance, especially since Vendor B’s slave clock enabled its 1PPS output when the offset exceeded 20 µs. MU samples would be skewed if these slaves were providing the sampling reference, and may result in deterioration of protection performance (especially for differential protection).

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Fig. 9. Wander between PTP V 2 grandmaster and slave when the network connection was broken.

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Fig. 10. Slave clock jitter when grandmaster reacquires GPS lock after an outage.

D. Loss of Network between Grandmaster and Slave The effect on time synchronisation when a slave clock loses its connection to the grandmaster was investigated. This may occur due to network cabling faults or a failure of the grandmaster. The Best Master Clock (BMC) algorithm is intended to deal with loss or degradation of a grandmaster, but does not deal with a network failure at a slave [16]. The slave and grandmaster were synchronised with one PTP message per second and then the network cable between the two was disconnected. The slave was configured to keep generating its 1PPS output using its internal oscillator by using a long holdover time. Fig. 9 shows wander can vary in sign and magnitude. The slope varied between 10 ns/s and 20 ns/s, giving approximately 35 s of operation before the ±1 µs limit of 9-2LE was reached (based on an initial worst case jitter of 300 ns). This is useful information when setting appropriate holdover times. The transient responses of slave clocks recovering from a local network outage are presented in [12]. The internal oscillators in the grandmaster and slave clocks used for this experiment are low-cost crystal oscillators. Use of temperature controlled oscillators (TXCO) or oven controlled oscillators (OCXO) would improve performance, but at increased expense. Amelot et al. found that the worst case wander for slaves with TXCO local oscillators was 10 ns/s [27], however Scheiterer et al. concluded that a costly master has a much larger benefit compared to spreading the same expense across the slave clocks (which would be numerous in a transmission substation) [18]. E. Loss of Grandmaster GPS Synchronisation A clear view of the sky is required for optimum GPS reception as the satellites move in low earth orbit. There are times where building shading that reduces the viewable area of the sky may result in a GPS receiver losing synchronisation to TAI. The internal oscillator will wander from TAI, with the wander rate dependent upon the oscillator’s stability [18]. The alternate-master election system using the BMC algorithm is intended to deal with degraded accuracy of a grandmaster, but there is still a disturbance in

slave clock 1 PPS outputs as sync is achieved with the alternate master [25]. Substation protection redundancy normally precludes interconnection of redundant devices, preferring instead to duplicate systems and operate these independently. Loss of lock between the grandmaster and the GPS system was identified as a problem during this investigation when the 1 PPS output of the slave clock exhibited large excursions for no obvious reason. Data logging from the GPS receiver showed that the jumps occurred when the GPS receiver reacquired lock, as illustrated in Fig. 10 at the time point 170 s. This effect was recreated by disconnecting the GPS antenna on the grandmaster and observing the wander between its 1PPS output and that of a reference GPS. The wander was allowed to reach 1 µs and 4 µs before the antenna was reconnected. Fig. 11 shows the behaviour slave clocks when the grandmaster recovers synchronisation with TAI after a wander of 1 µs with two makes of slave clock. Two separate recoveries from approximately 4 µs of grandmaster time error, with different vendors, are shown in Fig. 12. The PTP sync message was sent once per second in all tests. The step and oscillation in synchronism are not acceptable for a SV based protection system and must be addressed, and the difference in response between vendors is a major concern. The under-damped behaviour of Vendor A’s slave clock and the over-damped behaviour of Vendor B’s clock mean that there will be times where the sign of the jitter will be opposite, increasing the sampling error between the MUs synchronised by the slave clocks. One solution to this problem is to use a highly stable internal oscillator in the grandmaster, such as an OCXO or temperature compensated rubidium (Rb) cell, to reduce the wander from TAI when synchronisation with the GPS system is lost. These typically have four (OCXO) or six (Rb) orders of magnitude better stability than uncompensated crystal oscillators [39]. There are typically one or two master clocks in a substation, and so the use of a PTP V 2 grandmaster with an extremely stable oscillator can be justified both economically and technically, as this allows low-cost

DAVID INGRAM et al.: USE OF IEEE 1588 PRECISION TIME PROTOCOL FOR SUBSTATION AUTOMATION AND PROTECTION

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Fig. 11. Simultaneous measurement of slave clock jitter after 1 µs TAI recovery with two different clocks.

Fig. 13. Grandmaster announce message accuracy reports with loss and recovery of GPS signal.

next announce message (fixed at 1-s intervals with the PTP V 2 power system profile). A time correlated record of the number of GPS satellites used in the timing system shows that the PTP subsystem is updated immediately. Measurement error from the reference GPS contributes to the discrepancy between the observed drift and estimated accuracy below 1 µs. V. C ONCLUSIONS

Fig. 12. Slave clock jitter after recovery from approximately 4 µs error from TAI (separate observations).

slave clocks with uncompensated oscillators to be used in field devices. This supports Scheiterer’s conclusions regarding investment in the master clock rather than the slaves. F. PTP Accuracy Reporting PTP V 2 grandmaster clocks report their estimated accuracy in announce messages. This experiment measured the absolute error between a grandmaster clock and a synchronised GPS while the grandmaster’s GPS antenna was removed and then reconnected. Fig. 13 shows that the grandmaster conservatively reports its accuracy while it is in holdover mode, and that synchronisation to the GPS system is reported in the

The results presented demonstrate that PTP V 2 is a viable method of providing time synchronisation for a sampled value process bus using IEC 61850-9-2, in particular 9-2LE. The best case timing jitter with directly connected low-cost PTP V 2 clocks is shown to be ±300 ns. It has been discovered that the use of transparent clocks does impact the PTP V 2 timing system, with sampling errors increasing as transparent clocks are added to the system. Further research is required to identify the source of this fixed offset and to eliminate it, which in turn may allow the synchronising pulse specification of 9-2LE to be relaxed to ±2 µs. This would reduce the cost and complexity of implementing PTP V 2. This work has investigated the transient response of slave clocks to corrections transmitted by grandmasters when recovering from a time error. The magnitude of the slave response is almost identical in magnitude and sign as the correction experienced by the grandmaster, but the transient response varies significantly between makes of slave clock. Stabilisation after a correction event takes tens of seconds, during which time the synchronising signals for MU will be outside the specified limits. The wander from TAI experienced by a grandmaster when GPS synchronisation is lost is a significant concern, and while such wander cannot be eliminated, minimisation through the use of grandmasters with extremely stable internal oscillators is recommended.

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The design of slave clocks plays an important part in the performance of a PTP system. The servoloop in the clock recovery function is a compromise between low jitter levels during steady state operation and having a fast transient response to deal with time corrections from grandmasters. Variations in the implementation of slave clocks may preclude a standardised servo response, but a description of slave clock characteristics by vendors would assist in the selection of the most appropriate product. These variations become largely irrelevant when the root cause of step changes in time, grandmaster wander, is reduced to an acceptably small level through the use of highly stable internal oscillators. A digital process bus is an important building block for the transmission smart grid as it enables interoperable use of digitised primary voltages and currents, transduced signals and digital I/O. IEEE Std 1588-2008 and IEEE Std C37.238 will facilitate the adoption of this technology, but more work is required to understand, and then standardise, its behaviour before it can be widely and routinely implemented in transmission substations. R EFERENCES [1] V. Hamidi, K. S. Smith, and R. C. Wilson, “Smart grid technology review within the transmission and distribution sector,” in Proc. Innov. Smart Grid Tech. Conf. Europe 2010 (ISGTE), Gothenburg, Sweden, 11–13 Oct. 2010, pp. 1–8. [2] D. Tholomier and L. Jones, “Vision for a smart transmission grid,” in Proc. Bulk Pwr Sys. Dyn. Control – VIII 2010 iREP Symp., Rio de Janeiro, Brazil, 1–6 Aug. 2010. [3] Fangxing Li, Wei Qiao, Hongbin Sun, Hui Wan, Jianhui Wang, Yan Xia, Zhao Xu, and Pei Zhang, “Smart transmission grid: Vision and framework,” IEEE Trans. Smart Grid, vol. 1, no. 2, pp. 168–177, Sep. 2010. [4] A. P. Apostolov, “IEC 61850 based bus protection – principles and benefits,” in IEEE PES Gen. Meet. 2009, Calgary, Canada, 26–30 Jun. 2009. [5] D. Chatrefou, “Digital substation; application of process bus,” in Proc. Int. Prot. Test. Symp. 2010 (IPTS), Salzburg, Austria, 14–15 Oct. 2010, pp. 13.1–13.4. [6] M. Zadeh, T. Sidhu, and A. Klimek, “Suitability analysis of practical directional algorithms for use in directional comparison bus protection based on IEC61850 process bus,” IET Gener. Transm. Distrib., vol. 5, no. 2, pp. 199–208, Feb. 2011. [7] R. Moore, R. Midence, and M. Goraj, “Practical experience with IEEE 1588 high precision time synchronization in electrical substation based on IEC 61850 process bus,” in IEEE PES Gen. Meet. 2010, Minneapolis, MN, USA, 25–29 Jul. 2010, pp. 1–4. [8] SMB Smart Grid Strategic Group. (2010, Jun.) Smart grid standardization roadmap. IEC. [Online]. Available: http:// www.iec.ch/smartgrid/downloads/sg3_roadmap.pdf [9] IEC TC57, Communication networks and systems in substations – Part 8-1: Specific communication service mapping (SCSM) – Mappings to MMS (ISO 9506-1 and ISO 9506-2) and to ISO/IEC 8802-3, IEC 61850-8-1:2004, May 2004. [10] ——, Communication networks and systems in substations – Part 9-2: Specific communication service mapping (SCSM) – Sampled values over ISO/IEC 8802-3, IEC 61850-9-2:2004, Apr. 2004. [11] J.-D. Decotignie, “Ethernet-based real-time and industrial communications,” Proc. IEEE, vol. 93, no. 6, pp. 1102–1117, Jun. 2005. [12] D. M. E. Ingram, D. A. Campbell, and P. Schaub, “Use of IEEE 1588-2008 for a sampled value process bus in transmission substations,” in Proc. IEEE Int. Instrum. Meas. Technol. Conf. 2011 (I2MTC), Hangzhou, China, 10–12 May 2011, pp. 871– 876.

[13] UCAIug. (2004, 7 Jul.) Implementation guideline for digital interface to instrument transformers using IEC 61850-9-2 R2-1. UCA International Users Group. Raleigh, NC, USA. [Online]. Available: http://iec61850.ucaiug.org/ Implementation%20Guidelines/DigIF_spec_9-2LE_ R2-1_040707-CB.pdf [14] IEC TC38, Instrument transformers – Part 8: Electronic current transformers, IEC 60044-8:2002, Jul. 2002. [15] IEC TC57, Communication Networks and Systems in Substations – Part 5: Communication Requirements for Functions and Device Models, IEC 61850-5:2003, Jul. 2003. [16] IEEE Instrumentation & Measurement Society, IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, IEEE Std. 1588-2008, 24 Jul. 2008. [17] IEEE Power & Energy Society, IEEE Standard Profile for Use of IEEE 1588 Precision Time Protocol in Power System Applications, IEEE Std. C37.238-2011, 14 Jul. 2011. [18] R. L. Scheiterer, C. Na, D. Obradovic, and G. Steindl, “Synchronization performance of the precision time protocol in industrial automation networks,” IEEE Trans. Instrum. Meas., vol. 58, no. 6, pp. 1849–1857, Jun. 2009. [19] R. Subrahmanyan, “Timing recovery for IEEE 1588 applications in telecommunications,” IEEE Trans. Instrum. Meas., vol. 58, no. 6, pp. 1858–1868, Jun. 2009. [20] G. Garner and H. Ryu, “Synchronization of audio/video bridging networks using IEEE 802.1AS,” IEEE Commun. Mag., vol. 49, no. 2, pp. 140–147, Feb. 2011. [21] M. Lixia, N. Locci, C. Muscas, and S. Sulis, “Synchrophasors measurement in a GPS-IEEE 1588 hybrid system,” Eur. Trans. Elect. Power, vol. 21, no. 4, pp. 1509–1520, May 2011. [22] A. Carta, N. Locci, C. Muscas, F. Pinna, and S. Sulis, “GPS and IEEE 1588 synchronization for the measurement of synchrophasors in electric power systems,” Comput. Stand. Interfac., vol. 33, no. 2, pp. 176–181, Feb. 2011. [23] C. M. De Dominicis, P. Ferrari, A. Flammini, S. Rinaldi, and M. Quarantelli, “On the use of IEEE 1588 in existing IEC 61850-based SASs: Current behavior and future challenges,” IEEE Trans. Instrum. Meas., vol. 60, no. 9, pp. 3070–3081, Sep. 2011. [24] Y. Liu, R. Zivanovic, and S. Al-Sarawi, “An IEC 61850 synchronised event logger for substation topology processing,” Aust. J. Electr. Electron. Eng., vol. 7, no. 3, pp. 225–233, 2010. [25] Y. Kozakai and M. Kanda, “Keeping clock accuracy on a master clock failure in substation network,” in Proc. 2010 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Portsmouth, NH, USA, 27 Sep. – 1 Oct. 2010, pp. 25–29. [26] C. Brunner, “Will IEEE 1588 finally leverage the IEC 61850 process bus?” in Proc. 10th IET Int. Conf. Dev. Power Sys. Prot. (DPSP), Manchester, UK, 29 Mar. – 1 Apr. 2010, pp. 1–5. [27] J. Amelot, J. Fletcher, D. Anand, C. Vasseur, Y.-S. Li-Baboud, and J. Moyne, “An IEEE 1588 time synchronization testbed for assessing power distribution requirements,” in Proc. 2010 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Portsmouth, NH, USA, 27 Sep. – 1 Oct. 2010, pp. 13–18. [28] W. Lewandowski, J. Azoubib, and W. J. Klepczynski, “GPS: Primary tool for time transfer,” Proc. IEEE, vol. 87, no. 1, pp. 163–172, Jan. 1999. [29] IEC TC57, Power systems management and associated information exchange – Data and communications security – Part 6: Security for IEC 61850, IEC TS 62351-6 ed.1, Jun. 2007. [30] C. Fan, Y. Ni, J. Shen, Z. He, L. Xie, and G. Huang, “Research on the application of IEEE 1588 in the merging unit based on IEC 61850-9-2,” Dianli Xitong Zidonghua/Autom. of Elec. Pwr Sys., vol. 35, no. 6, pp. 55–59, Mar. 2011. [31] J. Mo, J. C. Tan, P. A. Crossley, Z. Q. Bo, and A. Klimek, “Evaluation of process bus reliability,” in Proc. 10th IET Int. Conf. Dev. Power Sys. Prot. (DPSP), Manchester, UK, 29 Mar. – 1 Apr. 2010. [32] J.-C. Tournier and T. Werner, “A quantitative evaluation of IEC61850 process bus architectures,” in IEEE PES Gen. Meet. 2010, Minneapolis, MN, USA, 25–29 Jul. 2010, pp. 1–8. [33] Digital transmission systems – Digital networks – Design objectives for digital networks, ITU Rec. G.810, Aug. 1996. [34] G. Gaderer, P. Loschmidt, and T. Sauter, “Improving fault tolerance in high-precision clock synchronization,” IEEE Trans. Ind. Informat., vol. 6, no. 2, pp. 206–215, May 2010.

DAVID INGRAM et al.: USE OF IEEE 1588 PRECISION TIME PROTOCOL FOR SUBSTATION AUTOMATION AND PROTECTION

[35] A. Soppelsa, A. Luchetta, and G. Manduchi, “Assessment of precise time protocol in a prototype system for the ITER neutral beam test facility,” IEEE Trans. Nucl. Sci., vol. 57, no. 2, pp. 503–509, Apr. 2010. [36] J. Han and D.-K. Jeong, “A practical implementation of IEEE 1588-2008 transparent clock for distributed measurement and control systems,” IEEE Trans. Instrum. Meas., vol. 59, no. 2, pp. 433–439, Feb. 2010. [37] G. Combs. (2012) Wireshark network protocol analyser. [Online]. Available: http://www.wireshark.org/ [38] D. Fontanelli and D. Macii, “Accurate time synchronization in PTP-based industrial networks with long linear paths,” in Proc. 2010 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Portsmouth, NH, USA, 29 Sep. – 1 Oct. 2010, pp. 97 –102. [39] M. Bloch, O. Mancini, and T. McClelland, “Mass-produced quartz oscillators as low-cost replacement of passive rubidium vapor frequency standards,” in Proc. 2007 IEEE Int. Freq. Control Symp. Jnt 21st Europ. Freq. Time Forum (IFCS-EFTF), Geneva, Switzerland, 29 May – 1 Jun. 2007, pp. 1235–1240.

David Ingram (S’94, M’97, SM’10) received the B.E. degree (with honours) and M.E. degree, both in electrical and electronic engineering, from the University of Canterbury, Christchurch, New Zealand in 1996 and 1998 respectively. He is currently a PhD Candidate at the Queensland University of Technology (Brisbane, Australia), with research interests in substation automation and control. He has previous experience in the Queensland electricity supply industry in transmission, distribution and generation. Mr. Ingram is a Chartered Member of Engineers Australia (CPEng) and is a Registered Professional Engineer of Queensland (RPEQ).

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Pascal Schaub received the B.Sc. degree in computer science from the Technical University in Brugg-Windisch, Switzerland in 1995. He is currently Principal Consultant Power System Automation at Powerlink Queensland, Brisbane, Australia. He previously worked for ABB, with a leading role in the product development of control and protection systems, non-conventional instrument transformers and field bus communication technology. Mr. Schaub is a member of Standards Australia working group EL-050 ‘Power System Control and Communications’ and a member of the international working group IEC/TC57 WG10 ‘Power System IED Communication and associated Data Models’. Duncan Campbell (M’84) received the B.Sc. degree (with honors) in electronics, physics, and mathematics and the Ph.D. degree from La Trobe University, Melbourne, Australia. He is currently an Associate Professor with the School of Engineering Systems at the Queensland University of Technology (QUT), Brisbane, Australia, and Acting Director of the Australian Research Centre for Aerospace Automation (ARCAA). He has collaborations with a number of universities around the world, including Massachusetts Institute of Technology, Cambridge, and Telecom-Bretagne, Brest, France. His areas research areas of interest are robotics and automation, embedded systems, computational intelligence, intelligent control, and decision support. Dr. Campbell is President of the Australasian Association for Engineering Education (AAEE) and was recently the IEEE Queensland Section Chapter Chair of the Control Systems/Robotics and Automation Society Joint Chapter (2008/2009).

CHAPTER 6

Performance analysis of PTP components for IEC 61850 process bus applications The variation in performance of Precision Time Protocol (PTP) devices identified in Chapter 5 prompted a detailed assessment of the major components in a PTP timing system—the grandmaster clocks, the Ethernet switches (transparent clocks and boundary clocks) and slave clocks. This chapter presents results and observations from a number of component-level tests focussing on the performance of PTP devices from a number of vendors, which range in sophistication. These tests examined the synchronising performance of each possible combination of grandmaster and slave clock in the test bed and the influence each transparent clock had on synchronising accuracy. Each transparent clock was then tested as a boundary clock, where the Ethernet switch acts as a slave to the upstream grandmaster and as a master to the downstream slave clocks. This is the first reported use of boundary clocks with the Power System Profile, and the results showed that boundary clocks introduced less error to the synchronising signal than transparent clocks. Accurate time-stamping of PTP frames entering and leaving the transparent clocks with an Ethernet tap and precision Ethernet card allowed the accuracy of the residence time (calculated by each transparent clock) to be assessed. This avoided the need for specialised PTP test equipment, and was successfully used to identify a flawed PTP implementation. Multicast sampled value traffic, especially at high levels, is a considerable load on the network. This chapter presents interaction testing that examined how prioritisation of PTP traffic influenced synchronising performance in the presence of sampled value traffic. The results from this experiment are significant, as it was demonstrated that PTP performance is not affected by sampled value traffic, provided effective transparent clocks are used. The test procedures presented in this chapter will assist system integrators in the selection of PTP devices for process bus synchronisation. The results of the interaction tests show that PTP is a robust and effective means of synchronising the sampling of merging units on a shared process bus network.

©2013 IEEE. Reprinted, with permission, from D.M.E. Ingram, P. Schaub, D.A. Campbell & R.R. Taylor, “Performance analysis of IEEE 1588 components for IEC 61850 process bus applications”, IEEE Transactions on Instrumentation and Measurement, April 2013.

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Statement of Contribution The authors listed below have certified* that: 1.

they meet the criteria for authorship in that they have participated in the conception, execution, or interpretation, of at least that part of the publication in their field of expertise;

2.

they take public responsibility for their part of the publication, except for the responsible author who accepts overall responsibility for the publication;

3.

there are no other authors of the publication according to these criteria;

4.

potential conflicts of interest have been disclosed to (a) granting bodies, (b) the editor or publisher of journals or other publications, and (c) the head of the responsible academic unit, and

5.

they agree to the use of the publication in the student’s thesis and its publication on the QUT ePrints database consistent with any limitations set by publisher requirements.

In the case of this chapter: Title

Performance Analysis of PTP Components For IEC 61850 Process Bus Applications

Publication

IEEE Transactions on Instrumentation & Measurement

DOI

10.1109/TIM.2013.2245188

Status

Published, April 2013 (vol. 62, no. 4, pp. 710–719)

Contributor David M. E. Ingram

Statement of contribution* Experimental design, performed experiments, data analysis and drafting the manuscript.

12 October 2012 Duncan A. Campbell

Conception and design of the project, critical revision of the paper.

Pascal Schaub

Conception and design of the project, critical revision of the paper.

Richard R. Taylor

Critical revision of the paper.

Principal Supervisor Confirmation I have sighted email or other correspondence from all co-authors confirming their certifying authorship. Prof Duncan A. Campbell

12 October 2012 Signature

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1

Performance Analysis of PTP Components for IEC 61850 Process Bus Applications David M. E. Ingram, Senior Member, IEEE, Pascal Schaub, Duncan A. Campbell, Member, IEEE, and Richard R. Taylor, Member, IEEE

Abstract—New substation automation applications, such as sampled value process buses and synchrophasors, require sampling accuracy of 1 µs or better. The Precision Time Protocol (PTP), IEEE Std 1588, achieves this level of performance and integrates well into Ethernet based substation networks. This paper takes a systematic approach to the performance evaluation of commercially available PTP devices (grandmaster, slave, transparent and boundary clocks) from a variety of manufacturers. The “error budget” is set by the performance requirements of each application. The “expenditure” of this error budget by each component is valuable information for a system designer. The component information is used to design a synchronization system that meets the overall functional requirements. The quantitative performance data presented shows that this testing is effective and informative. Results from testing PTP performance in the presence of sampled value process bus traffic demonstrate the benefit of a “bottom up” component testing approach combined with “top down” system verification tests. A test method that uses a precision Ethernet capture card, rather than dedicated PTP test sets, to determine the Correction Field Error of transparent clocks is presented. This test is particularly relevant for highly loaded Ethernet networks with stringent timing requirements. The methods presented can be used for development purposes by manufacturers, or by system integrators for acceptance testing. A sampled value process bus was used as the test application for the systematic approach described in this paper. The test approach was applied, components were selected, and the system performance verified to meet the application’s requirements. Systematic testing, as presented in this paper, is applicable to a range of industries that use, rather than develop, PTP for time transfer. Index Terms—Ethernet networks, IEC 61850, IEEE 1588, performance evaluation, power transmission, protective relaying, Precision Time Protocol, smart grids, time measurement

I. I NTRODUCTION IME synchronization has been used in substations for consistent event time-stamping for some time [1], [2]. This consistency is required when investigating power system incidents. More accurate timestamping is now required for phasor monitoring and for digital process buses [3]. New time synchronization systems, such as the Precision Time Protocol (PTP) [4], are proposed as a means of achieving the high level of

T

David Ingram, Duncan Campbell and Richard Taylor are with the School of Electrical Engineering and Computer Science, Queensland University of Technology, Brisbane, Queensland 4000, Australia (email: [email protected]; [email protected]; [email protected]). Pascal Schaub is with Powerlink Queensland, Virginia, Queensland 4014, Australia.

performance required by these new applications [5], [6]. PTP is a bidirectional networked time transfer protocol, and can be used with a variety of underlying network protocols. The International Electrotechnical Commission (IEC) Smart Grid Vision and US National Institute of Standards and Technology (NIST) standardization “roadmaps” recommend the use of PTP for high accuracy time synchronization in substations and IEC 61850 for substation automation and protection [7], [8]. The IEC 61850 suite of substation automation standards provide an inter-operable communication model that meets existing needs, while supporting future developments as technology improves. IEC 61850 communication profiles are based, where possible, on existing international standards. IEC 61850-9-2 specifies the requirements for an inter-operable Sampled Value (SV) process bus. This paper takes a systematic approach to determining whether PTP, when used with the recently published “power system profile” [9], is a robust means of synchronizing a SV process bus. The operating environment for substation automation is onerous, with any failure of the synchronizing system disabling SV based protection of high voltage transmission lines and transformers. SV merging units generate a large amount of data (5.5 Mb/s per merging unit, required for each three phase set of current transformers). The “error budget” is set by the performance requirements of the application. The “expenditure” of the error budget by each component is valuable information for a system designer. The component information is used to design a synchronization system that meets the overall functional requirements, which in this case is the synchronization of SV process bus sampling throughout a substation. The methodology presented in this paper provides a series of tests that can be used by system designers to evaluate timing components. The quantitative performance data presented in Section IV demonstrates that such testing is effective and informative. A comprehensive test of each grandmaster with each slave clock identifies the relative merit of each device. Results from testing PTP performance in the presence of SV process bus traffic demonstrate the benefit of a “bottom up” component testing approach combined with “top down” system verification tests. Power system applications for PTP have been presented in a number of papers [5], [10]. The commercial implementation of process bus substations using PTP

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to synchronize sampling [11] has made this use of PTP an area of interest [6], [12]. Synchrophasors enable wide area monitoring and control of power systems with the aim of preventing wide-spread outages, however stringent phase accuracy requirements demand accurate sampling. The use of PTP in this application has been discussed by a number of researchers [13], [14]. Testing of PTP devices is not new, with transparent clock performance investigated by several groups [15]– [17]. Tests of the ability of transparent clocks to accurately measure the residence time of PTP messages have been described by Burch et al. [15] and Cosart [16], however these researchers used specialized PTP test equipment. The method presented in Section III uses a precision Ethernet capture card and a grandmaster clock, which is a more cost effective solution. The non-PTP traffic in a process bus is predominantly multicast, and this affects the queuing behavior of Ethernet switches, and therefore the results in this paper build upon the work of [16], [17]. Background information, including substation definitions and details of timing requirements, are presented in Section II. The experimental methods for assessing synchronizing performance and transparent clock operation are presented in Section III, and the corresponding results in Section IV. The impact of these results on PTP for process bus applications are discussed in Section V, with final conclusions presented in Section VI. II. BACKGROUND A. Substation Definitions A “process bus” carries waveform measurements, digital status information, and transduced analog data from the high voltage equipment in a substation (for example bus bars, circuit breakers, isolators, earth switches, power transformers, current transformers and voltage transformers) to the substation automation system (SAS), and conveys commands from the SAS to high voltage equipment in the switchyard (e.g. circuit breakers, disconnectors and transformer tap changer controls), over a digital network. Merging units convert a signal proportional to the input signal (which may be analog or digital) into a standard data format for transmission over the process bus. The inputs to a merging unit may be conventional current and voltage transformers (in the case of a Stand Alone Merging Unit), or the output a non-conventional instrument transformers secondary converter. Some protection schemes, in particular transformer protection, require inputs from multiple merging units or from process bus and conventional analog inputs. The current and voltage samples from different sources need to be synchronized by protection relays. Any synchronizing error, regardless of the method used, manifests as phase error, and this in turn results in “spill current” in differential protection schemes. This increases the chance of undesirable false tripping. Fig. 1 illustrates two examples of transformer protection where synchronization is required.

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Fig. 1. Transformer protection with (a) two merging units (MU) and (b) one merging unit and one conventional input. TABLE I S AMPLED VALUE TIME ACCURACY CLASSES FROM IEC 61850-5. Protection Class

Required Accuracy

Edition 1 Timing Class

Edition 2 Timing Class

P1

±25 µs

T3

TS3

P2

±4 µs

T4

TS4

P3

±1 µs

T5

TS5

B. Synchronization Requirements Process buses based on IEC 61850-9-2 must meet sampling accuracy requirements specified by IEC 61850-5 [18]. Table I lists the timing classes from edition 1 of this standard that are relevant to process bus networks, along with the proposed classes in the draft of edition 2. Protection class P2 is intended for transmission substation bays, and class P3 for transmission substation bays with high accuracy requirements. Class P1 is for distribution substations. A widely adopted implementation of IEC 61850-9-2, termed “9-2 Light Edition” or “9-2LE”, specifies that sample synchronization use one pulse per second (1-PPS) signals, and that these have an accuracy that is better than 1 µs [19]. This, in combination with pulse propagation delays and sampling errors, ensures that overall sampling error is within the ±4 µs required by timing class T4/TS4. Phasor monitoring based on IEEE Std C37.118 requires that the total vector error (magnitude and phase) be less than 1% [20]. A synchronizing accuracy of 1 µs is proposed, as this allows for phase and magnitude errors in the source instrument transformers [2]. This aligns the synchronizing requirements of SV process buses and phasor monitoring, and sets the performance requirement that is used in this paper. C. Performance Metrics 1-PPS synchronizing pulses are currently used to synchronize phasor monitoring units and merging units. The rapid update that such a signal provides makes jitter more significant than wander when looking at error. The direct comparison of 1-PPS outputs is a well established technique for evaluating the effectiveness of PTP for power system applications [6], [21]– [23]. Time errors are presented as time series, histograms, density functions, or a combination of these.

D. INGRAM et al.: PERFORMANCE ANALYSIS OF PTP COMPONENTS FOR IEC 61850 PROCESS BUS APPLICATIONS

This statistical analysis gives an understanding of the ongoing performance of the synchronizing system, and can identify operational aberrations. The errors may be between grandmaster and slave clocks, or between slave clocks synchronized to the same grandmaster. The use of PTP to synchronize a sampled value process bus is the focus of this paper, and therefore the “instantaneous” time error between the 1-PPS outputs of grandmaster and slave clocks is the performance metric that will be used. The “Correction Factor Error” (CFE) was defined by Burch et al. to be the difference between the actual residence time and the Correction field value [15]. A key observation was that a CFE that varies with latency indicates an error in the transparent clock’s estimate of the frame residence time. This metric is used in this paper to determine the performance of transparent clocks under a variety of network load conditions. III. M ETHOD The systematic approach to evaluating the performance of PTP devices uses a variety of tests. These tests can be applied to single devices, to the system as a whole, or a combination of the two. The tests described here are not exhaustive, and do relate to the application under investigation. The test methods used to demonstrate the approach fall into two classes. The first class was assessment of 1-PPS synchronizing accuracy, and included grandmaster, slave, transparent and boundary clocks. These tests provided a methodology for system integrators to follow when evaluating products for substation timing. The second class of tests examined the ability of transparent clocks to compensate for latency introduced by other network traffic on the shared process bus, in particular SV traffic in excess of 50 Mb/s. The PTP parameters specified in Table 1 of the Power Profile [9] were used for these tests. The key parameters were 1 s update rates for Sync, Announce and PathDelay messages. Layer 2 multicast messages were used as the transport and the network speed was fixed at 100 Mb/s. The peer delay mechanism was used for path delay measurement. Commercially available PTP devices were used in the development of these tests. The results in this paper provide a survey of performance, as well as demonstrating the application of the test methods. The grandmaster and slave clocks are represented by host names (PTPx), and the Ethernet switches are represented by a code letter (H, M, N and O). A total of three grandmasters, four slave clocks and four Ethernet switches (capable of transparent and boundary clock operation) were used in these tests. A. Grandmaster and Slave Clock Sync Accuracy The test method used to assess synchronizing performance is an established method, and uses the 1-PPS electrical outputs of the master and slave clocks. A digital oscilloscope (Tektronix DPO2014) sampling at 109 samples/s calculated the time difference (which

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Fig. 2. Test equipment used for assessing synchronizing accuracy testing, based on a digital oscilloscope.

is referred to as “delay” in these results) between the reference (grandmaster) and slave clock over a 30 minute period. A computer recorded each measurement (1800 in total for each test) for statistical analysis. Fig. 2 shows this arrangement. Various combinations of grandmaster and slave clocks were used to observe how the selection of clock device influences performance. A cross-over twisted pair Ethernet cable was used to connect the grandmaster and slave clock to eliminate the influence of other network traffic on synchronizing performance. B. Effect of Transparent and Boundary Clocks Peer-to-peer transparent clocks or boundary clocks that support the peer-delay mechanism are required to distribute PTP messages when the C37.238 power profile is used. Experiments were conducted that examined the effect these application specific Ethernet switches have on synchronizing performance. The influence of each transparent clock and boundary clock was assessed by placing the Ethernet switch under test between the grandmaster and slave clocks, in place of the cross-over cable. No other network traffic was introduced to the switch, and switch management links were disconnected for the duration of each test. Each test ran for fifteen minutes, generating 900 1-PPS delay measurements. The grandmaster and slave clock used for these tests were the pair that had the best synchronizing performance when directly connected. Ideally transparent clocks will estimate the path delays and frame residence times with minimal error. Errors in these estimates result in synchronizing error between grandmasters and slave clocks. Annex B of IEEE Std C37.238 specifies that the worst-case time error between the standard time source and a slave device be ±1 µs, with up to 16 network hops and 80% linerate network traffic [9]. Grandmaster error is allocated ±0.2 µs and network error is the remaining ±0.8 µs. This limits each transparent clock to introducing no more than 50 ns of error in each of the 16 hops (15 identical transparent clocks, 1 grandmaster and 1 slave clock). Fig. 3 shows the connections for the test with four transparent clocks. Two, three and four transparent clocks in series were each tested to determine the effect of cascaded switches, and to see if the standalone responses could be used to predict the behavior of cascaded switches. All Ethernet connections were fixed at 100 Mb/s, even though some switches supported

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Fig. 3.

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Synchronizing testing with multiple transparent clocks. Fig. 5. Connection of three transparent clocks with SV traffic injection to simulate a loaded process bus network.

Fig. 4. Experimental equipment used to measure PTP Sync message residence time, based on an Ethernet tap and an Endace DAG7.5G4 capture card.

1 Gb/s. The four switches were also configured as boundary clocks, and tested using the same arrangements. C. Estimation of Transparent Clock Residence Time Rather than use a packet injection test set or specialized slave clock, the approach taken was to simultaneously capture the output of a conventional grandmaster using an in-line Ethernet tap (NetOptics 10/100/1000 Tap) and the output of the transparent clock under test with a precision Ethernet capture card (Endace DAG7.5G4), as shown in Fig. 4. The DAG card includes a precision time-stamping unit that was synchronized and syntonized (frequency locked) to the grandmaster’s 1-PPS output. This improves the DAG card’s time-stamping accuracy, and minimizes drift [24]. A third Ethernet port on the DAG card was used to inject multicast traffic into the transparent clock to simulate other network traffic. VLAN filtering was used to protect the grandmaster from the multicast traffic, and this is recommended practice with multiple multicast protocols in a process bus [25]. The multicast traffic was injected into the switches at 1000 Mb/s to simulate the simultaneous arrival of SV frames, thereby increasing latency, but the total load did not exceed 100 Mb/s. The exception to this was Switch M which only had Fast Ethernet ports, and therefore traffic injection was at 100 Mb/s. The DAG card time-stamped the frames entering and leaving the transparent clock with a common clock, giving a measurement precision of 8 ns. The 1-PPS input to the DAG card is used for syntonization which improves the accuracy of the time-stamping clock. This could be supplied by a stable local 1-PPS source, such as a GPS receiver, enabling transparent clock performance to be measured in the field. This is a benefit of this method compared to those used in [15] and [16]. The DAG card combines frames captured from all ports into one “ERF” file. The PTP Correction field

contents were extracted from PTP Sync and Follow-Up frames entering and leaving the transparent clock, and the change in the Correction field values calculated. This allowed for transparent clocks to be installed between the grandmaster and transparent clock under test, and for one or two step transparent clocks to be used. One step transparent clocks update the Sync message, while two step transparent clocks update the Follow-Up message. Four different transparent clocks were tested, and five multicast network loads were applied to each transparent clock: no background traffic, six 9-2LE merging units, 21 9-2LE merging units, 25 Mb/s random length frames and 95 Mb/s random length frames. The length of the random frames was uniformly distributed between 64 and 1500 bytes. Eight PTP Sync messages were transmitted per second by the grandmaster and frames were captured for 10 minutes (approximately 4880 PTP Sync and Follow-Up messages). The sync rate was faster than that specified in C37.238, but enabled a greater sample size to be collected in a reasonable time. D. PTP and Sampled Values Results from testing the transparent clocks individually show that three of the four transparent clocks accurately estimated switch residence time. These three switches (H, M and N) were then connected in series and synthetic SV traffic was injected into the first transparent clock at 1 Gb/s to simulate the simultaneous arrival of frames from multiple merging units. Fig. 5 shows the arrangement of devices. 1-PPS delays between the grandmaster and slave clock were recorded for 15 minutes (900 samples for each test). Prioritization and VLAN separation using IEEE Std 802.1Q tagging was used, with SV and PTP frames placed in separate VLANs. SV frames were assigned a priority of 4 for all tests. Two sets of experiments were conducted to determine the effect of load and priority on synchronizing performance: 1) The effect of SV traffic on PTP performance was assessed by injecting six levels of SV traffic into the test system: no traffic, 1 merging unit (MU), 3 MUs, 6 MUs, 12 MUs and 21 MUs. Previous testing has shown that 21 SV transmissions are the maximum that 100 Mb/s Ethernet can accommodate without dropping frames (for a 50 Hz

D. INGRAM et al.: PERFORMANCE ANALYSIS OF PTP COMPONENTS FOR IEC 61850 PROCESS BUS APPLICATIONS

5

Fig. 6. Thirty minute time series of the delay between 1-PPS outputs for each combination of directly connected grandmaster and slave clock, for three models of grandmaster and four models of slave clocks.

TABLE II S UMMARY OF JITTER IN GRANDMASTER / SLAVE CLOCK SYNCHRONIZING PERFORMANCE .

Slave GM

power system). PTP frames had a fixed priority of 4 for the loading tests. 2) The effect of prioritization on PTP performance was examined by varying the 802.1Q priority of PTP frames while keeping the SV frame priority fixed at 4. Two levels of SV traffic were injected (12 MUs and 21 MUs) for each of the three PTP priorities: 2, 4 and 7.

PTPA

PTPB

PTPC

PTPF

PTPA



81.2 ns

46.6 ns

69.4 ns

PTPC

77.9 ns

28.5 ns



6.58 ns

PTPD

101 ns

46.5 ns

41.7 ns

34.8 ns

(a) Standard deviation.

IV. R ESULTS

A. Effect of Clock Selection The standard deviation and range of delays for each combination of grandmaster and slave clock are summarized in Table II. Time series plots for each grandmaster and slave clock combination are shown in Fig. 6, with a common y-axis range for all plots. The rows represent grandmaster clocks and the columns represent slave clocks in the table and the figure. The results in Fig. 6 show that PTP devices intended for power system use are interoperable, as each grandmaster and slave clock combination successfully synchronized. The worst performing combination of grandmaster and slave clock, PTPD/PTPA, had jitter ten times worse than that of best performing combination, PTPC/PTPF. This shows that the clocks selected for a substation timing system influence its performance.

Slave GM

This section presents the results of the experiments described in Section III, and in the same order.

PTPA

PTPB

PTPC

PTPF

PTPA



705 ns

304 ns

798 ns

PTPC

715 ns

156 ns



42.5 ns

PTPD

670 ns

255 ns

232 ns

200 ns

(b) Range.

1-PPS delay for the four transparent clocks, with the direct-connect (cross-over cable) result included for comparison. Switch O introduced additional jitter to the distribution of delay, and the time series plot of the 1-PPS delay between grandmaster and slave clock in Fig. 8 shows a periodic disturbance. This cyclic pattern, present in a single transparent clock, suggests that there is a device specific issue and not a weakness in the standard. Selection of a grandmaster and slave clock that gave a 1-PPS delay that has low noise greatly assists the identification of perturbations introduced by transparent clocks, such as that identified in Fig. 8. C. Effect of Boundary Clocks

B. Effect of Transparent Clocks The majority of transparent clocks did not increase the jitter in the measured delay, but all transparent clocks other than switch M introduced an offset to the 1-PPS delay. Fig. 7 shows the distribution of

The transparent clock tests were repeated with the four switches in boundary clock mode, and the sample distributions of delay are shown in Fig. 9. The range of the x-axes in Fig. 7 and Fig. 9 are the same (215 ns) to aid comparison.

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Fig. 7. Sample distributions showing the effect of transparent clocks on the best performing grandmaster/slave clock combination.

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Fig. 10. Sample distributions showing the effect of multiple transparent clocks on synchronizing performance, with the directly connected case provided for reference.

Fig. 8. Time series of 1-PPS delay with the best grandmaster/slave clock pairing, showing a periodic disturbance introduced by switch O. Fig. 11. Sample distributions for four boundary clocks in series, with four transparent clocks in series shown for comparison.

The jitter in the observed delay is similar to the directly connected case for each boundary clock. Switch O performs significantly better as a boundary clock, however the performance of switch M is degraded as a boundary clock. D. Multiple Switches in Series The four transparent clocks were connected in series, one by one, to assess the effect of multiple transparent clocks on synchronizing performance. Fig. 10 shows that one to three transparent clocks did not affect the offset significantly, but the fourth transparent clock did. It is significant that adding switch O to the chain increased the median delay by 434 ns, but when switch O was used by itself the median delay decreased by 114 ns. The offsets introduced by the transparent clocks do not appear to be additive, complicating system design. Performance testing of a PTP system

should therefore be undertaken on the finished network, rather than combing the errors from the building blocks. The four transparent clocks were reconfigured as boundary clocks to determine whether timing errors accumulated, resulting in degraded performance. The difference in performance between four transparent clocks and boundary clocks is significant, with the large offset present in the transparent clocks being eliminated. Switch O introduced significant jitter as a transparent clock, which is apparent in Fig. 7, but did not do so when operating as a boundary clock. The results shown in Fig. 11 suggest that switch O does not respond negatively to upstream clocks when in boundary clock mode. Further research is required to determine the optimum combination of transparent clocks and boundary clocks for the switches available in the process bus test bed. E. Transparent Clock Correction Accuracy

Fig. 9. Sample distributions showing the effect of four boundary clocks on synchronizing performance.

The four network loads (six merging units, 21 merging units, 25 Mb/s random length frames and 95 Mb/s random length frames) increased the Sync message switch residence times. The no-load and 25 Mb/s random length frames cases have been selected to best demonstrate the effect of background traffic on latency and CFE. The other cases give similar results, with different ranges for latency. The random length frames represent TCP traffic on the process bus, which may be from a variety of sources. 25 Mb/s is equivalent to approximately six merging units.

D. INGRAM et al.: PERFORMANCE ANALYSIS OF PTP COMPONENTS FOR IEC 61850 PROCESS BUS APPLICATIONS

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Fig. 13. Switch latency (residence time) of sampled value (SV) and GOOSE messages with four transparent clocks. TABLE IV L ATENCY EXPERIENCED BY PTP S YNC FRAMES WITH NO BACKGROUND TRAFFIC .

Fig. 12. Transparent clock Correction field accuracy, with (a) no background traffic and (b) 25 Mb/s random length frames background traffic. TABLE III C ORRECTION FIELD ERROR STATISTICS FOR FOUR TRANSPARENT CLOCKS , WITH AND WITHOUT TRAFFIC .

TC

No Traffic

25% Random Traffic

Mean

Range

R2

Mean

Range

R2

H

–205 ns

184 ns

0.000

–187 ns

218 ns

0.000

M

–572 ns

177 ns

0.009

–568 ns

173 ns

0.000

N

–549 ns

179 ns

0.000

–540 ns

170 ns

0.000

O

–388 ns

481 ns

0.237

–404 ns

674 ns

0.322

Table III summarizes the results shown in Fig. 12. The mean and range of CFE did not vary when background traffic was added for switches H, M and N; however switch O’s CFE has increased range when the background traffic was applied. The CFE for switch O is dependent on latency, with the negative slope apparent in Fig. 12 indicating the transparent clock is over-estimating the frame residence time (Correction exceeds the actual residence time). The slope of the point cloud is –1.8×10-5 , suggesting the reference oscillator in this transparent clock is running fast by 18 parts per million. The R2 (coefficient of determination) values in Table III confirm that switch O has some linear dependency between CFE and latency, and that switches H, M and N do not. The residence time of Sync messages varies between the transparent clocks, and is listed in Table IV. This contrasts with latency observations of SV and GOOSE traffic (the traffic most likely to be on a process bus),

TC

Mode

Min

Max

H

2-step

1.90 ms

11.5 ms

M

1-step

11.0 µs

12.1 µs

N

2-step

0.512 ms

2.71 ms

O

2-step

10.5 ms

34.1 ms

where latency is similar between Ethernet switches. GOOSE messages vary in length, and generally carry binary and transduced analog information. Fig. 13 shows the latency distribution for 126 byte SV messages and 602 byte GOOSE messages. Switch M is a one-step transparent clock, and was the one transparent clock that processed Sync messages as quickly as any other traffic of the same size (66 bytes). One-step operation requires special Ethernet hardware to manipulate the content of PTP frames as they are transmitted, and has not been widely adopted, F. Effect of Sample Value Traffic The transparent clocks that corrected estimated residence time were placed in series to represent a substation network topology, with bay level, voltage level, and core process bus switches. Fig. 14 shows there is little variation in PTP performance as SV traffic levels increased from one to 21 merging units, and the observed differences are more likely to be natural variation in clock performance. It is significant that the “none” and “21 MU” sample distributions are the most similar, despite having the largest difference in SV traffic levels. Table V lists the total latency experienced by the PTP Sync message after passing through all three transparent clocks. Three outlier delays occurred, with all other latencies under 23 ms. The Correction field remained accurate, even at 657 ms, with a CFE of –484 ns. Fig. 15 shows that at moderate load (12 MU, approximately 48 Mb/s) priority did not affect performance. However, at high load (21 MU) higher priority PTP messages did yield slightly improved performance (an improvement of 5 ns over Priority 4), and the low

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IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT

Fig. 14. Sample distributions for three transparent clocks in series, with six different 9-2LE sampled value (SV) traffic levels. PTP and sampled value 802.1Q priority both set to 4. TABLE V L ATENCY EXPERIENCED BY PTP S YNC FRAMES PASSING THROUGH THREE TRANSPARENT CLOCKS . SV Traffic

Min

Max

none

2.59 ms

16.1 ms

1 MU

2.59 ms

364 ms

3 MU

2.58 ms

187 ms

6 MU

2.57 ms

19.5 ms

12 MU

2.58 ms

15.3 ms

21 MU

2.59 ms

657 ms

priority case had marginally degraded performance (by approximately 18 ns). This result is contrary to established practice where PTP messages are thought to require high priority handling, however this does require the use of transparent or boundary clocks that support the peer-delay mechanism. V. D ISCUSSION A. Effect of Clock Selection The best performing grandmaster was PTPC, with the least jitter when used with any of the slave clocks. Similarly the best performing slave clock was PTPF regardless of the grandmaster used. These clocks had a range of local oscillator types, ranging in quality (from low to high) from a crystal oscillator (XO) in PTPA to an oven controlled crystal oscillator (OCXO) in PTPC. The slave-only clock PTPB had an XO and PTPF had a temperature compensated crystal oscillator (TCXO), and the difference in performance is apparent in Fig. 6. The stability of an oscillator improves the phase noise, and higher Q improves performance (OCXOs have higher Q than TCXOs) [26]. PTP performance, as shown in Fig. 6, correlates with the expected phase noise performance of the local oscillator in each clock, based on the type of local oscillator. B. Effect of Transparent and Boundary Clocks Switches N and O performed better as boundary clocks, switch M performed better as a transparent clock and the performance of switch H was similar as

Fig. 15. Sample distributions for three transparent clocks in series, with two different SV traffic levels and three PTP 802.1Q priorities (“PTP Pri” in the legend). Sampled value frames had 802.1Q priority set to 4.

a transparent or boundary clock. Switches that do not syntonize (frequency lock) their local oscillator with the grandmaster in transparent clock mode often do so in boundary clock mode, as their local oscillator becomes the reference for slave clocks and downstream boundary clocks. The transparent clocks all supported boundary clock mode as an alternative to transparent clock mode. boundary clocks to some extent decouple slave clocks from the grandmaster, and can provide additional robustness in case of network outage if the boundary clock’s internal clock is sufficiently stable. transparent clock mode is the default for most switches, however the results presented in this paper show that boundary clock mode should be evaluated to ensure the best performance is obtained from the equipment in a PTP system. Designers need to be prepared to look at the boundary clock mode of operation when selecting products for a timing system. Periodic perturbations in the synchronizing error between the grandmaster and slave clock with one transparent clock indicates that some implementations have issues. These perturbations are straightforward to observe when the synchronizing error is stable, but may be masked by a noisy grandmaster/slave clock combination. Therefore it is recommended that the most stable combination of grandmaster and slave clock is used for the assessment of transparent clock performance. C. Transparent Clock Correction Accuracy The mean CFE in Table III is not zero as the transparent clocks estimated the path delay with the peer to peer delay mechanism, and added this delay to the Correction field. The delay through the physical interface was as high as 300 ns for some PTP devices, giving peer-delays of 600 ns for short links. The latency measured by the DAG card through the Ethernet tap could not take into account delays leaving the grandmaster, and so the Correction field value was larger than the measured latency, resulting in the negative CFE values in Table III. Local oscillator frequency errors in transparent clocks have been shown to be the main source of error in estimates of peer-topeer path delay [27]. Syntonizing the local oscillators

D. INGRAM et al.: PERFORMANCE ANALYSIS OF PTP COMPONENTS FOR IEC 61850 PROCESS BUS APPLICATIONS

of transparent clocks to the grandmaster should improve the accuracy of residence time estimates, and this option is provided by some manufacturers. The test methodology presented in this paper, using a standard grandmaster, an Ethernet tap and a precision Ethernet card, is a straightforward means of assessing the ability of a transparent clock to correctly measure the residence time of a PTP Sync message passing through the switch. This test could become part of a standard validation process for evaluating transparent clocks for substation timing, and can be applied throughout a substation. D. Operation with Sampled Values The results shown in Fig. 14 and Fig. 15 demonstrate that the PTP system performance meets the ±1 µs requirements of 9-2LE when a shared process bus network is used for SV and for time synchronization. Increased prioritization of PTP makes a slight improvement at high network loads, as the capability of transparent clocks to accurately estimate residence time compernsates for queuing delays experienced by PTP frames. It has been suggested that PTP messages should be switched with high priority to ensure PTP accuracy [5], [17], but the results presented in this paper show that this is not necessary when peerdelay transparent clocks are used. PTP aware Ethernet switches operating as transparent clocks, with the exception of one, accurately measured the frame residence time of PTP Sync messages. This enabled PTP to provide acceptable synchronizing performance, with offsets less than 200 ns, in the presence of background traffic from 21 merging units. The one switch that had a latency dependent CFE introduced the most jitter when used in the timing network. The switch residence time is not critical, provided the residence time is accurately reflected in the Correction field. The three large latencies of 187 ms, 364 ms and 657 ms show that accurate Correction values do compensate for large switch delays. Acceptable performance was obtained when all switches operated as a boundary clock. System integrators should consider this mode of operation when designing PTP timing systems for substations. PTP and the power system profile meet the synchronizing requirements of SV process buses with a shared network, provided PTP-aware Ethernet switches are used. VI. C ONCLUSIONS The methodology and results presented in this paper have demonstrated the benefits of a systematic approach to assessing the performance of a PTP based synchronizing system, with a particular focus on SV process buses in high voltage substations. Component testing, where each component is a commercially available PTP clock (grandmaster, slave, transparent or boundary clock), provides system designers with quantitative performance figures. The contribution of each device to the overall “error budget” can then

9

inform product selection by customers, or product development by suppliers. “Top down” testing of the final application, such as SV process bus or synchrophasors, now becomes confirmation testing of acceptable performance, rather than a fault-finding process. The results presented in this paper show that while all grandmaster and slave clocks tested were interoperable, a ten-fold difference in grandmaster-slave jitter existed between the best and worst performing combinations. Interoperability should not be underestimated as this is a significant concern when moving from established timing systems to new network based systems, such as PTP. Gaining an understanding of how each component performs, along with overall performance, will provide decision makers the confidence to adopt this technology. Adoption of network based precision timing will reduce the cost of engineering and constructing substation automation systems, especially when the network extends to the high voltage switchyard. ACKNOWLEDGMENTS Belden Solutions, Cisco Systems and Meinberg Funkuhren kindly contributed hardware for the process bus PTP test bed. R EFERENCES [1] A. P. Apostolov, “Requirements for automatic event analysis in substation automation systems,” in IEEE PES Gen. Meet. 2004, Denver, CO, USA, 6–10 Jun. 2004, pp. 1055–1060. [2] F. Steinhauser, C. Riesch, and M. Rudigier, “IEEE 1588 for time synchronization of devices in the electric power industry,” in Proc. 2010 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Portsmouth, NH, USA, 27 Sep. – 1 Oct. 2010, pp. 1–6. [3] C. Brunner and G. S. Antonova, “Smarter time sync: Applying the IEEE PC37.238 standard to power system applications,” in Proc. 64rd Ann. Conf. Prot. Rel. Eng., College Station, TX, USA, 11–14 Apr. 2011, pp. 91–102. [4] IEEE Instrumentation & Measurement Society, IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, IEEE Std. 1588-2008, 24 Jul. 2008. [5] C. M. De Dominicis, P. Ferrari, A. Flammini, S. Rinaldi, and M. Quarantelli, “On the use of IEEE 1588 in existing IEC 61850-based SASs: Current behavior and future challenges,” IEEE Trans. Instrum. Meas., vol. 60, no. 9, pp. 3070–3081, Sep. 2011. [6] D. M. E. Ingram, P. Schaub, and D. A. Campbell, “Use of precision time protocol to synchronize sampled value process buses,” IEEE Trans. Instrum. Meas., vol. 61, no. 5, pp. 1173– 1180, May 2012. [7] SMB Smart Grid Strategic Group. (2010, Jun.) Smart grid standardization roadmap. IEC. [Online]. Available: http:// www.iec.ch/smartgrid/downloads/sg3_roadmap.pdf [8] Office of the National Coordinator for Smart Grid Interoperability, “NIST framework and roadmap for smart grid interoperability standards, release 2.0,” National Institute of Standards and Technology, Gaithersburg, MD, USA, Special Publication 1108R2, Feb. 2012. [Online]. Available: http://www.nist.gov/smartgrid/ upload/NIST_Framework_Release_2-0_corr.pdf [9] IEEE Power & Energy Society, IEEE Standard Profile for Use of IEEE 1588 Precision Time Protocol in Power System Applications, IEEE Std. C37.238-2011, 14 Jul. 2011. [10] J. Amelot, J. Fletcher, D. Anand, C. Vasseur, Y.-S. Li-Baboud, and J. Moyne, “An IEEE 1588 time synchronization testbed for assessing power distribution requirements,” in Proc. 2010 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Portsmouth, NH, USA, 27 Sep. – 1 Oct. 2010, pp. 13–18.

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[11] R. Moore, R. Midence, and M. Goraj, “Practical experience with IEEE 1588 high precision time synchronization in electrical substation based on IEC 61850 process bus,” in IEEE PES Gen. Meet. 2010, Minneapolis, MN, USA, 25–29 Jul. 2010, pp. 1–4. [12] C. Brunner, “Will IEEE 1588 finally leverage the IEC 61850 process bus?” in Proc. 10th IET Int. Conf. Dev. Power Sys. Prot. (DPSP), Manchester, UK, 29 Mar. – 1 Apr. 2010, pp. 1–5. [13] M. Lixia, N. Locci, C. Muscas, and S. Sulis, “Synchrophasors measurement in a GPS-IEEE 1588 hybrid system,” Eur. Trans. Elect. Power, vol. 21, no. 4, pp. 1509–1520, May 2011. [14] A. Carta, N. Locci, C. Muscas, F. Pinna, and S. Sulis, “GPS and IEEE 1588 synchronization for the measurement of synchrophasors in electric power systems,” Comput. Stand. Interfac., vol. 33, no. 2, pp. 176–181, Feb. 2011. [15] J. B. Burch, K. Green, J. Nakulski, and D. Vook, “Verifying the performance of transparent clocks in PTP systems,” in Proc. 2009 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Brescia, Italy, 12–16 Oct. 2009, pp. 1–6. [16] L. Cosart, “Characterizing grandmaster, transparent, and boundary clocks with a precision packet probe and packet metrics,” in Proc. 2011 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Munich, Germany, 12–16 Sep. 2011, pp. 56–61. [17] R. Zarick, M. Hagen, and R. Bartoš, “Transparent clocks vs. enterprise Ethernet switches,” in Proc. 2011 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Munich, Germany, 12–16 Sep. 2011, pp. 62–68. [18] IEC TC57, Communication Networks and Systems in Substations – Part 5: Communication Requirements for Functions and Device Models, IEC 61850-5:2003, Jul. 2003. [19] UCAIug. (2004, 7 Jul.) Implementation guideline for digital interface to instrument transformers using IEC 61850-9-2 R2-1. UCA International Users Group. Raleigh, NC, USA. [Online]. Available: http://iec61850.ucaiug.org/ Implementation%20Guidelines/DigIF_spec_9-2LE_ R2-1_040707-CB.pdf [20] IEEE Power & Energy Society, IEEE Standard for Synchrophasor Measurements for Power Systems, IEEE Std. C37.118.12011, 28 Dec. 2011. [21] J. Amelot, Y.-S. Li-Baboud, C. Vasseur, J. Fletcher, D. Anand, and J. Moyne, “An IEEE 1588 performance testing dashboard for power industry requirements,” in Proc. 2011 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Munich, Germany, 12–16 Sep. 2011, pp. 132–137. [22] J. del Río, D. Toma, S. Shariat-Panahi, A. Mànuel, and H. G. Ramos, “Precision timing in ocean sensor systems,” Meas. Sci. Technol., vol. 23, no. 2, pp. 1–7, Dec. 2012. [23] P. Ferrari, A. Flammini, S. Rinaldi, and G. Prytz, “Evaluation of time gateways for synchronization of substation automation systems,” IEEE Trans. Instrum. Meas., vol. 61, no. 10, pp. 2612–2621, Oct. 2012. [24] J. Micheel, S. Donnelly, and I. Graham, “Precision timestamping of network packets,” in Proc. 1st ACM SIGCOMM Wkshp Internet Meas., San Francisco, CA, USA, 1–2 Nov. 2001, pp. 273–277. [25] D. M. E. Ingram, P. Schaub, and D. Campbell, “Multicast traffic filtering for sampled value process bus networks,” in Proc. 37th Ann. Conf. IEEE Indust. Electron. Soc. (IECON), Melbourne, Australia, 7–10 Nov. 2011, pp. 4710–4715. [26] J. Esterline, “Phase noise: Theory versus practicality,” Microw. J., vol. 51, no. 4, pp. 72–87, Apr. 2008. [27] J. Gao, F. Yang, J. Yang, and H. Zhao, “Effects of IEEE 1588 clock frequency drift on path delay measurement in power system applications,” J. Inform. Comput. Sci., vol. 8, no. 16, pp. 4337–4342, Dec. 2011.

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David Ingram (S’94 M’97 SM’10) received the B.E. (with honours) and M.E. degrees in electrical and electronic engineering from the University of Canterbury, Christchurch, New Zealand, in 1996 and 1998, respectively. He is currently working toward the Ph.D. degree at the Queensland University of Technology, Brisbane, Australia, with research interests in substation automation and control. He has previous experience in the Queensland electricity supply industry in transmission, distribution, and generation. Mr. Ingram is a Chartered Member of Engineers Australia and is a Registered Professional Engineer of Queensland.

Pascal Schaub received the B.Sc. degree in computer science from the Technical University Brugg-Windisch, Windisch, Switzerland, (now the University of Applied Sciences and Arts Northwestern Switzerland) in 1995. He was with ABB, with a leading role in the product development of control and protection systems, nonconventional instrument transformers, and field bus communication technology. He is currently the Principal Consultant Power System Automation with Powerlink Queensland, Brisbane, Australia. He is a member of Standards Australia working group EL-050 "Power System Control and Communications" and a member of the international working group IEC/TC57 WG10 "Power System IED Communication and Associated Data Models."

Duncan Campbell (M’84) received the B.Sc. degree (with honours) in electronics, physics, and mathematics and the Ph.D. degree from La Trobe University, Melbourne, Australia. He has collaborated with a number of universities around the world, including Massachusetts Institute of Technology, and Telecom-Bretagne, Brest, France. He is currently a Professor with the School of Electrical Engineering and Computer Science, Queensland University of Technology, Brisbane, Australia, where he is also the Director of the Australian Research Centre for Aerospace Automation (ARCAA). His research areas of interest are robotics and automation, embedded systems, computational intelligence, intelligent control, and decision support. Prof. Campbell is the Immediate Past President of the Australasian Association for Engineering Education and was the IEEE Queensland Section Chapter Chair of the Control Systems/Robotics and Automation Society Joint Chapter (2008/2009).

Richard Taylor (M’08) received the B.E. (with honours) and M.E. degrees in electrical and electronic engineering from the University of Canterbury, Christchurch, New Zealand, in 1977 and 1979, respectively, and the Ph.D. degree from the University of Queensland, Brisbane, Australia in 2007. He is the former Chief Technical Officer of Mesaplexx Pty Ltd and currently holds a fractional appointment as an Adjunct Professor in the School of Electrical Engineering and Computer Science at the Queensland University of Technology. He started his career as a telecommunications engineer in the power industry in New Zealand. In the past 25 years he has established two engineering businesses in Queensland, developing innovative telecommunications products.

CHAPTER 7

Quantitative assessment of fault tolerant precision timing for electricity substations The correct operation of sampled value protection schemes and wide area protection systems requires accurate time synchronisation. This in turn requires a higher level of reliability in the timing system than is necessary for the time-stamping of events and collection of historical data. Fault Tree Analysis (FTA) has been used by others to estimate the reliability of substation networks, and this chapter builds upon this by developing FTA models for several Precision Time Protocol (PTP) timing topologies. Reliability data for PTP equipment (GPS antennae, grandmaster clocks with GPS receivers, and transparent clocks) was obtained from a number of manufacturers, and averaged to give a set of parameters that were not commercially sensitive. A quantitative assessment of a timing system’s availability enables the system to be tailored to the application—avoiding over-design or inadequate performance. Two novel PTP topologies were developed in the course of this research that used grandmaster clocks with two PTP connections. The first design used two grandmaster clocks, each connected to the two protection networks. The second topology added a third grandmaster with dual network ports to the timing network, connected to both protection networks. Availability estimates, using FTA, show an availability improvement between two and nine times over duplicated grandmasters without interconnection. The Best Master Clock Algorithm (BMCA) allows multiple grandmaster capable clocks to be active, which gives PTP an advantage over existing timing methods. Extensive experimentation was performed to determine whether BMCA mediated redundancy would meet the process bus performance requirements. The results presented in this chapter show that BMCA is effective at mitigating the effect of outages between a grandmaster clock and the rest of the network, with backup clocks assuming the grandmaster role in 3–4 seconds (well within the holdover time of low cost slave clocks). Similarly, BMCA was shown to manage the handover from a degraded grandmaster with a GPS antenna failure to a backup clock, and returned the original grandmaster to service when the antenna fault was resolved. Detailed reliability analysis of synchronising systems is intended to inform the design of timing systems and assess the suitability of the technology for future process bus substations. ©2013 IEEE. Reprinted, with permission, from D.M.E. Ingram, P. Schaub, D.A. Campbell & R.R. Taylor, “Quantitative assessment of fault tolerant precision timing for electricity substations”, IEEE Transactions on Instrumentation and Measurement, in-press.

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Statement of Contribution The authors listed below have certified* that: 1.

they meet the criteria for authorship in that they have participated in the conception, execution, or interpretation, of at least that part of the publication in their field of expertise;

2.

they take public responsibility for their part of the publication, except for the responsible author who accepts overall responsibility for the publication;

3.

there are no other authors of the publication according to these criteria;

4.

potential conflicts of interest have been disclosed to (a) granting bodies, (b) the editor or publisher of journals or other publications, and (c) the head of the responsible academic unit, and

5.

they agree to the use of the publication in the student’s thesis and its publication on the QUT ePrints database consistent with any limitations set by publisher requirements.

In the case of this chapter: Title

Quantitative Assessment of Fault Tolerant Precision Timing for Electricity Substations

Publication

IEEE Transactions on Instrumentation & Measurement

DOI

10.1109/TIM.2013.2263673

Status

Accepted and in-press, January 2013

Contributor David M. E. Ingram

Statement of contribution* Experimental design, performed experiments, data analysis and drafting the manuscript.

12 October 2012 Duncan A. Campbell

Conception and design of the project, critical revision of the paper.

Pascal Schaub

Analysis of results, critical revision of the paper.

Richard R. Taylor

Conception and design of the project, critical revision of the paper.

Principal Supervisor Confirmation I have sighted email or other correspondence from all co-authors confirming their certifying authorship. Prof Duncan A. Campbell

12 October 2012 Signature

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Quantitative Assessment of Fault Tolerant Precision Timing for Electricity Substations David M. E. Ingram, Senior Member, IEEE, Pascal Schaub, Duncan A. Campbell, Member, IEEE, and Richard R. Taylor, Member, IEEE

Abstract—Advanced substation applications, such as synchrophasors and IEC 61850-9-2 sampled value process buses, depend upon highly accurate synchronizing signals for correct operation. The IEEE 1588 Precision Timing Protocol (PTP) is the recommended means of providing precise timing for future substations. This paper presents a quantitative assessment of PTP reliability using Fault Tree Analysis. Two network topologies are proposed that use grandmaster clocks with dual network connections and take advantage of the Best Master Clock Algorithm (BMCA) from IEEE 1588. The cross-connected grandmaster topology doubles reliability, and the addition of a shared third grandmaster gives a nine-fold improvement over duplicated grandmasters. The performance of BMCA mediated handover of the grandmaster role during contingencies in the timing system was evaluated experimentally. The 1 µs performance requirement of sampled values and synchrophasors are met, even during network or GPS antenna outages. Slave clocks are shown to synchronize to the backup grandmaster in response to degraded performance or loss of the main grandmaster. Slave disturbances are less than 350 ns provided the grandmaster reference clocks are not offset from one another. A clear understanding of PTP reliability and the factors that affect availability will encourage the adoption of PTP for substation time synchronization. Index Terms—Computer networks, fault tolerant systems, IEC 61850, IEEE 1588, power system protection, reliability, substation automation, synchronization, system performance, time measurement

I. I NTRODUCTION IME synchronization has historically been used in substations for consistent event time-stamping to aid power system incident investigations, for trending and analysis of operational information, and for some long distance protection schemes [1], [2]. More accurate time-stamping is now required for a variety of Substation Automation System (SAS) applications, which include phasor monitoring and sampled value transport using digital process buses [3]. Network based time synchronization systems, such as the Precision Time Protocol (PTP), IEEE Std 1588 [4], are a means of achieving the high level of performance required by these new applications [5], [6]. Substations are now in service that use PTP to synchronize sampled value

T

This work was supported in part by Powerlink Queensland, Virginia, Queensland 4014, Australia. David Ingram, Duncan Campbell and Richard Taylor are with the School of Electrical Engineering and Computer Science, Queensland University of Technology, Brisbane, Queensland 4000, Australia (email: [email protected]; [email protected]; [email protected]). Pascal Schaub is with QGC Pty Ltd, Brisbane, Queensland 4000, Australia (email: [email protected]).

process buses [7]. A synchronizing accuracy of 1 µs is required by the “9-2 Light Edition” process bus implementation guideline adopted by most manufacturers [8], and is widely accepted as a prudent requirement for synchrophasors [9]. The PTP Power System Profile, IEEE Std C37.238, specifies a restricted set of parameters for PTP that suit power system applications that require 1 µs accuracy [10]. Reliability of protection systems is of utmost important for the electric power system [11]. This includes communications and timing equipment that is required for the protection system to function. The operation of sampled value protection schemes and wide area protection systems requires accurate time synchronization. This imposes a higher level of dependability on the timing system than is currently needed for timestamping of event logs or historical data. A distributed timing system is comprised of many components, and the reliability of each affects the overall availability. Network redundancy protocols such as Rapid Spanning Tree Protocol (RSTP) are a means of dealing with network failures in a looped or meshed network [12], but do not address network failures at the point a grandmaster clock connects to the network. Uncertainty in timing systems also affects performance, and is affected by the loss or degradation of grandmaster clocks [13]. The influence of network topology on SAS reliability is significant, and its network design is a critical component of a modern SAS [14], [15]. Some process bus implementations avoid centralized time synchronization, but this results in many point to point Ethernet connections [16]. This paper presents a quantitative assessment using Fault Tree Analysis (FTA) for several timing system architectures that use the C37.238 power profile. Two new architectures are presented that take advantage of the Best Master Clock (BMC) algorithm in IEEE 1588. These architectures interconnect grandmaster clocks, each with multiple PTP interfaces, to provide multiple sources of synchronization in redundant protection systems. The effectiveness of BMC, as used in these topologies, is assessed with a PTP test bed against the 1 µs performance benchmark. This allows various failure modes and mitigation techniques to be tested with commercially available PTP products. Detailed reliability analysis of synchronizing systems is intended to inform the design of timing systems, and to provide confidence in the technology for future process bus substations and for other advanced SAS applications. A quantitative assessment of a timing

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allow for these clocks to be taken out of service (forced or planned outages) without affecting the operation of the protection system. Other substation applications (with the exception of wide area protection and GPS based feeder differential protection) generally use time synchronization to enhance logging or fault finding, but do not rely upon timing systems for normal operation. Fig. 1.

Components of a PTP grandmaster.

B. PTP Reliability system’s availability enables the system to be tailored to the application—avoiding over-design or inadequate performance. Background information, including application and regulatory requirements, is presented in Section II. The effectiveness of grandmaster redundancy is evaluated with FTA in Section III. The experimental methods for assessing the effectiveness of redundancy are presented in Section IV, and the corresponding results are shown in Section V. The impact of these results on PTP for process bus applications are discussed in Section VI, with final conclusions presented in Section VII. II. BACKGROUND The operation of electricity substations in most countries is regulated by a combination of standards and grid codes. International standards define many of the requirements for equipment used in a substation, while grid codes specify the design, operational, performance and maintenance requirements of substations. Standards are largely harmonized throughout the world, however grid codes can vary significantly between jurisdictions. A. Requirements for Protection Reliability Australia’s National Electricity Market (NEM) covers the mainland states of New South Wales, Queensland, South Australia and Victoria, along with the island state of Tasmania. The operation of the NEM is regulated by the National Electricity Rules (NER) [17]. Network service providers are required to provide protection systems with sufficient redundancy so faults are cleared within the time specified in the NER when any single protection element is out of service. This includes any communication facilities that the protection system depends upon. The system operator may require the outage of the protected plant if one of its protection systems is out of service when there is a threat to system security. Each feeder or transformer is protected by two (or more) independent protection schemes to meet the NER requirements for redundancy. The terminology for the protection schemes vary between utilities, but common terms are “A and B”, “Main 1 and Main 2” and “X and Y”. The latter terminology is used in the rest of this paper. A PTP grandmaster is a critical component in a Substation Automation System that uses PTP synchronized sampled values, as it synchronizes sampling throughout the substation. The system design must

Several groups have looked at the performance and fault-tolerance of PTP timing systems. The reliability of the individual components is important, as this affects the overall performance of a fault-tolerant system. A grandmaster that estimates the drift of its internal oscillator will be more accurate [18]. A concern for fail-over redundancy is the time required for grandmaster selection to take place, as slave clocks will be free-running while there is no active grandmaster [13]. There is also a concern regarding the slave servo response when there is a change of active grandmaster [19], and it has been suggested that the election of a new grandmaster can take hundreds of seconds [20]. The servo response of slave clocks was identified as a concern in [21], however it was questioned whether a time step would be a PTP slave test case. The results presented in [6] show that this is indeed a necessary test, as grandmaster corrections following drift produce such time steps. A formal clock synchronization model is presented in [22], along with the “master group” concept. This improves the robustness of a timing system. The possibility of detecting slave clock loss through missing DelayReq messages has been proposed in [22], but this is not applicable to substation timing for two reasons. The first is that the peer-delay timing method is mandated by the C37.238 profile, so there are no DelayReq messages. Secondly, the PeerDelayReq messages used for peer-delay measurement are optional for slave clocks that implement the C37.238 profile. A slave clock that can estimate the error of the grandmaster is presented in [20]. Such a clock would enable alarms to be raised if the accuracy requirements of the application (e.g. process bus or synchrophasors) were not met. C. Grandmaster Components A grandmaster generally consists of the following components, each shown in Fig. 1: Global navigation satellite system (GNSS) antenna, antenna cabling, a GNSS receiver that regulates a local oscillator, digital pulse outputs such as 1-PPS or IRIG-B (for devices that are not yet capable of using PTP), a PTP network interface with hardware support for time-stamping, and a power supply. A grandmaster may be able to use the GNSS to model the characteristics of the local clock, and use this model to provide improved holdover performance by compensating for temperature and aging [23]. Each of these components has an inherent reliability, the failure of which will render the grandmaster inoperable (with the exception of the digital pulse interface).

D. INGRAM et al.: QUANTITATIVE ASSESSMENT OF FAULT TOLERANT PRECISION TIMING FOR ELECTRICITY SUBSTATIONS

Some grandmasters incorporate redundant power supplies, multiple network connections, or a combination of the two. The grandmaster may also provide Network Time Protocol (NTP) services for applications that have less stringent accuracy requirements. GNSS antennae are usually active devices with low noise amplifiers or down-converters located at the antenna. An induced over-voltage from a lightning strike or high voltage flashover within the substation may damage the electronics and disable the timing system. Ideally the GNSS antenna will be located near the receiver, but an unobstructed view of the sky is required. For the purposes of reliability modeling the antenna cable is included in the antenna reliability figure, and the remaining components (power supply, GNSS receiver, local clock, and interfaces) are considered as a single device, which is referred to as the grandmaster. PTP is a network protocol, and so there are additional failure modes for a grandmaster, in addition to GNSS specific failure modes. These include failures of connecting cables (copper or fiber optic) and failure of Ethernet switches used to distribute the PTP messages to client devices. The BMC algorithm specified in section 9.2 of IEEE Std 1588 selects the active grandmaster using the following criteria, in order, until a unique selection is made: priority1, clockClass, clockAccuracy, offsetScaledLogVariance, priority2 and clockIdentity. The clockClass in a GNSS synchronized grandmaster Announce message will change from 6 (synchronized) to 7 (within holdover specification), and then to 52 (outside holdover specification) when GNSS synchronization is lost. The clockAccuracy field represents synchronizing error in terms of time, with common values ranging from 2116 (±100 ns) to 2516 (±10 µs). The combination of clockClass and clockAccuracy is generally sufficient to hand over the grandmaster role from a defective grandmaster to an alternative. When the timing system is intact and the priorities are equal (priority1 and priority2) the decision is made using clockIdentity. This is a 64-bit number (EUI-64) based on the clock’s Ethernet address. The clock with the “lowest” EUI-64 (byte-wise comparison starting with the most significant byte of the EUI-64) address is selected as the grandmaster. III. G RANDMASTER AVAILABILITY A sampled value process bus protection system is more complex than traditional protection systems that use analog inputs. The reliability of process bus networks has been evaluated by Tournier and Werner using an “availability” approach [15]. Assessing the Mean Time Between Failure (MTBF) and Mean Time To Repair (MTTR) for a GPS based system has been estimated to require observations over many years, and therefore the availability of GPS is currently estimated through modeling [24]. Modeling in this paper is based upon the FTA and “unavailability” calculations of substation automation presented by Sheer [25]. More

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TABLE I R ELIABILITY ESTIMATES FOR PTP COMPONENTS . Component

MTBF

Unavailability

GPS Antenna

39.5 years

QA = 46.3 × 10−6

Grandmaster

15.3 years

QG = 119 × 10−6

Transparent Clock

22.3 years

QT = 82.0 × 10−6

detail on the construction and use of FTA can be found in [26]. A. Component Reliability Reliability information has been taken from private correspondence with manufacturers of commercially available PTP equipment and some publically available MTBF data. The manufacturers have used either MIL-HDBK-217 or Telcordia SR332 to estimate MTBF [27], [28]. The MTBF of GPS antennae ranged from 20 to 59 years, while the grandmaster clocks incorporating GPS receivers had MTBFs ranging from 14 to 17 years. Transparent clocks had MTBFs from 14 to 33 years. Grandmaster reliability figures incorporate reliability of the GPS receiver, network interfaces and power supply components. The averaged estimates of reliability and unavailability for PTP timing components are presented in Table I. The MTTR is 16 hours to meet established maintenance standards for critical protection devices in Queensland, and is based on the replacement, rather than repair, of a failed device. Unavailability, represented by Q, is calculated from the MTBF and MTTR using Eqn. (1) and represents the fraction of time that a device will not be functional, and is therefore dimensionless. Q=

MT T R , M T T R ≪ M T BF M T BF

(1)

B. Topologies The simplest approach to improve the reliability of a PTP timing system is to duplicate the timing equipment, and is the approach often taken with power system protection. A separate grandmaster is used for each of the X and Y protection systems, and is shown in Fig. 2(a). This allows for protection operation to be maintained in the event of a PTP timing system failure on either the X or the Y system. This is the minimum level of redundancy that meets the requirements of the NER. A fault tree for the timing sub-system is shown in Fig. 2(b). The X or Y timing system fails if the antenna, grandmaster or transparent clock fails. For a system failure to occur, a failure needs to occur simultaneously in both the X and Y systems. The OR gate represents any one input resulting in failure, while the AND gate represents all inputs need to fail before failure occurs. Fault tree symbology is given in Table IV-1 of [26]. This is a major difference between Reliability Block Diagrams (RBD) and fault trees, as an RBD often follows the physical topology.

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A bottom-up method using Boolean reduction has been used to deal with the MOEs. The Boolean expression for the top event in Fig. 3(c) is given by Eqn. (2). The expression for Fig. 3(d) is structured similarly in Eqn. (3). The Boolean identities a · a = a and a+a b = a have been used to simplify the expressions. The unbracketed + represents an OR, and the terms around the + are termed “cut-sets”, as any one cut-set occurring results in a failure event, X. X = ((A + B) (C + D) + E) · ((A + B) (C + D) + F ) =C (A + B) + D (A + B) + F E (2) X = ((A + B) (C + D) + E) · ((C + D) (F + G) + H) =ACF + BCF + ADF + BDF + CEF + DEF + ACG + BCG + ADG + BDG + CEG + DEG+ ACH + BCH + ADH + BDH + EH (3)

C. Fault Tree Analysis

Fig. 2. Basic redundant timing through duplication: (a) topology and (b) the corresponding fault tree.

Grandmasters clocks with more than one PTP network interface allow for more complex topologies. Two such arrangements are proposed in Fig. 3. Fig. 3(a) is a topology where two dual-port grandmasters are connected to both the X and Y root switches. Electrical isolation of redundant protection systems is required, and therefore each grandmaster should have at least one fiber optic Ethernet interface for connection to the other system. The “cross-over” ports should have a larger priority1 setting so the local grandmaster is the preferred grandmaster. Fig. 3(b) takes this a step further by introducing a third grandmaster (referred to as “Z”) that provides backup timing to both the X and Y systems. Again, the connections between the Z grandmaster and the X and Y systems should be non-electrical, and the Z priority1 setting should be set so the X and Y grandmasters are the defaults for their respective systems. The fault trees for Fig. 3(a-b) are shown in Fig. 3(cd) with the letters A–H representing events. Some events occur on both sides of the top AND gate and are termed Multiple Occurring Events (MOE). As a consequence straightforward bottom-up calculations will give erroneous results [29]. The X and Y protection systems will operate with any one grandmaster in the failed state. This is an improvement over the previous topology, where the failure of a grandmaster disabled the associated protection system.

Unavailability estimates for the GPS antenna (QA ), the grandmaster (QG ) and the transparent clock (QT ) are taken from Table I. While the probability of events A and C is QA and the probability of events B and D is QG in Fig. 3(c), the events are not the same. Consequently further Boolean reduction is not possible. Similarly, events A/C/F, B/D/G and E/H in 3(d) have the same probability of occurring, but are independent events. The unavailability of a timing system with no redundancy, QSingle , is the addition of the component unavailabilities and is given by Eqn. (4). The duplicate timing system, shown in Fig. 2, squares the unavailability of the single system as an AND gate multiplies the probability of failure of the X and Y systems. This unavailability, QDup , is given by Eqn. (5), and does not require Boolean reduction. QSingle = QA + QG + QT

QDup

= =

(QA + QG + QT )2 (QA + QG )2 + Q2T + 2QA QT +2QG QT

(4)

(5)

Eqn. (6) defines the unavailability of the duplicate system with cross-connected grandmasters, based on the fault tree in Fig. 3(c) and the Boolean reduction in Eqn. (2). QCross

= =

QA (QA + QG ) + QG (QA + QG )2 +QT · QT (6) (QA + QG )2 + Q2T

Eqn. (7) represents the unavailability of the triple grandmaster fault tree shown in Fig. 3(d). Any two of the grandmasters can fail and either of the transparent clocks can fail and the protection system will remain operational. The additional (QA + QG + 2QT C ) term reduces the unavailability with the triple grandmaster,

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Fig. 3. Complex redundant timing topologies: (a) cross-connected dual-port grandmasters and (b) a shared third grandmaster with dual network connection. (c) and (d) are the fault trees for (a) and (b) respectively. The X, Y and Z components are shaded for identification.

resulting in the transparent clock term, Q2T , dominating as this is the only second order term.

TABLE II U NAVAILABILITY ESTIMATES FOR PTP SYSTEM TOPOLOGIES . Topology

Q3GM =Q3A + Q3G + Q2T + 3Q2A QG + 2Q2A QT + 3QA Q2G + 2Q2G QT + 4QA QG QT

MTBF

QSingle = 2.474 ×

10−4

7.38 yr

QDup = 6.121 ×

10−8

29 813 yr

Cross-connected GM

QCross = 3.410 × 10−8

53 525 yr

Shared third GM

Q3GM = 6.725 × 10−9

271 419 yr

Single

(7)

= (QA + QG )2 (QA + QG + 2QT ) + Q2T

The addition of the third grandmaster significantly improves the reliability of the X or Y systems, which is given by Eqn. (8). This is a measure of how reliable timing is within the X or Y system. Q3GM is not simply the product of QX and QY as there are common events in both (the Z system). Clock performance verification may be required more often than similar tests on protection relays and communications equipment until in-service performance is ascertained. The triple grandmaster topology enables any one of the three grandmasters to be taken out of service without disabling either of the X or Y protection systems. QX = QY = (QA + QG )2 + QT

Unavailability

(8)

Table II lists the unavailability and MTBF for the various grandmaster (GM) topologies, based on the parameters in Table I and Equations (4)–(8). The lower

Duplicated

limit of unavailability is set by the unavailability of the transparent clocks. IV. E XPERIMENTAL M ETHOD Two categories of tests were conducted. Firstly, the response of slave clocks to GPS outages at the grandmaster were tested, as an extension of the work presented in [6], to verify that the observed results occurred with all available grandmasters. The second set of tests assessed the performance of the PTP timing system with grandmaster redundancy under a range of contingencies. The overall accuracy of time synchronization is the measure of how well the system is performing. The ±1 µs requirement of the 9-2LE

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A. Measurement System and Accuracy Estimate

Fig. 4. Substation precision timing test bed for process bus applications. (a) is the hardware and (b) is a schematic representation. Connections were made to the 1-PPS outputs of the two grandmasters being tested and to the two slave clocks. The delay between each was measured by the digital oscilloscope.

guideline was used as the benchmark of acceptable performance during grandmaster contingency tests. The settings required by the C37.238 Power Profile, with the exception of additional data required by C37.238 in the Announce message, were used by all PTP devices. The AnnounceTimeout was set to 3 s for all grandmasters. The PTP test bed was composed of three grandmaster clocks (Meinberg M600/MRS/PTP, RuggedCom RSG-2288 and Tekron TCG 01-E), three slave clocks (two RuggedCom RSG-2288 clocks and one Tekron TTM 01-E) and four transparent clocks (Cisco CGS-2520, Hirschmann MACH1040, Hirschmann MICE and RuggedCom RSG-2288). Fig. 4(a) shows the hardware used in the test bed, and Fig. 4(b) shows the connection arrangements. PTPA, PTPC and PTPD were the network identifiers for the three grandmaster clocks used in the test bed. PTPB and PTPF were the two slave clocks used, and a single transparent clock was used to interconnect these ordinary clocks. The use of a transparent clock avoided any shortcomings that may have arisen through the use of end-end delay estimates or use of IEEE 1588-2002 (PTPv1).

The following sub-sections describe how this equipment was used to test the resilience of a PTP timing system.

The test method used to assess synchronizing performance used the 1-PPS electrical outputs of the grandmaster and slave clocks, which is an established technique [30]–[32]. A digital oscilloscope (Tektronix DPO2014) sampling at 109 samples/s measured the time difference (which is referred to as “delay” in these results) between the reference (grandmaster) and slave clocks for the duration of each test. A computer recorded each measurement for statistical analysis. Each grandmaster sent a Simple Network Management Protocol (SNMP) “trap” message that time-stamped when the antenna connection state changed. PTP Ethernet frames were captured from the grandmasters for analysis of the Announce messages. The test bed had three grandmasters available, but only two were connected at any time. This enabled the operation of the BMC algorithm to be tested under a variety of conditions. This type of handover was required by the redundant connections shown in Fig. 3(a) and Fig. 3(b). The 1-PPS outputs of the two active grandmasters were connected to the oscilloscope for delay measurement, along with the 1-PPS outputs of the two slave clocks. The time base of the oscilloscope was checked using a GPS-locked 10 MHz reference signal, and found to be within 7 ppm of the reference. 1-PPS delay measurement accuracy assessed by measuring the delay between the same signal on channel 1 (the reference) and channels 2–4 (the measuring channels) 1800 times. The mean delay was 1.0 ns with a standard deviation of 1.6 ns. Delays were bounded within –6 ns to +3.5 ns. Each failure and recovery test was conducted three times. The results were compared and found to be consistent between repetitions. These experiments, and those in [6], found that the response of the slave clocks to grandmaster corrections was based on the size of the correction. B. Network Failure The response of the BMC algorithm to two common failures (network outage and GPS failure) was tested using three grandmasters. The adoption of the active grandmaster role by another grandmaster when the previously active grandmaster ceases transmitting Announce messages was tested by removing the network connection from the preferred grandmaster for one minute. The other grandmaster waited for the portDS.announceReceiptTimeout to elapse, which was set to 3 s, before transmitting Sync and Announce messages. The 1-PPS output of two slave clocks and the 1-PPS output of the backup grandmaster was monitored relative to the initial grandmaster. This allowed for synchronizing transients to be detected, as identified by Kozakai and Kanda [19]. PTP Ethernet traffic was captured for 30 s prior to the network disconnection until 60 s after the network was reinstated. The failure of electronics within the grandmaster, or its power supply, resulted in a similar failure to network disconnection. The recovery from a power outage takes

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longer due to the boot time of the microprocessor, and additional time is required for the time reference to stabilize. C. GPS Receiver Failure Previous research in this area identified that grandmaster clocks can deviate from International Atomic Time (TAI), and exceed their holdover specification, when the GPS antenna is poorly positioned [6]. Slave clocks respond differently when the grandmaster corrects its internal clock, as the servo loop characteristic is not standardized. This has ramifications for substation devices that use the 1-PPS output of the slave clocks. These tests further investigate this effect with three grandmasters from different manufacturers, each with a different class of internal oscillator. The oscillators used were an uncompensated crystal oscillator (XO), a temperature compensated crystal oscillator (TCXO) and an oven controlled crystal oscillator (OCXO). In each test the antenna was disconnected from the grandmaster under test and the deviation from the other grandmaster (which remained synchronized to GPS) was monitored. The drift was allowed to reach 1 µs and 2 µs, and then the antenna was reconnected. V. R ESULTS In this section the results of experimental work evaluating the slave response to grandmaster failure events, with and without redundancy, are presented. These results assess the performance of the algorithms that the redundant timing topologies (cross connected and third grandmaster) rely upon. A. Slave Response to Grandmaster Network Failure Three sets of tests evaluating the failure of the network connection between the grandmaster and the transparent clock were performed. These were: • PTPA and PTPC • PTPA and PTPD • PTPC and PTPD PTPD had a fixed 600 ns offset in its internal clock (inherent, due to the design of the clock) relative to PTPA and PTPC. While this is not ideal, this did demonstrate that the slave clocks were resynchronizing to the new grandmaster. Fig. 5 illustrates this with a network outage of PTPC, with PTPD acting as the backup. The top panel of Fig. 5 shows the 1-PPS offset of PTPD (backup grandmaster) , PTPB (slave clock) and PTPF (slave clock) from PTPC (main grandmaster). The lower panel shows the source of Sync messages throughout the test. The PTPA/PTPD results were very similar to PTPC/PTPD, and are not shown. The following sequence of events occurred: 1) The network connection to PTPC was broken at 17h59m30s. 2) The announce timeout of 3 s elapses. 3) PTPD starts transmitting at 17h59m34s.

Fig. 5. Slave clock 1-PPS transients in response to a network outage of the PTPC grandmaster, with PTPD acting as the backup grandmaster (GM).

Fig. 6. Slave clock 1-PPS transients in response to a network outage of the PTPA grandmaster, with PTPC acting as the backup grandmaster (GM).

4) The slave clocks synchronize to PTPD at 17h59m42s. When PTPC is reconnected a similar sequence takes place: 1) The network connection to PTPC was restored at 18h00m30s. 2) Ethernet port negotiation takes 5 s to complete. 3) PTPC starts transmitting at 18h00m35s. 4) PTPD detects the Announce message from PTPC and ceases operating as the grandmaster at 18h00m36s. 5) PTPB synchronizes to PTPC at 18h00m41s. 6) PTPF synchronizes to PTPC at 18h00m43s. The maximum error between the two slave clocks was 782 ns at 18h00m43s, and was due to the different transient response of the slave clocks. The time offset between PTPD and PTPC remained constant as both grandmasters were synchronized to the GPS system. This is an extreme example where there was an offset between grandmasters, however in the case with PTPA and PTPC there were no discernible transients during the handovers, as shown in Fig. 6. When there is no offset between the internal clocks of the two grandmasters the transient response of the slave clocks is no longer significant. The synchronizing result with the failure of power to a grandmaster is very similar to Fig. 6, however the restoration time is two to three minutes rather than five seconds.

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Fig. 7. Slave clock 1-PPS response to a grandmaster (GM) losing GPS synchronization, with a backup grandmaster available.

B. Slave Response to Grandmaster Sync Failure The response of the two slave clocks to grandmaster corrections was recorded under a number of different conditions. Three grandmasters (PTPA, PTPC and PTPD) were each allowed to drift from TAI by disconnecting their GPS antenna. One of the other grandmasters was used as a GPS locked TAI reference. Once the drift reached approximately 1 µs the antenna was reconnected and the transient responses observed. The results confirmed that the transient responses shown in [6] (Fig. 11 and Fig. 12) occur with different models of grandmaster. Fig. 14 and Fig. 15 in [21] also show that the slave response is equal in magnitude and opposite in sign to the time step experienced by the grandmaster.Fig. 7 shows the slave and grandmaster 1-PPS performance, as well as the active source of Sync messages, when a backup grandmaster is added to the timing system. The test proceeded as follows: 1) The GPS antenna on PTPA was disconnected at 17h49m02s, however Sync and Announce messages continued to be sent by PTPA. 2) PTPC started transmitting Sync and Announce messages at 17h49m16s when it determined that it had a higher quality clock than PTPA. 3) PTPA stopped transmitting PTP messages after three Announce messages from PTPC were received. 4) The internal clock of PTPA wandered at 4.5 ns/s. 5) The GPS antenna was reconnected to PTPA when the wander was approximately –1 µs at 17h53m00s. 6) After 3 s elapsed PTPA started transmitting Sync and Announce messages. 7) PTPC ceased transmission after reception of one Announce message from PTPA and the slave clocks resynchronized to PTPA after 5 s. Throughout this process the maximum deviation between the slave clocks is 338 ns at 17h52m20s, half the deviation observed when a single grandmaster recovered from a 1 µs deviation from GPS time. VI. D ISCUSSION A. Reliability Analysis Fault tree analysis has shown that duplication of the synchronizing component of a sampled value pro-

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tection system has significantly reduced unavailability. The inherent unavailability of the GPS antenna, grandmaster and transparent clock is 2.474 × 10−4 , which results in a significant reduction in unavailability when two systems are used. If the grandmaster was less reliable then this improvement would be less significant, and therefore using reliable components provides a significant advantage when duplicating systems. The MTBF achieved by cross-connecting the two grandmasters in a redundant system increased by 80% to 53 525 years. The proposed topology with a third shared grandmaster gives greater gains than the cross-connect topology. The timing system MTBF exceeds 200 000 years, and the MTBF of the X and Y timing systems in isolation increases from 6.3 years to 22.3 years. PTP equipment vendors estimate the marginal cost of a second PTP Ethernet port to be 10% of a single port grandmaster. The reliability improvements justify the small cost increase of the hardware. The cross-connect and triple-grandmaster systems allow both the X and Y protection systems can be considered “in service” even when one grandmaster is out for maintenance. This increases the likelihood that the power system operator will allow the protected high voltage plant to remain in service while a grandmaster is maintained. PTP is a new technology for substation applications, and this additional redundancy will be an advantage to utilities trialing networked time synchronization for sampled value or synchrophasor applications. B. Best Master Clock Performance The two redundant-but-interconnected timing architectures proposed in this paper reply upon a clean handover from a failed or degraded grandmaster to a backup grandmaster. The results presented here show that the BMC algorithm, as implemented by three grandmasters and two slave clocks, is able to achieve this. Fig. 5 and Fig. 6 demonstrate that the failure of a network connection between the primary grandmaster clock and the transparent clock does not introduce a significant 1-PPS offset transient in the output of slave devices when the active grandmaster changes. The accuracy requirement of 1 µs from the 9-2LE guideline is met, however greater accuracy is obtained if the internal clocks in the redundant grandmasters do not have an offset from each other. This result is contrary to that found by Kozakai and Kanda [19], and has been repeated with a range of makes and models of grandmaster. The time required for the BMC algorithm to elect a new grandmaster when the previously active grandmaster stops is three seconds—the product of the Announce rate (1 s) and AnnounceTimeout (3). A lower priority grandmaster stops transmitting after one Announce message. This is a significant performance improvement over PTPv1, and shows the benefit of using PTPv2 for this test bed. One disadvantage of such faster recovery is that the BMC algorithm may

D. INGRAM et al.: QUANTITATIVE ASSESSMENT OF FAULT TOLERANT PRECISION TIMING FOR ELECTRICITY SUBSTATIONS

not operate correctly for large networks if the RSTP convergence time exceeds the announce timeout interval [12]. A step change in time by a grandmaster, often following a loss of synchronization with the GPS system, was found in [6] to generate grandmaster/slave offset transients in the output of slave clocks. These transients are equal in magnitude, but opposite in sign, to the grandmaster’s correction. Further testing has confirmed that these 1-PPS offset transients are generated by a variety of makes and models of grandmaster, and are unlikely to be a device specific issue. A backup grandmaster, enabled when the failed grandmaster reports poor time quality, addresses this problem. Fig. 7 shows that the slave clocks synchronized to the alternative grandmaster rather than tracking the faulty grandmaster, and resynchronized with the primary grandmaster when its time quality improved. VII. C ONCLUSIONS Reliability analysis using FTA has been presented in this paper, with results showing that a high level of reliability can be achieved if grandmaster redundancy is used. The topologies used require the BMC algorithm to select the active clock, and experimental results have shown that the BMC algorithm is effective in responding to outages affecting the active grandmaster clock. The disconnection of a GPS antenna was used as the test case for degraded performance, and the disconnection of the grandmaster network connection was also a test case for a total grandmaster failure. The slave clock response to BMC mediated handovers meets the 1 µs requirement of the widely adopted 9-2LE implementation guideline for sampled value process buses. The most reliable solution proposed in this paper, the third shared grandmaster, significantly improves reliability of the PTP system over that of simple duplicated timing. Further modeling and analysis is required to fully determine the reliability of substation applications that are synchronized by PTP. FTA is straightforward to apply, however one must use Boolean reduction when MOEs occur across AND gates, otherwise the outcomes will be overly optimistic. A reliable and dependable network based time synchronization system will enable “whole of station” process bus systems to be developed. System integrators and utility decision makers require confidence that PTP timing systems will meet the required performance standards, yet not be over-engineered. The quantitative assessment of availability based on FTA presented in this paper is a tool that can be used to achieve this, and application of FTA to a range of timing topologies has demonstrated the use of this technique. ACKNOWLEDGMENTS Belden Solutions, Cisco Systems and Meinberg Funkuhren kindly contributed hardware for the process bus PTP test bed.

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R EFERENCES [1] K. Behrendt and K. Fodero, “The perfect time: An examination of time-synchronization techniques,” in Proc. 33rd Ann. West. Prot. Rel. Conf., Spokane, WA, USA, 17–19 Oct. 2006, pp. 1–19. [Online]. Available: http://www.pes-psrc.org/i/ TP6226_PerfectTime_KB_20050922.pdf [2] F. Steinhauser, C. Riesch, and M. Rudigier, “IEEE 1588 for time synchronization of devices in the electric power industry,” in Proc. 2010 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Portsmouth, NH, USA, 27 Sep. – 1 Oct. 2010, pp. 1–6. [3] D. M. E. Ingram, P. Schaub, D. A. Campbell, and R. R. Taylor, “Evaluation of precision time synchronisation methods for substation applications,” in Proc. 2012 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), San Francisco, CA, USA, 25–28 Sep. 2012, pp. 37–42. [4] IEEE Instrumentation & Measurement Society, IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, IEEE Std. 1588-2008, 24 Jul. 2008. [5] C. M. De Dominicis, P. Ferrari, A. Flammini, S. Rinaldi, and M. Quarantelli, “On the use of IEEE 1588 in existing IEC 61850-based SASs: Current behavior and future challenges,” IEEE Trans. Instrum. Meas., vol. 60, no. 9, pp. 3070–3081, Sep. 2011. [6] D. M. E. Ingram, P. Schaub, and D. A. Campbell, “Use of precision time protocol to synchronize sampled value process buses,” IEEE Trans. Instrum. Meas., vol. 61, no. 5, pp. 1173– 1180, May 2012. [7] R. Moore, R. Midence, and M. Goraj, “Practical experience with IEEE 1588 high precision time synchronization in electrical substation based on IEC 61850 process bus,” in IEEE PES Gen. Meet. 2010, Minneapolis, MN, USA, 25–29 Jul. 2010, pp. 1–4. [8] UCAIug. (2004, 7 Jul.) Implementation guideline for digital interface to instrument transformers using IEC 61850-9-2 R2-1. UCA International Users Group. Raleigh, NC, USA. [Online]. Available: http://iec61850.ucaiug.org/ Implementation%20Guidelines/DigIF_spec_9-2LE_ R2-1_040707-CB.pdf [9] C. Brunner and G. S. Antonova, “Smarter time sync: Applying the IEEE PC37.238 standard to power system applications,” in Proc. 64rd Ann. Conf. Prot. Rel. Eng., College Station, TX, USA, 11–14 Apr. 2011, pp. 91–102. [10] IEEE PES PSRC Working Group H7/Sub C7 Members and Guests, “Standard profile for use of IEEE Std 1588-2008 Precision Time Protocol (PTP) in power system applications,” in Proc. 2012 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), San Francisco, CA, USA, 25–28 Sep. 2012, pp. 31–16. [11] IEEE PSRC WG I19, “Redundancy considerations for protective relaying systems,” in Proc. 63rd Ann. Conf. Prot. Rel. Eng., College Station, TX, USA, 29 Mar. – 1 Apr. 2010. [12] R. Harada, A. Abdul, and P. Wang, “Best practices of transporting PTPv2 over RSTP networks,” in Proc. 2012 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), San Francisco, CA, USA, 25–28 Sep. 2012, pp. 102–107. [13] P. Ferrari, A. Flammini, S. Rinaldi, A. Bondavalli, and F. Brancati, “Experimental characterization of uncertainty sources in a software-only synchronization system,” IEEE Trans. Instrum. Meas., vol. 61, no. 5, pp. 1512–1521, May 2012. [14] G. W. Scheer and D. J. Dolezilek, “Comparing the reliability of Ethernet network topologies in substation control and monitoring networks,” in 2000 West. Pwr Deliv. Autom. Conf., College Station, TX, USA, 2000, pp. 1–15. [15] J.-C. Tournier and T. Werner, “A quantitative evaluation of IEC61850 process bus architectures,” in IEEE PES Gen. Meet. 2010, Minneapolis, MN, USA, 25–29 Jul. 2010, pp. 1–8. [16] P. Schaub, A. Kenwrick, and D. Ingram, “Australia leads with process bus,” Transm. Distrib. World, vol. 64, no. 5, pp. 24–32, May 2012. [Online]. Available: http:// tdworld.com/go-grid-optimization/transmission/ powerlink-queensland-process-bus-050112/ [17] AEMC. (2013, 1 Jan.) National Electricity Rules (version 54). Australian Energy Market Commission. Sydney, NSW, Australia. [Online]. Available: http://www.aemc.gov.au/Electricity/ National-Electricity-Rules/Current-Rules.html

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[18] J.-C. Tournier and Xiao Yin, “Improving reliability of IEEE1588 in electric substation automation,” in Proc. 2008 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Ann Arbor, MI, USA, 22–26 Sep. 2008, pp. 65–70. [19] Y. Kozakai and M. Kanda, “Keeping clock accuracy on a master clock failure in substation network,” in Proc. 2010 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Portsmouth, NH, USA, 27 Sep. – 1 Oct. 2010, pp. 25–29. [20] A. Bondavalli, F. Brancati, A. Flammini, and S. Rinaldi, “Master failure detection protocol in internal synchronization environment,” IEEE Trans. Instrum. Meas., vol. 62, no. 1, pp. 4–12, 2013. [21] S. Schriegel, D. Kirschberger, and H. Trsek, “Reproducible IEEE 1588-performance tests with emulated environmental influences,” in Proc. 2010 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Portsmouth, NH, USA, 27 Sep. – 1 Oct. 2010, pp. 146–150. [22] G. Gaderer, P. Loschmidt, and T. Sauter, “Improving fault tolerance in high-precision clock synchronization,” IEEE Trans. Ind. Informat., vol. 6, no. 2, pp. 206–215, May 2010. [23] H. Kim, X. Ma, and B. R. Hamilton, “Tracking lowprecision clocks with time-varying drifts using kalman filtering,” IEEE/ACM Trans. Netw., vol. 20, no. 1, pp. 257–270, Feb. 2012. [24] W. Y. Ochieng, K. Sauer, D. Walsh, G. Brodin, S. Griffin, and M. Denney, “GPS integrity and potential impact on aviation safety,” J. Navig., vol. 56, no. 1, pp. 51–65, Jan. 2003. [25] G. W. Scheer, “Answering substation automation questions through fault tree analysis,” in 4th Ann. Texas A&M Substat. Autom. Conf., College Station, TX, USA, 8–9 Apr. 1998. [26] W. Vesely, F. Goldberg, N. Roberts, and D. Haasl, “Fault tree handbook,” U.S. Nuclear Regulatory Commission, Washington, DC, USA, Handbook NUREG-0492, 1981. [Online]. Available: http://www.nrc.gov/reading-rm/ doc-collections/nuregs/staff/sr0492/ [27] Rome Laboratory, “Reliability prediction of electronic equipment,” US Department of Defense, Handbook MIL-HDBK217F, 2 Dec. 1991. [28] Telcordia, “Reliability prediction procedure for electronic equipment,” Telcordia, Handbook SR332 Issue 3, Jan. 2011. [29] C. A. Ericson, “Fault tree analysis,” in Hazard Analysis Techniques for System Safety. Hoboken, NJ, USA: John Wiley & Sons, Inc., 2005, ch. 11, pp. 183–221. [30] J. Amelot, Y.-S. Li-Baboud, C. Vasseur, J. Fletcher, D. Anand, and J. Moyne, “An IEEE 1588 performance testing dashboard for power industry requirements,” in Proc. 2011 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Munich, Germany, 12–16 Sep. 2011, pp. 132–137. [31] J. del Río, D. Toma, S. Shariat-Panahi, A. Mànuel, and H. G. Ramos, “Precision timing in ocean sensor systems,” Meas. Sci. Technol., vol. 23, no. 2, pp. 1–7, Dec. 2012. [32] P. Ferrari, A. Flammini, S. Rinaldi, and G. Prytz, “Evaluation of time gateways for synchronization of substation automation systems,” IEEE Trans. Instrum. Meas., vol. 61, no. 10, pp. 2612–2621, Oct. 2012.

David Ingram (S’94 M’97 SM’10) received the B.E. (with honours) and M.E. degrees in electrical and electronic engineering from the University of Canterbury, Christchurch, New Zealand, in 1996 and 1998, respectively. He is currently working toward the Ph.D. degree at the Queensland University of Technology, Brisbane, Australia, with research interests in substation automation and control. He has previous experience in the Queensland electricity supply industry in transmission, distribution, and generation. Mr. Ingram is a Chartered Member of Engineers Australia and is a Registered Professional Engineer of Queensland.

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Pascal Schaub received the B.Sc. degree in computer science from the Technical University Brugg-Windisch, Windisch, Switzerland, (now the University of Applied Sciences and Arts Northwestern Switzerland) in 1995. He was with Powerlink Queensland as Principal Consultant Power System Automation, developing IEC 61850 based substation automation systems. He is currently the Principal Process Control Engineer at QGC, a member of the BG Group. He is a member of Standards Australia working group EL-050 “Power System Control and Communications” and a member of the international working group IEC/TC57 WG10 “Power System IED Communication and Associated Data Models”.

Richard Taylor (M’08) received the B.E. (with honours) and M.E. degrees in electrical and electronic engineering from the University of Canterbury, Christchurch, New Zealand, in 1977 and 1979, respectively, and the Ph.D. degree from the University of Queensland, Brisbane, Australia in 2007. He is the former Chief Technical Officer of Mesaplexx Pty Ltd and currently holds a fractional appointment as an Adjunct Professor in the School of Electrical Engineering and Computer Science at the Queensland University of Technology. He started his career as a telecommunications engineer in the power industry in New Zealand. In the past 25 years he has established two engineering businesses in Queensland, developing innovative telecommunications products.

Duncan Campbell (M’84) received the B.Sc. degree (with honours) in electronics, physics, and mathematics and the Ph.D. degree from La Trobe University, Melbourne, Australia. He has collaborated with a number of universities around the world, including Massachusetts Institute of Technology, and Telecom-Bretagne, Brest, France. He is currently a Professor with the School of Electrical Engineering and Computer Science, Queensland University of Technology, Brisbane, Australia, where he is also the Director of the Australian Research Centre for Aerospace Automation (ARCAA). His research areas of interest are robotics and automation, embedded systems, computational intelligence, intelligent control, and decision support. Prof. Campbell is the Immediate Past President of the Australasian Association for Engineering Education and was the IEEE Queensland Section Chapter Chair of the Control Systems/Robotics and Automation Society Joint Chapter (2008/2009).

CHAPTER 8

Direct evaluation of IEC 61850-9-2 process bus network performance The correct operation of process bus protection systems is dependent on the timely delivery of sampled value messages containing current and voltage measurements. The transfer time specifications in Section 13 of IEC 61850-5 define the maximum allowable time to publish, transmit and interpret sampled value messages, and many protection relays block their protection functions if the transfer time limit is exceeded. Verification that sample value transfer times are within limits is therefore an essential step in commissioning a protection system. This chapter describes a novel test method that uses an Ethernet card with the ability to synchronise its time-stamping hardware to an external source. The merging unit publishing time can be determined from the time stamp applied to the captured sampled value data when the network capture card and merging unit are synchronised to each other. Two applications are presented that demonstrate the utility of the proposed method. The first determines the publishing time of a merging unit, measuring the time elapsed from a measurement being taken to the transmission of that measurement onto the Ethernet. The second application estimates the latency introduced by an Ethernet switch from a single measuring point, using prior knowledge of the merging unit publishing time. This is an alternative to differential packet timing, which is often impractical in a high voltage switchyard due to the distances involved.

©2012 IEEE. Reprinted, with permission, from D.M.E. Ingram, F. Steinhauser, C. Marinescu, R.R. Taylor, P. Schaub & D.A. Campbell, “Direct evaluation of IEC 61850-9-2 process bus network performance”, IEEE Transactions on Smart Grid, December 2012.

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Statement of Contribution The authors listed below have certified* that: 1.

they meet the criteria for authorship in that they have participated in the conception, execution, or interpretation, of at least that part of the publication in their field of expertise;

2.

they take public responsibility for their part of the publication, except for the responsible author who accepts overall responsibility for the publication;

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there are no other authors of the publication according to these criteria;

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potential conflicts of interest have been disclosed to (a) granting bodies, (b) the editor or publisher of journals or other publications, and (c) the head of the responsible academic unit, and

5.

they agree to the use of the publication in the student’s thesis and its publication on the QUT ePrints database consistent with any limitations set by publisher requirements.

In the case of this chapter: Title

Direct Evaluation of IEC 61850-9-2 Process Bus Network Performance

Publication

IEEE Transactions on Smart Grid

DOI

10.1109/TSG.2012.2205637

Status

Published, December 2012 (vol. 3, no. 4, pp. 1853–1854)

Contributor David M. E. Ingram

Statement of contribution* Test concept, experimental design, performed experiments, data analysis and drafting the manuscript.

12 October 2012 Duncan A. Campbell

Critical revision of the paper.

Cristian Marinescu

Test concept and experimental design

Pascal Schaub

Conception and design of the project, critical revision of the paper.

Fred Steinhauser

Test concept and experimental design

Richard R. Taylor

Critical revision of the paper.

Principal Supervisor Confirmation I have sighted email or other correspondence from all co-authors confirming their certifying authorship. Prof Duncan A. Campbell

12 October 2012 Signature

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1

Direct Evaluation of IEC 61850-9-2 Process Bus Network Performance David M. E. Ingram, Senior Member, IEEE, Fred Steinhauser, Cristian Marinescu, Member, IEEE, Richard R. Taylor, Member, IEEE, Pascal Schaub and Duncan A. Campbell, Member, IEEE,

Abstract—This letter presents a technique to assess the overall network performance of sampled value process buses based on IEC 61850-9-2 using measurements from a single location in the network. The method is based upon the use of Ethernet cards with externally synchronized time stamping, and characteristics of the process bus protocol. The application and utility of the method is demonstrated by measuring latency introduced by Ethernet switches. Network latency can be measured from a single set of captures, rather than comparing source and destination captures. Absolute latency measures will greatly assist the design testing, commissioning and maintenance of these critical data networks. Index Terms—Ethernet networks, IEC 61850, performance evaluation, power transmission, protective relaying, smart grids.

I. I NTRODUCTION AMPLED value process buses provide a digital connection between high voltage switchyards and Substation Automation Systems. IEC 61850-9-2 specifies how instantaneous sampled value (SV) measurements shall be transmitted over an Ethernet network by a “merging unit” or instrument transformer with electronic interface [1]. The “9-2 Light Edition” (“9-2LE”) implementation guideline reduces the complexity and difficulty of implementing an interoperable process bus based on IEC 61850-9-2 [2]. This is achieved by specifying the data sets that are transmitted, sampling rates, time synchronization requirements and the physical interfaces to be used. Performance requirements specified in IEC 61850-5 require that SV messages be delivered within 3.0 ms in transmission substations, including the communications processing time at each end and the media transfer time [3]. Each IEC 61850-9-2 SV message includes a sample counter, SmpCnt. This counter is reset to zero when the time synchronizing signal occurs. The SmpCnt counter will range from 0 to 3999 (50 Hz) or 4799 (60 Hz) for protection applications using 9-2LE with 80 samples per nominal power system cycle.

S

David Ingram, Richard Taylor and Duncan Campbell are with the School of Electrical Engineering and Computer Science, Queensland University of Technology, Brisbane, Queensland 4000, Australia (email: [email protected]; [email protected]; [email protected]). Fred Steinhauser and Cristian Marinescu are with OMICRON electronics GmbH, Klaus, Austria (email: [email protected], [email protected]). Pascal Schaub is with Powerlink Queensland, Virginia, Queensland 4014, Australia (email: [email protected]).

A precision Ethernet capture card records the time an Ethernet frame was received and prepends a precise time stamp to the captured frame [4]. Until now there has not been a method to check the time synchronization behavior and performance of a merging unit [5]. This letter presents an experiment that validates the method and demonstrates its utility. II. M ETHOD The source of one pulse per second (1-PPS) signals used to synchronize sampling of the merging unit is used to synchronize the time stamping unit in the Ethernet capture card. The propagation delay of the synchronizing signal through cables and any media or level converters needs to be quantified when assessing performance, and is typically less than 200 ns for cable lengths under 20 m. Precise delay measurements are best taken on the SmpCnt = 0 event, as this is the only sample that is precisely aligned to the synchronization source. A network capture is initiated and SmpCnt = 0 frames extracted for further analysis. The Ethernet capture card used to validate this method is the Endace DAG7.5G4, which has four 1000 Mb/s Ethernet interfaces. Frame arrival time stamps are precise to 7.5 ns and absolute time error is limited by the time source, and is typically less than 1 µs. The precision Ethernet capture card and RTDS GTNET-SV merging unit cards are key components of the process bus test bed described in [6], however this method is a new application for the test bed. Two validating experiments were performed. The first was the direct capture of SV frames from the three GTNET-SV cards with three separate ports on the Ethernet capture card. One GTNET-SV card generated the 1-PPS clock for the other two cards, and for the Ethernet capture card. This arrangement is shown in Fig. 1(a). A second experiment examined network latency when two Ethernet switches were placed between the merging units and the Ethernet capture card, which is representative of a large substation. These switches provided time synchronization using IEEE Std 1588 over Ethernet, Fig. 1(b). III. R ESULTS Over a fifteen minute period 900 measurements were taken for each experiment. The time delay between the 1 PPS pulse and the arrival of the SV frame with

2

Fig. 1. RTDS GTNET-SV connections to the DAG7.5G4 capture card, with (a) direct connection and (b) connection via two Ethernet switches.

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Fig. 2(b) shows that Ethernet switches introduce a delay, with queuing effects apparent. The minimum delay between the 1PPS event and the frame being received increases from 84 µs to 114 µs. This 30 µs switching delay (Tsw ) is expected as each of the two switches has a 3 µs overhead and 12 µs transmission time. Fig. 2(a) shows that “GTNET-SV 3” has slightly less delay than the other two cards (on average 900 ns), and consequently its frames are generally the first into the Ethernet switch output queue, resulting in a queuing advantage (Tq ) of approximately 12 µs. Some variation in Tq exists due to background traffic. The time synchronization performance of the PTPv2 clocks was measured during the capture test with a digital sampling oscilloscope. The measured synchronization error ranged between –96 ns and 144 ns throughout the fifteen minute observation period with 16 Mb/s of SV traffic on the same Ethernet switches. IV. C ONCLUSION This method of measuring the network performance of sampled value process buses uses the IEC 61850-9-2 protocol and synchronization of an Ethernet card to the time source used by a merging unit. This allows for single point measurements, which is the key benefit for type testing and commissioning process buses in transmission substations. Network performance can be evaluated in absolute terms and compliance with transfer times specified in IEC 61850-5 determined during commissioning where cable distances are significant. R EFERENCES

Fig. 2. Probability distribution of delays from three GTNET-SV cards, (a) direct connection between RTDS and DAG card and (b) DAG card connected to RTDS by two Ethernet switches, and PTPv2 used for synchronization. n = 900.

SmpCnt = 0 was consistent between the GTNETSV cards for any given measurement, but there was approximately 60 µs variation between measurements. This is an artifact of the RTDS simulation engine. Fig. 2(a) shows the delay as a probability density function. This particular measurement is ‘best case’ and can be used to determine additional network delays created by Ethernet switches and cabling.

[1] IEC TC57, Communication networks and systems in substations – Part 9-2: Specific communication service mapping (SCSM) – Sampled values over ISO/IEC 8802-3, IEC 61850-9-2:2004, Apr. 2004. [2] UCAIug. (2004, 7 Jul.) Implementation guideline for digital interface to instrument transformers using IEC 61850-9-2 R2-1. UCA International Users Group. Raleigh, NC, USA. [Online]. Available: http://iec61850.ucaiug.org/Implementation% 20Guidelines/DigIF_spec_9-2LE_R2-1_040707-CB.pdf [3] IEC TC57, Communication Networks and Systems in Substations – Part 5: Communication Requirements for Functions and Device Models, IEC 61850-5:2003, Jul. 2003. [4] J. Micheel, S. Donnelly, and I. Graham, “Precision timestamping of network packets,” in Proc. 1st ACM SIGCOMM Wkshp Internet Meas., San Francisco, CA, USA, 1–2 Nov. 2001, pp. 273–277. [5] F. Steinhauser and C. Marinescu, “Method and device for evaluating an electrical installation of an electrical power system,” Patent Application US 2011/0196627 A1, 2011. [6] D. M. E. Ingram, D. A. Campbell, P. Schaub, and G. Ledwich, “Test and evaluation system for multi-protocol sampled value protection schemes,” in Proc. 2011 IEEE Trondheim PowerTech, Trondheim, Norway, 19–23 Jun. 2011, pp. 1–7.

CHAPTER 9

Performance analysis of IEC 61850 sampled value process bus networks The use of real-time networking for critical functions such as protection is a significant change in philosophy for a utility. Evidence on how Ethernet process bus networks will behave will inform the ‘management of change’ processes used by utilities to control risk. This chapter investigates the nature of Ethernet traffic produced by sampled value merging units, and considers the implications of this traffic on Ethernet switches. The investigation was undertaken in two stages. The first stage captured the output of seven merging units at a process bus substation for detailed analysis. This was followed by testing in a controlled laboratory environment to assess the response of Ethernet switches to various types of sampled value traffic. The substation merging units were assessed using the technique presented in the previous chapter. This provided detailed information on the time taken by each merging unit to publish sampled value frames, as well as an evaluation of the inter-frame times. A key finding is that the merging units had very consistent publishing delays and inter-frame gaps. This ‘coherent transmission’ is the worst case for Ethernet queuing delays, due to the simultaneous arrival of sampled value messages from multiple sources. The switching performance of Ethernet switches with ‘bunched’ traffic (frames from multiple merging units arriving simultaneously) and evenly ‘spaced’ traffic is presented in this chapter. An interesting result is that once sampled value frames are queued by an Ethernet switch the additional delay introduced by subsequent switches is minimal. This allows the use of Ethernet switches in switchyards to aggregate multiple networked devices without incurring significant delay. Knowing how and when a system fails is an important stage in defining safe operating limits. The Ethernet switches in the test system were subjected to very high loads, with simulated traffic of up to 23 merging units. The results in this chapter confirm that operation with 21 merging units was possible (the theoretical limit is 22 merging units). This was achieved by plotting latency against time, which is a powerful tool to evaluate the dynamic performance of Ethernet switches. These figures clearly show when frames risk being lost before loss actually occurs. ©2012 IEEE. Reprinted, with permission, from D.M.E. Ingram, P. Schaub, R.R. Taylor & D.A. Campbell, “Performance analysis of IEC 61850 sampled value process bus networks”, IEEE Transactions on Industrial Informatics, August 2013.

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Statement of Contribution The authors listed below have certified* that: 1.

they meet the criteria for authorship in that they have participated in the conception, execution, or interpretation, of at least that part of the publication in their field of expertise;

2.

they take public responsibility for their part of the publication, except for the responsible author who accepts overall responsibility for the publication;

3.

there are no other authors of the publication according to these criteria;

4.

potential conflicts of interest have been disclosed to (a) granting bodies, (b) the editor or publisher of journals or other publications, and (c) the head of the responsible academic unit, and

5.

they agree to the use of the publication in the student’s thesis and its publication on the QUT ePrints database consistent with any limitations set by publisher requirements.

In the case of this chapter: Title

Performance Analysis of IEC 61850 Sampled Value Process Bus Networks

Publication

IEEE Transactions on Industrial Informatics

DOI

10.1109/TII.2012.2228874

Status

Published (Early Access), November 2012

Contributor David M. E. Ingram

Statement of contribution* Experimental design, performed experiments, data analysis and drafting the manuscript.

12 October 2012 Duncan A. Campbell

Conception and design of the project, critical revision of the paper.

Pascal Schaub

Conception and design of the project, critical revision of the paper.

Richard R. Taylor

Conception and design of the project, critical revision of the paper.

Principal Supervisor Confirmation I have sighted email or other correspondence from all co-authors confirming their certifying authorship. Prof Duncan A. Campbell

12 October 2012 Signature

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Performance Analysis of IEC 61850 Sampled Value Process Bus Networks David M. E. Ingram, Senior Member, IEEE, Pascal Schaub, Richard R. Taylor, Member, IEEE, and Duncan A. Campbell, Member, IEEE

Abstract—Process bus networks are the next stage in the evolution of substation design, bringing digital technology to the high voltage switchyard. Benefits of process buses include facilitating the use of Non-Conventional Instrument Transformers, improved disturbance recording and phasor measurement and the removal of costly, and potentially hazardous, copper cabling from substation switchyards and control rooms. This paper examines the role a process bus plays in an IEC 61850 based Substation Automation System. Measurements taken from a process bus substation are used to develop an understanding of the network characteristics of “whole of substation” process buses. The concept of “coherent transmission” is presented and the impact of this on Ethernet switches is examined. Experiments based on substation observations are used to investigate in detail the behavior of Ethernet switches with sampled value traffic. Test methods that can be used to assess the adequacy of a network are proposed, and examples of the application and interpretation of these tests are provided. Once sampled value frames are queued by an Ethernet switch the additional delay incurred by subsequent switches is minimal, and this allows their use in switchyards to further reduce communications cabling, without significantly impacting operation. The performance and reliability of a process bus network operating with close to the theoretical maximum number of digital sampling units (merging units or electronic instrument transformers) was investigated with networking equipment from several vendors, and has been demonstrated to be acceptable. Index Terms—Ethernet networks, IEC 61850, performance evaluation, process bus, power transmission, protective relaying, smart grids

I. I NTRODUCTION HE “smart grid” is defined as an umbrella term for technologies that are an alternative to traditional practices in power systems, offering improved reliability, flexibility, efficiency and reduced environmental impact [1]. Much of the smart grid focus has been in electricity distribution, however there are many smart grid applications proposed for transmission substations. Improved disturbance recording and state

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This work was supported in part by Powerlink Queensland, Virginia, Queensland 4014, Australia. David Ingram, Duncan Campbell and Richard Taylor are with the School of Electrical Engineering and Computer Science, Queensland University of Technology, Brisbane, Queensland 4000, Australia (email: [email protected]; [email protected]; [email protected]). Pascal Schaub is with QGC Pty Ltd, Brisbane, Queensland 4000, Australia (email: [email protected]). Copyright (c) 2012 IEEE. Personal use of this material is permitted. However, permission to use this material for any other purposes must be obtained from the IEEE by sending a request to [email protected]

estimation through phasor measurement is a goal of the transmission smart grid [2], and a networked process bus improves power network visibility by simplifying the connections required for advanced monitoring systems [3]. The high voltage equipment, including bus bars, circuit breakers, isolators, power transformers, current transformers (CTs) and voltage transformers (VTs), are the “primary plant” in a substation. The control equipment in a substation is termed the substation automation system (SAS), and includes protection, control, automation, monitoring and metering functions. The links between the primary plant and the SAS are called “process connections”, and are typically copper wires conveying analog voltages and currents. A digital “process bus” carries information (such as indications, alarms and transduced analog data) from the primary plant to the SAS, and information (such as operating commands, configuration changes and status information of other plant) from the SAS to the primary plant, over a digital network. A standardsbased interoperable process bus enables equipment from many vendors to operate together over a digital communications network. There are many benefits of process buses, and these include simplified implementation of low impedance bus differential protection (one Ethernet cable can supply current data from all CTs in a substation, rather than requiring all CTs to be brought to the protection relay) [4], facilitation of Non-Conventional Instrument Transformers (NCITs) [5] and the elimination of potentially hazardous wiring from substation control rooms [6]. Utilities can reduce their field cabling, and hence construction costs, as one pair of optic fibers can take the place of 100 or more copper (wire) connections [7]. The use of data networks to replace point to point analog connections is not without risks. The cyber security requirements for industrial and realtime networks are quite different to those for business applications [8], [9]. Significant process bus product development is taking place, with equipment now available from various manufacturers and several process bus substations have been commissioned [10]. Despite this activity, little is known about the behavior of process bus networks, especially whole of substation process buses with a large number of data sources. The traffic characteristics are unknown (the content is known, but the timing characteristics are not), and this has been identified as an issue when dealing with other aspects of substation

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automation such as network based time synchronization using the Precision Time Protocol (PTP) [11]. Other research has identified the lack of “real world” data as an issue for meaningful research into future smart grid applications [12]. Communication networks are critical for smart grid applications, and the benefits of a smart grid will not be realized if the performance of these networks is inadequate [13]. Much of the focus on smart grid communications is on distribution networks [14], [15] or synchrophasors [16], both of which cover wide area networks. The network traffic characteristics of a sampled value process bus local area network, with high data rates and strict performance requirements, are presented in this paper. These characteristics are based on measurements taken from a substation that uses a process bus for protection and control. The performance of a process bus with a large number of connected devices is verified experimentally in a laboratory environment. Section II examines the details of sampled value communications and common implementations. Section III presents process bus performance results from substation testing. These results were used as the basis of laboratory based experimental testing of Ethernet switches, and the method and results are provided in Section IV. The paper concludes with Section V. II. S AMPLED VALUE C OMMUNICATIONS The IEC Smart Grid standardization “roadmap” identifies the IEC 61850 series of standards as key components of substation automation and protection for the transmission smart grid. The objective of IEC 61850 is to provide a communication standard that meets existing needs of power utility automation, while supporting future developments as technology improves. Communication profiles that are part of IEC 61850 are based, where possible, on existing IEC/ IEEE/ISO communication standards. A. IEC 61850 Models and Data Encoding The IEC 61850 series of standards are based on an object-oriented data model that is used to represent an automation system [17]. Functional decomposition introduces the concept of the “logical node” (LN), which is the smallest reusable part of a function that exchanges data. LNs are defined in detail in IEC 61850-7-4 [18]. Functions are implemented by one or more LNs, with communications links required between LNs that are implemented in physically separate devices. “Interfaces” are defined in [17] to link the process, bay and station levels of a substation. Information modeling defines the services, data objects, attributes that enable information to be readily exchanged. Interface IF4 is defined to be “CT and VT data exchange between process and bay levels”. Interface IF5 defines control data exchange between the process and bay levels. IF4 and IF5 together can be considered to be the process bus.

Fig. 1. Single line diagram of a digital process bus, including the primary plant and protection system..

IEC 61850-7-2 defines the Abstract Communication Service Interface (ACSI). ACSI is independent of the underlying communications system and describes a means of client/server (connection based) and publisher/subscriber (connectionless) communications. Specific Communication Service Mappings (SCSMs) provide a concrete means of exchanging data in the physical world. The SCSM used for exchange of control and event information, IEC 61850-8-1, defines the Generic Object Oriented Substation Event (GOOSE) profile [19]. IEC 61850-9-2 defines an SCSM for the exchange of sampled values [20]. Existing standards have been used where possible in the development of the IEC 61850 family of standards. GOOSE and sampled values are based on IEEE Std 802.3/IEC 8802.3 Ethernet [21], with virtual LAN (VLAN) tagging based on IEEE 802.1Q used for prioritization [22]. Fast Ethernet using fiber optic connections (100BASE-FX) is preferred for its galvanic isolation and immunity to interference in high voltage switchyards. Fig. 1 shows a high voltage power transformer connection (single-line format) with a circuit breaker, two CTs and a transformer. The protection function has been decomposed into the LNs TCTR (current transformer), PDIF (differential protection), PTRC (protection trip conditioning) and XCBR (circuit breaker). A “merging unit” is the generic name for a device that samples conventional CT and VT outputs. NonConventional Instrument Transformers (NCITs), such as electronic current transformers (ECTs) and optical current transformers (OCTs) usually publish sampled values directly from their secondary converters [23]. Fig. 1 shows the interfaces (IF4 and IF5) that provide communications between the process level LNs (TCTR, TVTR and XCBR) and the bay level LNs (PDIF and PTRC). TCTR, TVTR and XCBR (along with others) are single phase LNs, and three of each are required for a three phase system. Multiple protection LNs, such as PTOC (timed over-current) and PDIS (distance), are required for each zone (PDIS) or stage (PTOC). Multiple LNs of the same type are instantiated during system configuration.

D. INGRAM et al.: PERFORMANCE ANALYSIS OF IEC 61850 SAMPLED VALUE PROCESS BUS NETWORKS

B. Common Implementations IEC 61850-9-2 specifies how sampled value measurements shall be transmitted over an Ethernet network by a merging unit or instrument transformer with electronic interface [20]. The UCAIug implementation guideline, referred to as “9-2 Light Edition” (9-2LE), reduces the complexity and difficulty of implementing an interoperable process bus based on IEC 61850-9-2 [24]. This is achieved by restricting the data sets that are transmitted and specifying the sampling rates, time synchronization requirements and the physical interfaces to be used. The 9-2LE dataset comprises four voltages and currents (three phases and neutral for each). There is a considerable protocol overhead with IEC 61850-9-2 based sampled value transmission. A standard 802.1Q tagged Ethernet frame has twelve bytes of frame wrapping, twelve bytes of address information, four bytes of 802.1Q tag, two bytes of Ethertype and the payload. The sampled value payload defined in IEC 61850-9-2 has its own overhead with ASN.1 encoding and other fields that identify the source of the sampled data, and a time-stamp. Fig. 2 shows a 9-2LE frame for protection applications that is 126 bytes long, however only 32 bytes contain the sampled values (eight 32-bit integers). In the 9-2LE power quality application the Application Service Data Unit (ASDU) would be repeated a further seven times. In this case the noADSU attribute at offset 0x1E would be eight, and the ASDUs would be placed in a sequence to form the Protocol Data Unit (PDU). It is suggested in [2] that moving from hard-coded transmissions to standards based protocols will improve efficiency, however this is not the case with sampled values. Interoperability comes at a cost, particularly in terms of data encoding efficiency. IEC 61850 based systems enable re-use of engineering designs, and therefore the engineering efficiency is increased through the use of standards.

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MulticasttDestinationtAddressty48tbitsQ SourcetMACtAddressty48tbitsQ 8dhQ(Q=Header=rEthertype===dx8(ddg 8dhQ(Q=Information=rh=bytesg Prit=t4NtVIDt=txxxxxNtCFIt=tx 8dhQ(Q=Ethertype===xx88BAtySVQ APPIDt=txx4xxx SVtLengtht=tFx8 ReservedFt=txxxxxx ReservedLt=txxxxxx dx6d Implicit=PDU=[d] dx6h BER=Len===98 SAVtPDU dx8d Implicit=Int=[d] dxd( BER=Len===( dxd( noASDU===( dxAh Implicity=Seq=[h] dx5D BER=Len===9) sequencetoftASDU dx)d Sequence dx5B BER=Len===9( ASDU dx8d Implicit=String=[d] dxdA BER=Len===(d svIDtyFxtcharsQ e4g4tssssMUx3xF dx8h Implicit=Int=[h] dxdh BER=Len===h smpCnttyF6tbitsQNte4g4t38x3 dx8) Implicit=Int=[)] dxd4 BER=Len===( confRefty3LtbitsQNte4g4txxxF dx85 Implicit=Int=[5] dxd( BER=Len===( smpSynchNte4g4tF dx87 Implicit=Data=[7] dx4d BER=Len===64 IAtMeasurementty3LtbitsQ IAtQualityty3LtbitsQ IBtMeasurementty3LtbitsQ IBtQualityty3LtbitsQ ICtMeasurementty3LtbitsQ ICtQualityty3LtbitsQ INtMeasurementty3LtbitsQ INtQualityty3LtbitsQ VAtMeasurementty3LtbitsQ VAtQualityty3LtbitsQ VBtMeasurementty3LtbitsQ VBtQualityty3LtbitsQ VCtMeasurementty3LtbitsQ VCtQualityty3LtbitsQ VNtMeasurementty3LtbitsQ VNtQualityty3LtbitsQ

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C. Real-Time Data Networks IEC 61850-5 specifies time limits for the delivery of messages, including GOOSE and sampled values [25]. The requirements for a message depend on the type of the message and the application performance class. Transmission substations (generally operating at 110-kV and above) require protection performance classes P2 (“normal”) and P3 (“top performance”). Type 1A “Trip” messages for P2 and P3 applications must have a total transmission time below 3 ms, as do Type 4 raw data (sampled value) messages. This 3 ms includes the time required for handling the message by publishers (merging units or secondary converters) and subscribers (e.g. protection relays). Sampled value traffic is continuous and the network load due to sampled values should not vary. GOOSE traffic is either periodic at a low rate (“heartbeat” messages), or sporadic at high rates (typically three messages sent over a few milliseconds). GOOSE messages on a process bus are expected to be commands

Fig. 2. Dissection of a 9-2LE sampled value frame, with key items shown in bold.

from the SAS (e.g. switch open or close, circuit breaker trip or close, or transformer tap change controls), or status updates from the high voltage plant (e.g. digital indications, transduced analog values and command acknowledgments). High rate GOOSE traffic, such as that resulting from inter-tripping, should be restricted to the Station Bus network. Event-based modeling tools have been used to model the behavior of sampled value networks [26], [27]. These models are only as accurate as the assumptions used to create them, and some have sampling rates and message sizes that do not reflect current implementations such as 9-2LE. Obtaining accurate models of hardened switches for substation applications can be prove difficult as there is much less demand for these devices than for switches with widespread commercial

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Fig. 3. Latency measurement using externally synchronized Ethernet capture card. FO/Cat5 is an Ethernet media converter, FO/TTL is a 1-PPS fiber optic receiver, and TTL/422 is a voltage level converter for the DAG card. Frame Appearance Delay

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III. S UBSTATION P ROCESS B US T ESTING The time taken for a merging unit to sample the analogue waveform, or for an NCIT to derive its output value, was expected to be constant, as the required processing does not change from sample to sample. Precision network analysis tools were taken to a 275-kV transmission substation and a series of packet captures were taken from the process bus networks. Data was collected from seven separate physical merging units. In this particular substation each merging unit operates in a “time island” and so latency measurements were taken separately. A. Equipment used for Substation Test An Endace DAG7.5G4 Ethernet capture card (DAG card) was used, as this card prepends a precise timestamp to the captured frame [32]. The DAG card is capable of capturing or transmitting four 1000 Mb/s Ethernet streams (or a combination of capturing and transmitting), and includes a facility to synchronize its time-stamping clock to an external 1-PPS source. The time-stamping clock is integral to the Ethernet capture hardware, giving an absolute error of ±100 ns from the 1-PPS reference and a relative error of ±8 ns between the four capture ports. The time-stamp was used to measure the time taken for the current and voltage sample measured on the 1-PPS edge (where smpCnt = 0) to be transmitted by the merging unit [33]. The connections for these measurements are shown in Fig. 3. Testing was performed in a live substation, with the merging unit providing the 1-PPS reference over a fiber optic cable and the sampled values over 100BASE-FX Ethernet. The same fiber optic cables were used for all tests to ensure constant path delay. Each physical merging unit contained three logical merging units (each connected to a different set of three-phase current and voltage sensors) and an integrated Ethernet switch. The average inter-frame time of 3.6 × 106 frames between logical MU1 and logical MU2 was 41.5 µs (σ=0.72 µs), and between MU2 and MU3 was 42.0 µs (σ=0.73 µs).

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application. Network Calculus [28] and other analytic techniques have been used to predict network behavior when the load is variable [29]. The self-similarity of “normal” network traffic (its fractal nature) has been used in auto-regressive and wavelet traffic models [30], however such traffic is generally based on human activity. Sampled value networks by their nature have a near constant load. Occasional time-critical events occur in the reverse direction, such as circuit breaker operations, but the majority of the traffic is not influenced by human actions. Management of traffic is important and this is often achieved through VLAN separation and multicast address filtering of the Ethernet frames [31]. Knowing the behavior of unrestricted traffic is helpful, and is presented in the following sections of this paper.

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Fig. 4. Sample distributions (histogram outlines) for variation in frame arrival time for the first logical merging unit in each of seven physical merging units. Each curve is calculated from 900 1-PPS samples.

The sampled value output of each merging unit was recorded for fifteen minutes, resulting in 900 frame arrival measurements (each relative to the 1-PPS synchronizing pulse). The merging units published 4000 frames per second and the inter-arrival time of each was measured, giving 3.6 million records per merging unit. B. Merging Unit Results The captured frames were filtered with the criterion smpCnt = 0. The “appearance delay” was then determined by taking the fractional second component of each frame’s time-stamp. This gives the total time taken from the occurrence of the 1-PPS synchronizing signal to the appearance of the frame on the Ethernet. The appearance delays of all frames were averaged together to yield an overall mean appearance delay (which is commercially sensitive). The difference between this overall mean and each observation is termed the “offset from average”. Sample distributions (histogram outlines) of the offset from average for the seven merging units are shown in Fig. 4. The frame appearance delays for the second and third logical MUs (not shown) are very similar. The test was repeated using an RTDS simulator with three merging unit cards (GTNET card with SV firmware). The results in Fig. 5 show that the three cards variable delays in publishing messages, but the three cards are consistent. The total variation is from –1.5 µs to 2.0 µs, and confirms that this model of merging unit had processing times that were very similar, validating the hypothesis on constant delay. The mean delay of merging units 1 and 2 differs from merging units 3–7 by 0.65 µs,

D. INGRAM et al.: PERFORMANCE ANALYSIS OF IEC 61850 SAMPLED VALUE PROCESS BUS NETWORKS

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Fig. 5. Sample distributions (histogram outlines) for variation in frame arrival time for GTNET sampled value publishers in an RTDS simulator. Each curve is calculated from 900 1-PPS samples.

will show. As a result, network designers need to allow for the simultaneous arrival of frames when specifying Ethernet switches. IV. L ABORATORY I NVESTIGATION OF E THERNET S WITCHING B EHAVIOR

Fig. 6. Histogram showing the frame inter-arrival times for Merging Unit 1, with a logarithmic y-axis. n = 3.6 × 106 .

however the spread is similar for all merging units (the sample standard deviation is 0.38 µs). This confirms that if all merging units are synchronized from the same source the frames transmitted from the same model of merging unit will arrive at the Ethernet switch at the same time. There will be some variation due to path length, and for cabling up to 1000 m in length this would not exceed 5 µs (less than half the transmission time of a sampled value frame at 100 Mb/s). All captured frames were used in the analysis of inter-frame arrival time. This is a measure of the regularity of frame transmission by the merging unit. The histogram in Fig. 6 shows that the majority (99.97%) of frames are spaced between 248 µs and 252 µs, with inter-arrival times bounded by 235 µs and 264 µs. This confirms that the data transmission is regular. The inter-arrival time distributions of merging units 2–7 were calculated, and the intervals for each found to have the same characteristic as merging unit 1. The combination of frame transmission occurring at the same point in time (synchronization) and at the same rate (syntonization) means that the merging unit transmissions can be considered coherent transmissions, using terminology analogous to that of coherent light (light that has the same wavelength and phase). This test was conducted with merging units from one manufacturer, however these results show that coherent transmission is possible with commercially available merging units, and this is the worst case as the results

The handling of sampled value data by Ethernet switches is of interest to network designers, and is an important part of undertaking a detailed process bus network design. The approach taken was to inject synthetic sampled value data into various Ethernet switches and then observe how the frames were handled. This laboratory based testing reproduces the substation environment described in Section III, but in a controlled and repeatable manner. The synthetic data was based upon standard 9-2LE frames and was created with a custom application that allows key parameters to be varied. Synthetic data avoids the reproduction of variations in inter-frame time that may occur with a real merging unit, and this provided consistency between tests. The test frames were injected into switches under test via a full-duplex Ethernet tap (NetOptics 10/100/ 1000 Tap), as shown in Fig. 7. The tap output was captured with the DAG card, providing accurate switch ingress time-stamps. A second capture port on the DAG card captured the frames leaving the switch, and from this the residence time, or latency, was calculated. The DAG card used a common clock to time-stamp all frames entering the card, and the resolution of this clock was 7.5 ns. A. Six Sampled Value Streams Fig. 8 shows an application where six merging units connect to a single Ethernet switch, and is based upon a “breaker and a half” substation with overlapping protection (refer to Section 11 of [34] for more detail on substation layouts). This Ethernet switch would reduce the amount of cabling from the switchyard to the control room. Network traffic was created for the switches under test that reflected this environment. Six synthetic sampled value “streams” were created, with each merging unit offset from the previous merging unit by a fixed time to ensure consistency when switching. The synthetic data was injected into the switch under test at 1000 Mb/s to simulate the near simultaneous arrival of frames from six merging units. The spacing of frame arrivals has a significant effect on the latency that is introduced. Fig. 9(a) shows the cumulative probability of latency for two configurations. The “bunched” case has the messages from the

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Fig. 8. Schematic of an application where six logical merging units connect to one Ethernet switch. (a)

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six merging units arriving at 2 µs intervals, while the “spaced” data arrives at 42 µs intervals (the 250 µs sampling period divided by six). The output queuing experienced by the bunched data is apparent, with the last frame of the bunch having an additional 55 µs latency. The spaced merging unit transmissions all experience the same latency as there is no queuing. Once the bunched frames have passed through one switch they are serialized, and as a consequence pass through subsequent switches with minimum additional latency. Fig. 9(b) shows observed latency for bunched and spaced sampled value frames that have passed through five Ethernet switches in series (with no additional traffic introduced). This is a significant result as a fixed 15 µs latency, rather than load dependent latency (of up to 250 µs), is introduced by each switch. B. Limits of Capacity The maximum latency when there is no packet loss is expected to be 250 µs, as this is the sampling period (50 Hz and 80 samples per cycle). The theoretical limit on the number of merging units is 22 (97.2 Mb/s) with

a 50 Hz power system and 126 byte sampled value frames. Synthetic sampled value transmissions were made with 21, 22 and 23 merging units to test this. The transmissions from the DAG card to each switch were at 1000 Mb/s. The frames were spaced at 2 µs intervals to simulate the near simultaneous arrival of frames from a number of merging units. Each sampled value frame was VLAN tagged and had a priority of 4. The buffer memory in the DAG card limited transmissions to 7 s. The frame spacing was found to be bi-modal with values of 249.86 µs (42%) and 250.10 µs (58%), confirming that the DAG card transmitted the frames at the correct rate, and that 2 µs frame spacing was sufficient. Three makes of substation rated managed Ethernet switches with PTP transparent clock functionality were tested (Cisco, Hirschmann and RuggedCom), and these were identified as switches A, B and C (in no particular order). No rate limiting or policing was used and the switches were not loaded with any other traffic. Switch management links were disconnected for the duration of each test. Incoming and outgoing frames were counted for each merging unit in the stream. Table I summarizes the results for each combination of network load (21, 22 or 23 merging units) and Ethernet switch (A, B and C). The transmissions with 21 merging units experienced no frame loss with any of the switches. Frame loss did occur with the 22 and 23 merging unit streams, and mainly affected the 22nd and 23rd merging units in the sequence, while merging units 19, 20 and 21 lost a few frames. The frame loss rate is almost identical across the three makes of switch, and this suggests that this behavior is not due to any particular switch implementation. The latency for each merging unit was determined by calculating the difference between the egress and ingress time-stamps of each frame, which is also called the “switch residence time”. The network tap was used to feed the transmitted synthetic SV data back into the DAG card, ensuring the ingress and egress time-stamps were consistent. This compensates for any delays in transmitting the SV messages by the DAG card. The switches are able to service the load of 21 merging units, and latency remains relatively constant for each merging unit. Fig. 10 shows the variation in latency for each merging unit over a 7 s interval. MU1 is colored red, and has the smallest latency, while MU21 is colored magenta and has largest latency. Small changes in latency occur periodically as the switches take a little longer to process some frames, and these show as “blips”. This may be due to spanning tree and PTP peer delay messages that are generated by the switch entering the output queue. The load from 21 merging units is low enough that the switches were able to recover from this incidental traffic without dropping frames due to buffer overflow. No collisions occur as the full duplex links and Ethernet switches are used. The effect of switching is to incur latency through buffering, and if the buffers overflow then frames are lost.

D. INGRAM et al.: PERFORMANCE ANALYSIS OF IEC 61850 SAMPLED VALUE PROCESS BUS NETWORKS

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Fig. 10. Time series of observed latency for each of the 21 merging units, tested with three Ethernet switches. Each merging unit is shown in a different color, ranging from red (MU1, smallest latency) to magenta (MU21, greatest latency).

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0

0

0

0

1

1

20

28 000

0

0

0

0

0

0

0

0

2

21

28 000

0

0

0

1

6

5

4

7

8

22

28 000







16 520

16 526

16 537

21 377

21 407

21 406

23

28 000 Overall Loss













23 141

23 118

23 128

0.00%

0.00%

0.00%

2.68%

2.68%

2.69%

6.91%

6.92%

6.92%

TABLE I F RAMES LOST AT HIGH NETWORK LOADS WITH THREE MAKES OF E THERNET SWITCH , BY MERGING UNIT POSITION IN THE STREAM .

Fig. 11 shows the start of transmission for the 22 and 23 merging unit streams, and it can be seen that there are frames missing with 23 merging units (each frame from MU22 or MU23 is shown with a marker). This is an indicator that these Ethernet switches cannot serve the network load presented by 22 or 23 merging units. The maximum latency does vary between the switches that were tested, and frames are dropped sooner by the switch with the lower maximum latency. Table I shows slightly higher frame loss for switch C than for switches A or B. This test can be used for system design or factory

acceptance testing to verify that the data network performs to specification with the expected number of merging units. The safe operating margin can be determined by increasing network load until latency no longer remains constant. An additional test was conducted with five Ethernet switches in series. No frames were dropped with 21 merging units and the results for 22 and 23 merging units were similar to the single switch cases. This was expected, since the first switch drops frames to limit the outgoing connection to 100 Mb/s, and each subsequent switch can accommodate this rate.

8

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confidence that the “whole of substation” process bus is viable, and that centralized applications such as disturbance recording, phasor measurement and even protection are feasible. Process buses will also facilitate the adoption of NCIT technology in transmission substations, resulting in a safer work environment and reduced environment impact. ACKNOWLEDGMENTS The authors would like to thank G. Dusha and A. Kenwrick from Powerlink Queensland for arranging substation access and assisting with field measurements. Belden Solutions, Cisco Systems and Meinberg Funkuhren kindly contributed hardware for the process bus PTP test bed. R EFERENCES

Fig. 11. Start of transmission with (a) 22 and (b) 23 merging units, showing increasing latency and dropped frames when latency reaches a limit.

V. C ONCLUSIONS This paper has examined the application of process bus networks based on IEC 61850, and how Specific Communication Service Mappings are used to provide information flow between the logical nodes that form the automation system. Unique characteristics of sampled value networks, which have hard real-time requirements, have been presented. Measurements from a live substation have confirmed that transmissions from merging units can occur at the same time and at the same rate, and the term coherent transmission has been introduced to describe this type of data. This data is machine derived, unlike more traditional self-similar data that is generated in response to human activity. Coherent transmission from merging units affects the switching performance of Ethernet switches, with additional latency introduced due to output queuing delays. Once the frames are queued subsequent Ethernet switches introduce minimal delay, which is determined by the size of the frame. This permits the use of Ethernet switches in the field to reduce cabling from the switchyard to the control room of a substation, without significantly impacting network performance. Sampled value networks operating close to theoretical capacity limits have been demonstrated in a controlled test environment that replicated a process bus substation. A test methodology has been developed that identifies when network capacity is reached and can be used to assess the safe limits of operation for a data network. This testing used a precision Ethernet capture card and commercially available Ethernet switches, and is therefore more representative of the substation environment than event-based simulation models. Process bus networks have been shown to be reliable, even at very high network loads. This provides

[1] V. Hamidi, K. S. Smith, and R. C. Wilson, “Smart grid technology review within the transmission and distribution sector,” in Proc. Innov. Smart Grid Tech. Conf. Europe 2010 (ISGTE), Gothenburg, Sweden, 11–13 Oct. 2010, pp. 1–8. [2] D. E. Bakken, A. Bose, C. H. Hauser, D. E. Whitehead, and G. C. Zweigle, “Smart generation and transmission with coherent, real-time data,” Proc. IEEE, vol. 99, no. 6, pp. 928– 951, Jun. 2011. [3] Fangxing Li, Wei Qiao, Hongbin Sun, Hui Wan, Jianhui Wang, Yan Xia, Zhao Xu, and Pei Zhang, “Smart transmission grid: Vision and framework,” IEEE Trans. Smart Grid, vol. 1, no. 2, pp. 168–177, Sep. 2010. [4] M. Zadeh, T. Sidhu, and A. Klimek, “Suitability analysis of practical directional algorithms for use in directional comparison bus protection based on IEC61850 process bus,” IET Gener. Transm. Distrib., vol. 5, no. 2, pp. 199–208, Feb. 2011. [5] P. Schaub, J. Haywood, D. M. E. Ingram, A. Kenwrick, and G. Dusha, “Test and evaluation of Non Conventional Instrument Transformers and sampled value process bus on Powerlink’s transmission network,” in CIGRÉ Sth East Asia Prot. Autom. Conf. 2011 (SEAPAC), Sydney, Australia, 10–11 Mar. 2011, pp. 1–18. [Online]. Available: http://eprints.qut.edu.au/40921/ [6] D. McGinn, M. G. Adamiak, M. Goraj, and J. Cardenas, “Reducing conventional copper signaling in high voltage substations with IEC 61850 process bus system,” in Proc. 2009 IEEE Bucharest PowerTech, Bucharest, Romania, 28 Jun. – 2 Jul. 2009, pp. 1–8. [7] D. M. E. Ingram, D. A. Campbell, P. Schaub, and G. Ledwich, “Test and evaluation system for multi-protocol sampled value protection schemes,” in Proc. 2011 IEEE Trondheim PowerTech, Trondheim, Norway, 19–23 Jun. 2011, pp. 1–7. [8] D. Wei, Y. Lu, M. Jafari, P. Skare, and K. Rohde, “Protecting smart grid automation systems against cyberattacks,” IEEE Trans. Smart Grid, vol. 2, no. 4, pp. 782–795, Dec. 2011. [9] M. Cheminod, L. Durante, and A. Valenzano, “Review of security issues in industrial networks,” IEEE Trans. Ind. Informat., vol. 9, no. 1, pp. 277–293, Feb. 2013. [10] R. Moore and M. Goraj, “New paradigm of smart transmission substation - practical experience with Ethernet based fiber optic switchyard at 500 kilovolts,” in Proc. 2nd IEEE PES Int. Conf. Exhib. Innov. Smart Grid Tech. Europe (ISGTE), Manchester, UK, 5–7 Dec. 2011, pp. 1–5. [11] J. Amelot, Y.-S. Li-Baboud, C. Vasseur, J. Fletcher, D. Anand, and J. Moyne, “An IEEE 1588 performance testing dashboard for power industry requirements,” in Proc. 2011 IEEE Int. Symp. Precis. Clock Synchr. Meas. Control Commun. (ISPCS), Munich, Germany, 12–16 Sep. 2011, pp. 132–137. [12] L. Vanfretti, D. Van Hertem, L. Nordström, and J. O. Gjerde, “A smart transmission grid for Europe: Research challenges in developing grid enabling technologies,” in IEEE PES Gen. Meet. 2011, Detroit, MI, USA, 26–28 Jul. 2011, pp. 1–8. [13] Q. Yang, J. A. Barria, and T. C. Green, “Communication infrastructures for distributed control of power distribution networks,” IEEE Trans. Ind. Informat., vol. 7, no. 2, pp. 316– 327, May 2011.

D. INGRAM et al.: PERFORMANCE ANALYSIS OF IEC 61850 SAMPLED VALUE PROCESS BUS NETWORKS

[14] T. Sauter and M. Lobashov, “End-to-end communication architecture for smart grids,” IEEE Trans. Ind. Electron., vol. 58, no. 4, pp. 1218–1228, Apr. 2011. [15] V. C. Güngör, D. Sahin, T. Kocak, S. Ergut, C. Buccella, C. Cecati, and G. P. Hancke, “A survey on smart grid potential applications and communication requirements,” IEEE Trans. Ind. Informat., vol. 9, no. 1, pp. 28–42, Feb. 2013. [16] P. Kansal and A. Bose, “Bandwidth and latency requirements for smart transmission grid applications,” IEEE Trans. Smart Grid, vol. 3, no. 3, pp. 1344–1352, Sep. 2012. [17] IEC TC57, Communication Networks and Systems in Substations – Part 1: Introduction and Overview, IEC TR 618501:2003, Apr. 2003. [18] ——, Communication Networks and Systems for power utility automation – Part 7-4: Basic information and communications structure – Compatible logical node classes and data object classes, IEC 61850-7-4 ed2.0, Mar. 2010. [19] ——, Communication networks and systems for power utility automation – Part 8-1: Specific communication service mapping (SCSM) – Mappings to MMS (ISO 9506-1 and ISO 95062) and to ISO/IEC 8802-3, IEC 61850-8-1 ed2.0, Jun. 2011. [20] ——, Communication networks and systems for power utility automation – Part 9-2: Specific communication service mapping (SCSM) – Sampled values over ISO/IEC 8802-3, IEC 61850-9-2 ed2.0, Sep. 2011. [21] IEEE Computer Society, IEEE Standard for Local and Metropolitan Area Networks – Part 3: Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications, IEEE Std. 802.3-2008, 26 Dec. 2008. [22] ——, IEEE Standard for Local and Metropolitan Area Networks – Media Access Control (MAC) Bridges and Virtual Bridge Local Area Networks, IEEE Std. 802.1Q-2011, 31 Aug. 2011. [23] D. Chatrefou, “Process bus application in NCIT experiments; impact on future architectures,” in Proc. 17th Conf. Elec. Pwr Sup. Ind. (CEPSI), Macau, China, 27–31 Oct. 2008. [24] UCAIug. (2004, 7 Jul.) Implementation guideline for digital interface to instrument transformers using IEC 61850-9-2 R2-1. UCA International Users Group. Raleigh, NC, USA. [Online]. Available: http://iec61850.ucaiug.org/ Implementation%20Guidelines/DigIF_spec_9-2LE_ R2-1_040707-CB.pdf [25] IEC TC57, Communication Networks and Systems in Substations – Part 5: Communication Requirements for Functions and Device Models, IEC 61850-5:2003, Jul. 2003. [26] M. S. Thomas and I. Ali, “Reliable, fast, and deterministic substation communication network architecture and its performance simulation,” IEEE Trans. Power Del., vol. 25, no. 4, pp. 2364–2370, Oct. 2010. [27] M. G. Kanabar and T. S. Sidhu, “Performance of IEC 618509-2 process bus and corrective measure for digital relaying,” IEEE Trans. Power Del., vol. 26, no. 2, pp. 725–735, Apr. 2011. [28] R. L. Cruz, “A calculus for network delay, part I: Network elements in isolation,” IEEE Trans. Inf. Theory, vol. 37, no. 1, pp. 114–131, Jan. 1991. [29] K. Schmidt and E. G. Schmidt, “A longest-path problem for evaluating the worst-case packet delay of switched Ethernet,” in Proc. 5th IEEE Symp. Ind. Embed. Syst. (SIES), Trento, Italy, 7–9 Jul. 2010, pp. 205–208. [30] J. Kolbusz, S. Paszczy´nski, and B. M. Wilamowski, “Network traffic model for industrial environment,” IEEE Trans. Ind. Informat., vol. 2, no. 4, pp. 213–220, Nov. 2006. [31] D. M. E. Ingram, P. Schaub, and D. Campbell, “Multicast traffic filtering for sampled value process bus networks,” in Proc. 37th Ann. Conf. IEEE Indust. Electron. Soc. (IECON), Melbourne, Australia, 7–10 Nov. 2011, pp. 4710–4715. [32] J. Micheel, S. Donnelly, and I. Graham, “Precision timestamping of network packets,” in Proc. 1st ACM SIGCOMM Wkshp Internet Meas., San Francisco, CA, USA, 1–2 Nov. 2001, pp. 273–277. [33] D. M. E. Ingram, F. Steinhauser, C. Marinescu, R. R. Taylor, P. Schaub, and D. A. Campbell, “Direct evaluation of IEC 61850-9-2 process bus network performance,” IEEE Trans. Smart Grid, vol. 3, no. 4, pp. 1853–1854, Dec. 2012. [34] H. Gremmel, Switchgear Manual, 11th ed. Berlin, Germany: ABB / Cornelsen Verlag Scriptor GmbH & Co. KG, 2006. [Online]. Available: http://www.abb-shb.de/content. asp?lang=en

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David Ingram (S’94 M’97 SM’10) received the B.E. (with honours) and M.E. degrees in electrical and electronic engineering from the University of Canterbury, Christchurch, New Zealand, in 1996 and 1998, respectively. He is currently working toward the Ph.D. degree at the Queensland University of Technology, Brisbane, Australia, with research interests in substation automation and control. He has previous experience in the Queensland electricity supply industry in transmission, distribution, and generation. Mr. Ingram is a Chartered Member of Engineers Australia and is a Registered Professional Engineer of Queensland.

Pascal Schaub received the B.Sc. degree in computer science from the Technical University Brugg-Windisch, Windisch, Switzerland, (now the University of Applied Sciences and Arts Northwestern Switzerland) in 1995. He was with Powerlink Queensland as Principal Consultant Power System Automation, developing IEC61850 based substation automation systems. He is currently the Principal Process Control Engineer at QGC, a member of the BG Group. He is a member of Standards Australia working group EL-050 “Power System Control and Communications” and a member of the international working group IEC/TC57 WG10 “Power System IED Communication and Associated Data Models”.

Richard Taylor (M’08) received the B.E. (with honours) and M.E. degrees in electrical and electronic engineering from the University of Canterbury, Christchurch, New Zealand, in 1977 and 1979, respectively, and the Ph.D. degree from the University of Queensland, Brisbane, Australia in 2007. He is the former Chief Technical Officer of Mesaplexx Pty Ltd and currently holds a fractional appointment as an Adjunct Professor in the School of Electrical Engineering and Computer Science at the Queensland University of Technology. He started his career as a telecommunications engineer in the power industry in New Zealand. In the past 25 years he has established two engineering businesses in Queensland, developing innovative telecommunications products.

Duncan Campbell (M’84) received the B.Sc. degree (with honours) in electronics, physics, and mathematics and the Ph.D. degree from La Trobe University, Melbourne, Australia. He has collaborated with a number of universities around the world, including Massachusetts Institute of Technology, and Telecom-Bretagne, Brest, France. He is currently a Professor with the School of Electrical Engineering and Computer Science, Queensland University of Technology, Brisbane, Australia, where he is also the Director of the Australian Research Centre for Aerospace Automation (ARCAA). His research areas of interest are robotics and automation, embedded systems, computational intelligence, intelligent control, and decision support. Prof. Campbell is the Immediate Past President of the Australasian Association for Engineering Education and was the IEEE Queensland Section Chapter Chair of the Control Systems/Robotics and Automation Society Joint Chapter (2008/2009).

CHAPTER 10

Network interactions and performance of a multi-function IEC 61850 process bus A process bus network is most efficiently used when all substation automation functions that communicate between the control room and switchyard bays share the one network. A disadvantage of a shared network is the possibility of the various protocols interacting, which may degrade performance. Merging units, protection relays and circuit breakers communicate ‘machine to machine’ over a process bus with well-defined traffic. Tools that are often based on the Internet Protocol (IP) are used to change device configurations, update firmware and monitor the performance of these devices. The resulting IP traffic is less predictable, not optimised for use in a real-time network, and may pose a risk to the true process bus traffic. A method is proposed in this chapter that enables multiple links between Ethernet switches to be used that is based on the Multiple Spanning Tree Protocol (MSTP). The ‘station bus’, used for the management and control of devices in the switchyard, can use the same Ethernet switches that form the process bus for minimal additional cost. Having this ‘extra’ network can simplify network commissioning and testing since GOOSE and sampled value are isolated from the less controlled IP traffic. The chapter presents an experimental assessment of process bus protocol interactions using the process bus test bed. MSTP-based traffic segregation and the interaction between IP and process bus protocols were assessed in a combined experiment. The effect of sampled value traffic on IP and GOOSE and the impact of IP and GOOSE on sampled values were assessed using a shared network and a dual-path network. The experimental results showed that sampled values and ‘outbound’ GOOSE messages (from the control room to the switchyard) did not interact when full duplex Ethernet was used. The dual network experienced no interaction between the ‘station bus’ and ‘process bus’ traffic, even though the Ethernet switches were common to both. Interaction between process bus traffic and IP traffic on the shared network was minimal and suggests that limited amounts IP traffic will not effect process bus performance.

©2012 IEEE. Reprinted, with permission, from D.M.E. Ingram, P. Schaub, R.R. Taylor & D.A. Campbell, “Network interactions and performance of a multi-function IEC 61850 process bus”, IEEE Transactions on Industrial Electronics, December 2013.

109

Statement of Contribution The authors listed below have certified* that: 1.

they meet the criteria for authorship in that they have participated in the conception, execution, or interpretation, of at least that part of the publication in their field of expertise;

2.

they take public responsibility for their part of the publication, except for the responsible author who accepts overall responsibility for the publication;

3.

there are no other authors of the publication according to these criteria;

4.

potential conflicts of interest have been disclosed to (a) granting bodies, (b) the editor or publisher of journals or other publications, and (c) the head of the responsible academic unit, and

5.

they agree to the use of the publication in the student’s thesis and its publication on the QUT ePrints database consistent with any limitations set by publisher requirements.

In the case of this chapter: Title

Network Interactions and Performance of a Multi-Function IEC 61850 Process Bus

Publication

IEEE Transactions on Industrial Electronics

DOI

10.1109/TIE.2012.2233701

Status

Published (Early Access), December 2012

Contributor David M. E. Ingram

Statement of contribution* Experimental design, performed experiments, data analysis and drafting the manuscript.

12 October 2012 Duncan A. Campbell

Conception and design of the project, critical revision of the paper.

Pascal Schaub

Conception and design of the project, critical revision of the paper.

Richard R. Taylor

Conception and design of the project, critical revision of the paper.

Principal Supervisor Confirmation I have sighted email or other correspondence from all co-authors confirming their certifying authorship. Prof Duncan A. Campbell

12 October 2012 Signature

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1

Network Interactions and Performance of a Multi-Function IEC 61850 Process Bus David M. E. Ingram, Senior Member, IEEE, Pascal Schaub, Richard R. Taylor, Member, IEEE, and Duncan A. Campbell, Member, IEEE

Abstract—New substation technology, such as nonconventional instrument transformers, and a need to reduce design and construction costs, are driving the adoption of Ethernet based digital process bus networks for high voltage substations. Protection and control applications can share a process bus, making more efficient use of the network infrastructure. This paper classifies and defines performance requirements for the protocols used in a process bus on the basis of application. These include GOOSE, SNMP and IEC 61850-9-2 sampled values. A method, based on the Multiple Spanning Tree Protocol (MSTP) and virtual local area networks, is presented that separates management and monitoring traffic from the rest of the process bus. A quantitative investigation of the interaction between various protocols used in a process bus is described. These tests also validate the effectiveness of the MSTP based traffic segregation method. While this paper focusses on a substation automation network, the results are applicable to other real-time industrial networks that implement multiple protocols. High volume sampled value data and time-critical circuit breaker tripping commands do not interact on a full duplex switched Ethernet network, even under very high network load conditions. This enables an efficient digital network to replace a large number of conventional analog connections between control rooms and high voltage switchyards. Index Terms—Ethernet networks, IEC 61850, industrial networks, performance evaluation, process bus, protective relaying, smart grid, spanning tree, substation automation

I. I NTRODUCTION RADITIONAL Substation Automation Systems (SAS), including protection systems, have relied upon analog connections between the high voltage equipment in the switchyard and the control equipment. While data networks have been used for many years within the control room, these have not been extended to the switchyard [1], [2]. Non-conventional instrument transformers (NCITs), such as optical current transformers, eliminate potentially hazardous current transformer (CT) and voltage transformer (VT)

T

This work was supported in part by Powerlink Queensland, Virginia, Queensland 4014, Australia. David Ingram, Richard Taylor and Duncan Campbell are with the School of Electrical Engineering and Computer Science, Queensland University of Technology, Brisbane, Queensland 4000, Australia (email: [email protected]; [email protected]; [email protected]). Pascal Schaub is with QGC Pty Ltd, Brisbane, Queensland 4000, Australia (email: [email protected]). Copyright (c) 2012 IEEE. Personal use of this material is permitted. However, permission to use this material for any other purposes must be obtained from the IEEE by sending a request to [email protected]

secondary wiring from control rooms, which improves the safety of people working with the protection and control equipment. NCITs for air insulated switchgear offer significant safety benefits (no risk of explosion) and reduced environment impact (no SF6 gas or oil insulation). A standards-based interoperable process bus enables equipment, such as NCITs, from many vendors to operate together over a digital communications network. Utilities can reduce their field cabling, and hence construction costs, as one pair of optic fibers can take the place of 100 or more copper (wire) connections when used as a process bus [3]. Ethernet became viable for real-time environments with the creation of full duplex switched connections [4], [5] and prioritization network traffic with IEEE Std 802.1Q [6] (and is often referred to as “802.1Q tagging”) [7], [8]. The main function of IEEE Std 802.1Q is to provide virtual local area network (VLAN) segregation of traffic, which is critical for the management of information throughout a network. Ethernet is increasingly being used for process networks in a range of industries [9]. The IEC 61850 family of standards for power system automation is a key component of substation automation and protection for the transmission smart grid [10]. The objective of IEC 61850 is to provide a communication standard that meets existing needs of power utility automation, while supporting future developments as technology improves. IEC 61850 standards are based, where practical, on existing international standards. Ethernet is used by a number of IEC 61850 standards as the communications media. A significant amount of network performance modeling has been undertaken, however these models are only as good as the assumptions used [11], [12]. The communications requirements of smart grid applications are now being documented [13], [14], however process buses within substations are often omitted from discussion. The interaction of protocols has been identified as an issue in general for industrial real time networks [15]. This paper considers protocol interaction in a process bus in three stages. The first is a categorization of process bus traffic, based on observations from live substations and prototype SAS implementations. This describes the application, message sizes, message rates and performance requirements of the various protocols. Secondly, a design methodology to segregate traffic classes onto separate network bearers with shared switching devices is described, and the performance

2

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of this is evaluated experimentally. This separation is based on VLAN tagging of messages and the use of Multiple Spanning Tree Protocol (MSTP) to enable alternative paths for selected VLANs, which is not possible with the widely adopted Rapid Spanning Tree Protocol (RSTP). Finally, a quantitative assessment of latencies experienced by process bus messages under varying network conditions is presented. The experimental method is described in detail, and is applied to two process bus network topologies with different design philosophies. One design uses a single star network to carry all process bus data. The alternate design is an overlapping tree, capable of segregating traffic classes. This experimental approach captures behavior resulting from unknown factors, and considers two-way interactions between the different protocols and profiles in use. Hardware-based modeling of power system controls is increasingly popular [16], [17], and this work uses a process-bus test bed as the hardware model. The examples presented here relate to substation automation, however the technique is applicable to other multiprotocol real-time networks. Section II describes in more detail features, traffic management and performance requirements of process bus networks. Section III presents the test networks used for process bus evaluation and describes the test methods used. The results of this testing are given in Section IV, along with discussion of the significance in Section V. Section VI is the Conclusion. II. P ROCESS B US N ETWORKS Functions in a SAS can be assigned to one of three levels, with the following terminology used by IEC 61850-1 [18]: • “Process level” devices connect to the high voltage plant and associated equipment. These typically include CTs, VTs, circuit breakers, transformers, other sensors (e.g. temperature and pressure) and actuators. • “Bay level” devices are responsible for the protection, control and metering of each bay, which is typically one transmission line or transformer. • “Station level” devices operate across the entire substation and would include a local operating console, remote control gateways (for a control center) and engineering workstations. “Interfaces” are defined in IEC 61850-1 to link the process, bay and station levels of a substation [18]. Interface IF4 is defined to be “CT and VT data exchange between process and bay levels”. Interface IF5 defines control data exchange between the process and bay levels. A. Process Bus Applications IF4 and IF5 together can be considered to be the process bus, and are shown applied to a transformer bay in Fig. 1. IF4 is implemented with IEC 61850-9-2 Sampled Values (SV) [19] and IF5 is implemented with the Generic Object Oriented Substation Event (GOOSE)

Fig. 1. Single line diagram of a digital process bus, including the primary plant and protection system. The interfaces between process and bay levels (IF4 and IF5) are identified.

profile defined in IEC 61850-8-1 [20]. GOOSE and SV are technically not protocols, but can be treated as such when considering them alongside other communication systems that share the same Ethernet network. “Logical Nodes” (LNs) define the basic functional elements in an IEC 61850 based SAS. LNs may communicate within the one physical device, but when communication between devices is required a Specific Communication Service Mapping (SCSM) is used. GOOSE and SV are examples of SCSMs. Further explanation of the 61850 object model can be found in [21]. In Fig. 1 the CTs provide scaled down current information to the merging unit. For conventional CTs this is often a 1 ARMS current, however for NCITs this will most likely be a proprietary digital signal. Each merging unit publishes SV data as multicast Ethernet messages over the process bus. The protection relay subscribes to relevant multicast SV messages and processes the “raw” current information (as opposed to transduced or phasor quantities) and makes a decision on whether a fault has occurred in the transformer. If a fault occurs and a trip is required then a GOOSE message carrying the changed state of the trip indication is transmitted immediately. The smart circuit breaker subscribes to relevant trip indication messages and responds accordingly. When the circuit breaker state changes (after a trip or operator initiated open/close) it will publish this as an indication GOOSE message, which the relay will subscribe to. Different message types have differing requirements for transfer time, and these are summarized in Section II-C. SV and GOOSE are multicast messages are therefore connectionless. As a result, these messages are indications rather than commands. The subscribing device makes the decision on what to do when an indication changes state. A smart circuit breaker may subscribe to trip indications from several protection relays. IEC 61850-9-2 specifies how sampled value measurements shall be transmitted over an Ethernet network by a merging unit or instrument transformer with an electronic interface [19], but does not specify the message content or update rate. The UCAIug

MergingVUnit

Protection System BayVLevel Transparent Clock

Protection IEDs

Core Transparent Clock

SlaveVClock

Grandmaster

3 4

PTPVPublisher

PTPVPeerVDelay

Fig. 2.

1 2

Time Sync System PTPVSubscriber

In

Simplified multi-function process bus architecture.

implementation guideline, referred to as “9-2 Light Edition” (9-2LE), reduces the complexity and difficulty of implementing an interoperable process bus based on IEC 61850-9-2 [22]. This is achieved by restricting the data sets that are transmitted, and by specifying the sampling rates, time synchronization requirements and the physical interfaces to be used. The 9-2LE dataset comprises four voltages and four currents (three phases and neutral for each), and messages formatted accordingly were used for the tests described in this paper.

3

Out 802.1Q Prioritisation

SVVSubscribers

CBVInterface Trip Close

802.1D MulticastCFiltering

GOOSEVPublisher

SVVPublisher

802.1Q VirtualCLANCFiltering

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SwitchingCMatrix HLearnedCMACCAddressesm

D. INGRAM et al.: NETWORK INTERACTIONS AND PERFORMANCE OF A MULTI-FUNCTION IEC 61850 PROCESS BUS

Critical High Normal Low

1

Critical High Normal Low

2

Critical High Normal Low

3

Critical High Normal Low

4

FlowCofCEthernetCframesCthroughCtheCswitch Fig. 3. Flow of Ethernet frames through a full-duplex switch with IEEE 802.1Q queuing and prioritization, and IEEE 802.1D multicast filtering.

sent, filtering is applied based on VLANs and explicit multicast groups, and finally the outgoing frames are queued for transmission at each port. Most Ethernet switches have four queues per port, with a few highend devices having eight queues. The priority tag in the 802.1Q header, in combination with priority settings in the switch, determines which queues the frames go into and the servicing of these queues.

B. Traffic Management A multi-function process bus uses a shared Ethernet network to exchange messages (SV, GOOSE and others) between devices in the switchyard and those in the control room. IEEE Std 1588, the Precision Time Protocol (PTP) is recommended in [10] for the synchronization of SV messages [23], and has been used in recent process bus implementations [24]. PTP messages generate a low volume of traffic, typically 300 bytes per second, and therefore do not affect the operation of SV or GOOSE. The impact of SV or GOOSE traffic on PTP performance is outside the scope of this paper. Fig. 2 shows a simplified shared process bus, with the switchyard equipment on the left and the control room equipment on the right. Ethernet traffic flows in both directions, with opportunities to interact in the bay and core Ethernet switches. The Ethernet switches will be transparent clocks if PTP is used for synchronization, due to the requirement of the PTP Power System Profile to use the peer delay mechanism [25]. Traffic management is critical in a process bus environment, especially given that GOOSE, SV and PTP use multicast (one to many) transmission. VLAN and multicast filtering are used to prevent overloads on edge devices (such as protection relays), and to restrict the transmission of multicast data to only those devices that have a need for it [8], [26], [27]. A method of engineering the VLANs and multicast groups for substation Ethernet networks based on IEC 81346 plant identifiers is presented in [27]. Fig. 3 illustrates frame handling within an Ethernet switch. Full duplex connections allow devices connected to the switch to simultaneously send and receive data. The switching matrix determines where the incoming frames will be

C. Traffic Characteristics and Performance Requirements The primary protocols used in a process bus (SV, GOOSE and PTP) are layer-2 multicast protocols. These are non-routable and are limited in size to one Ethernet frame. Other protocols, based on layer3 Internet Protocol (IP), may be used for configuration, monitoring and management of devices. The Manufacturing Message Specification (MMS) is used to exchange data in IEC 61850 based systems for control purposes [20], and the Simple Network Management Protocol (SNMP) is widely used to monitor and configure network devices [28]. A summary of frame sizes and transmission rates is listed in Table I, and the upper limit of frame size is approximately 700 bytes. Other IP traffic, such as HTTP or FTP, may have frame sizes up to 1542 bytes (including the 802.1Q and IP headers). MMS is not supported by commercially available merging units, but should be considered for future use. The SV and GOOSE rates specified are per logical device (such as a merging unit) and therefore the network load will depend on the size of the substation. GOOSE transmissions have a “heartbeat”, typically once per second, but transmit repeatedly in bursts when an event occurs. These rates are defined in a GOOSE Control Block in the publishing device, and are application specific. Section 13.7 of IEC 61850-5 specifies the maximum transfer time for various message types [29]. The transfer time is the sum of the processing times at the sender and receiver and the network transmission time. Overall performance classes P2 and P3, defined in [29], apply to transmission substations (with >100 kV operating voltage) and determine the applicable transfer

4

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

TABLE I F RAME AND PACKET SIZES FOR PROCESS BUS TRAFFIC . Protocol SV

Frame Size

Rate 4000/s

3 ms

66–86 bytes

3/s

n/a

GOOSE Trip

150–600 bytes

1-200/s

20 ms

GOOSE

150–600 bytes

1-200/s

3 ms

74 bytes

2/s

n/a

Ping (32 Byte) MMS

60–700 bytes

20/s

100 ms

SNMP

150–500 bytes

120/s

n/a

B

A

Transfer Time Limit

126 bytes

PTP

Traffic Class 1

C

Traffic Class 2

+

D

Some manufacturers of Ethernet equipment for the industrial market have reduced the IP Maximum Transmission Unit (MTU) from 1500 bytes to 578 bytes to manage latency. A large low-priority frame that had just commenced transmission will delay a higher priority packet. Limiting the maximum size of frames on a network is a means of managing such delays. D. Networking Redundancy Spanning tree protocols are used to prevent loops in Ethernet networks that would otherwise result in “packet-storms”. RSTP is a standards-based means of converting a looped or meshed network into a branched tree through the selective blocking of Ethernet switch ports [32]. RSTP is often used to provide redundancy by reconfiguring the network when links fail. The speed of restoration (in the millisecond range) is not sufficient for process bus networks with inter-frame times of 250 µs or less. RSTP is usually enabled in a process bus, but solely to provide network protection in case loops are accidentally formed. Redundancy protocols such as High-availability Seamless Redundancy (HSR) and Parallel Redundancy Protocol (PRP) defined in IEC 62439-3 are applicable to process bus applications [33], but are beyond the scope of this paper. A process bus network may consist of multiple links between Ethernet switches, with different classes of traffic (using VLANs) restricted to particular links. The network for each class may be structured as a tree (no loops), but when overlaid upon each other create loops as far as RSTP (which is VLAN-unaware) is concerned. An example of this is shown in Fig. 4.

C

=

D

B

A C D

Fig. 4. Overlaying independent tree structures results in a mesh or loops when the communication links are combined. Rapid Spanning Tree Protocol will block two of the five links to create a linear network. MSTI0v(TrafficvClassv1)

MSTI1v(TrafficvClassv2)

B

A

time for each message class. GOOSE messages that “trip” plant (type 1A) have a 3 ms transfer time, while other “fast messages” (type 1B) have a 20 ms transfer time. SV data is classed as “raw data messages” (type 4) and have a transfer time requirement of 3 ms. The processing time required by merging units can be measured directly using Ethernet cards synchronized to the merging unit [30]. A draft standard for instrument transformer digital interfaces proposes limiting the sender’s processing time to 1.5 ms, ensuring that network transmission and receiver processing have at least 1.5 ms to handle SV data [31].

B

A

Overall Network

C D

Root Switch

B

A C ActivevLink NotvinvVLAN BlockedvLink

Root Switch

D

Fig. 5. Two multiple spanning tree instances (MSTIs) allow for independent tree structures. Two links will still be blocked, but these are different for each MSTI.

RSTP will block two links to break loops, but all links are required for the correct operation of the network. The links that are blocked will depend on the bridge and link priorities configured in the switches. MSTP, now part of IEEE Std 802.1Q, allows for multiple spanning tree instances (MSTIs) with independent settings (path and bridge priorities). VLANs are assigned to an MSTI, with the possibility of more than one VLAN sharing an MSTI. The path and bridge priorities need to be engineered so the correct links are blocked for each MSTI. The network will only operate correctly when the links that are VLAN filtered are the blocked links. If the MSTI parameters are left at default values, each MSTI will act as RSTP does, and the benefits will not be realized. A detailed network design is required for correct operation of MSTP [33]. Fig. 5 presents an example where bridge (Ethernet switch) and path priorities have been set to overcome the problem shown in Fig. 4. The link between switches C and D is not required for traffic class 2 and would be blocked with VLAN filtering, while links AB and A-D are blocked by MSTP. It should be noted that links are blocked only at one end, so verification of MSTP topologies requires examination of every port. MSTP will block the minimum number of ports in an MSTI to ensure a tree network. VLAN filtering is still required to ensure correct operation.

III. M ETHOD The evaluation of network performance presented here is experimental, as opposed to using event based simulation tools like OPNET or OMNeT++. Simulation allows for larger networks to be modeled [34], but results depend on the quality of the models. Substationrated industrial Ethernet switches are not widely used, and consequently detailed event-based models for simulation tools are not currently available.

D. INGRAM et al.: NETWORK INTERACTIONS AND PERFORMANCE OF A MULTI-FUNCTION IEC 61850 PROCESS BUS Ethernet Switch

5 Transparent Clock

S

F1 Transparent Clock

Station&Bus Root&Switch

"Field"&Switch

P

Transparent Clock

Fig. 6. The latency (residence time) of a frame in the network is measured using an Ethernet tap and precise Ethernet packet capture device.

A. Test Equipment An Endace DAG7.5G4 Ethernet capture card (DAG card) was used to measure the latency of frames, as this card prepends a precise time-stamp to the captured frame [35]. The DAG card is capable of capturing or transmitting four 1000 Mb/s Ethernet streams (or a combination of capturing and transmitting). A NetOptics 10/100/1000 Ethernet tap was placed between the message source (GOOSE or SV) and the first Ethernet switch, as shown in Fig. 6. t0 is the frame transmission time, t1 is the time the frame is received from the tap and t2 is the time the frame is received from the Ethernet switch. t1 and t2 are time-stamped with a common clock, and so the error is limited to that of the clock, which is 7.5 ns. The frame latency is simply the difference between t2 and t1 and requires that the Ethernet tap not introduce any significant delay. Testing has found the tap delay to be approximately 120 ns. This arrangement decouples t0 from the latency calculation and allows any source of Ethernet traffic to be used. The DAG card is used wherever possible as it transmits data with the most precise inter-frame times. Additional network traffic was injected at 1 Gb/s using the tcpreplay tool [36] on a computer running Ubuntu Linux. Transmissions from tcpreplay were captured with the DAG card to confirm that all frames were sent, and at the correct rate. This was required as the packet timing was software based, using a CPU intensive routine. Two 1000BASE-TX/1000BASE-SX media converters were used to connect the DAG card to Ethernet switches in another room. Back-to-back latency testing showed that these converters introduced an additional 3.52 µs of latency (with a standard deviation of 29 ns) for 130 byte frames.

Process&Bus Root&Switch

Management Computer

Media Converter Traffic Capture&g Generator

F2

Traffic Generator

"Field"&Switch Media Converter

TX SX

SX TX

Transparent Clock

F3

100BASE-TX/100BASE-FX 1000BASE-TX/1000BASE-SX

"Field"&Switch

Fig. 7. The test network used to investigate interactions between IP traffic, GOOSE and SV messages. “S” is the Station Bus root switch, “P” is the Process Bus root switch, and switches “F1”, “F2” and “F3” are field switches. Shared(Network((RSTP)

F2

F1

Dual(Network((MSTP)

F2

F1

F3

F3

P S

P VID1(Management VID8(GOOSE VID9(Sampled(Values VID15(PTP

S

Fig. 8. Two network topologies were used: a “shared network” and a “dual network”.

had four output queues and switch P had eight output queues. The test network was used in two different topologies. The first was a “shared network” using RSTP, modeled on a standard process bus. The second, a “dual network” used MSTP to provide separate links for different classes of traffic, based on VLAN tagging. The Ethernet switches in the dual network were powered on in various sequences (16 unique cases) to confirm that MSTP resulted in the same network configuration each time. Fig. 8 shows the topologies and links used by various classes of traffic for the two topologies. Four VLANs were configured to allow for IP, GOOSE, SV and PTP traffic. PTP traffic was not present for these tests.

B. Test Network

C. Interaction testing

A small network with five Ethernet switches (four transparent clocks and one conventional switch) was used to evaluate protocol interactions, and is shown schematically in Fig. 7. The “process bus” component operated at 100 Mb/s, using a combination of 100BASE-TX and 100BASE-FX media. The “control” component, which introduced the traffic to the network, operated at 1 Gb/s. Gigabit Ethernet was used to simulate the simultaneous arrival of frames from multiple sources. Switch S is the station bus root, switch P is the process bus root, and switches F1-F3 are field switches. All Ethernet switches were configured to enforce strict priority queuing, with 0 being the lowest priority and 7 the highest priority. Switches S, F1, F2 and F3

Interactions between protocols were expected to take two forms. The first would be the effect of high volume SV traffic on management and GOOSE signaling. The test arrangement to assess these effects is shown in Fig. 9. Ping messages with a 158 byte payload (resulting in a 200 byte frame) were transmitted at 100 ms intervals for 200 s. The 802.1Q priority of the ping request and response was configured in switches S and F3, with a variety of settings (0, 4 and 7) used to evaluate the effect of prioritization. Not all switches support defining the priority of management frames, so the response was verified with packet capture. SV background traffic had a fixed priority of 4, and varied

6

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

P

SV Generator TX SX

S

PING

SX TX

F3

F3 P

F2

F1

F2

SV Generator & Capture

P TX SX

SV Generator & Capture

P

TX SX

S

TX SX

GOOSE Generator

S

Management

PING messages

GOOSE Messages

PING messages

GOOSE Messages

Sampled values PTP time sync

Sampled values PTP time sync

Sampled values PTP time sync

Sampled values PTP time sync

A. Effect of SV Traffic on GOOSE and IP Ping response times are dependent on a range of factors, and network latency is only one of these.

MSTP Dual Network

8

10

12

Ping Response with SV Traffic RSTP Shared Network

6

P4 Ping, 12SV

P7 Ping, 0SV

P0 Ping, 12SV

P4 Ping, 0SV

P0 Ping, 0SV

P7 Ping, 20SV

P4 Ping, 20SV

P0 Ping, 20SV

P7 Ping, 12SV

P4 Ping, 12SV

P7 Ping, 0SV

P0 Ping, 12SV

P4 Ping, 0SV

P0 Ping, 0SV

IV. R ESULTS A large number of tests were performed using the method described in the previous section. Three SV traffic levels (0, 12 and 20 merging unit equivalents) have been selected to show the effect of traffic. Three 802.1Q priorities (1, 4 and 7) for IP and GOOSE traffic are shown, and all SV traffic had a fixed priority of 4.

Fig. 11 compares the result of 2000 pings for the dual and shared networks with a variety of SV traffic and Ping prioritizations. Each box represents the interquartile range (IQR), the bar indicates the mean, and the “whiskers” represent the extreme values. No outlier filtering has been used as the probability distribution is not Normal, and the bound of values is useful information for determining worst-case latency. The ping response is independent of SV load for the dual network, however there is a small increase in response time with high levels of SV traffic on the shared network. Outbound GOOSE messages exhibited the same latency regardless of topology or SV background traffic. The data presented in Fig. 12 shows that the shared and dual networks have similar latency, with only a 0.3 µs difference in mean latency. Outbound latency is tightly bounded, regardless of SV conditions. The latency of inbound GOOSE frames differs with topology. Fig. 13(a) shows that SV background traffic has an effect on GOOSE latency, however this effect is reduced when GOOSE messages are sent with maximum priority. It is apparent from Fig. 13(b) that SV traffic has no effect on inbound GOOSE messages when a dual network is used

Ping Time (ms)

in load (the equivalent of 0, 6, 12, and 20 merging units). The ping times were recorded for later analysis. Synthetic GOOSE messages were transmitted at 100 ms intervals. Each GOOSE frame was 146 bytes long and contained six entries in the transmitted dataset. The priority of the GOOSE messages was varied using the 802.1Q header (priority 0, 4 and 7). The second set of interactions were the complement of the first—to test the effect that management (ping, HTTP and SNMP) and GOOSE had on the delivery of SV messages. Fig. 10 shows the connections used for (a) IP based management and (b) GOOSE traffic. GOOSE messages were transmitted from switch F2 to switch S, and from switch S to switch F2. Management traffic, being IP based, is bi-directional and therefore packet flow in both directions was covered by a single test. Fig. 9 (influence of SV on IP and GOOSE) and Fig. 10 (influence of IP and GOOSE on SV) each show the shared network topology, however the same injection points were used for the dual network. SNMP traffic was created by polling switch F3 for the table ifTable that reports utilization statistics for each Ethernet port. Three different priorities of SNMP traffic were used (0, 4 and 7). The ping and SNMP background traffic was sustained while 1.6 × 106 SV frames were transmitted (simulating 20 merging units for 200 s). The GOOSE messages used in the previous test were used to investigate their effect on SV messages, and were sent in both directions. GOOSE messages traveling in the same direction as SV messages were termed “inbound” and those traveling in the opposite direction were termed “outbound”.

Fig. 10. Test arrangement to examine the influence of (a) IP management and (b) GOOSE traffic (in either direction) on sampled value (SV) messages. “P” is the Process Bus root switch and “S” is the Station Bus root switch.

4

Fig. 9. Test arrangement to examine the influence of sampled value (SV) traffic on (a) Ping and (b) GOOSE messages. “P” is the Process Bus root switch and “S” is the Station Bus root switch.

SX TX

F3

F3

GOOSE Generator & Capture

S

GOOSE Generator

F1

P7 Ping, 20SV

F2

F1

(b) SX TX

P4 Ping, 20SV

F2

F1

(a)

SV Generator

P0 Ping, 20SV

(b) SX TX

P7 Ping, 12SV

(a)

Fig. 11. Ping response boxplots for the RSTP shared network (left hand) and the MSTP dual network (right hand), with three Ping priorities and three sampled value (SV) traffic levels.

D. INGRAM et al.: NETWORK INTERACTIONS AND PERFORMANCE OF A MULTI-FUNCTION IEC 61850 PROCESS BUS

44

Outgoing GOOSE Latency with SV Traffic

38

40

42

MSTP Dual Network

P7 GOOSE, 20SV

P4 GOOSE, 20SV

P0 GOOSE, 20SV

P7 GOOSE, 12SV

P4 GOOSE, 12SV

P7 GOOSE, 0SV

P0 GOOSE, 12SV

P4 GOOSE, 0SV

P0 GOOSE, 0SV

P7 GOOSE, 20SV

P4 GOOSE, 20SV

P0 GOOSE, 20SV

P7 GOOSE, 12SV

P4 GOOSE, 12SV

P7 GOOSE, 0SV

P0 GOOSE, 12SV

P4 GOOSE, 0SV

P0 GOOSE, 0SV

36

GOOSE Latency (µs)

RSTP Shared Network

Fig. 12. Latency of outbound (from switch S to switch F2) GOOSE messages with three levels of sampled value (SV) traffic and three GOOSE message priorities. Incoming GOOSE − RSTP

(b)

36.5

37.0

37.5

Incoming GOOSE − MSTP

P7 GOOSE, 20SV

P4 GOOSE, 20SV

P0 GOOSE, 20SV

P7 GOOSE, 12SV

P4 GOOSE, 12SV

P0 GOOSE, 12SV

P7 GOOSE, 0SV

P4 GOOSE, 0SV

P0 GOOSE, 0SV

P7 GOOSE, 20SV

P4 GOOSE, 20SV

P0 GOOSE, 20SV

P7 GOOSE, 12SV

P4 GOOSE, 12SV

P7 GOOSE, 0SV

P0 GOOSE, 12SV

P4 GOOSE, 0SV

P0 GOOSE, 0SV

35.5

36.0

GOOSE Latency (µs)

200 150 100 50

GOOSE Latency (µs)

250

(a)

Fig. 13. Latency of inbound (from switch F2 to switch S) GOOSE messages with three levels of sampled value (SV) traffic and three GOOSE message priorities.

B. Effect of GOOSE and IP Traffic on Sampled Values The reliable and timely delivery of SV messages from merging units to protection relays is essential for the correct operation of a protection scheme. The experiments presented here evaluated how GOOSE and IP traffic on a shared process bus affected the transmission of SV messages. The performance of the SV network without background traffic was measured to provide a benchmark. This test confirmed that the equipment used was capable of passing a large number of SV messages without dropping frames. Testing showed that a transmission of 20 merging unit did not incur any frame loss. The latency for the 20th merging unit did not exceed 222 µs, and the mean latency for the same merging unit was 207 µs. Latency for the last merging unit is higher due to queuing delays. Two network designs (RSTP and MSTP) were tested to ascertain whether the separate link for management and GOOSE traffic was required from a performance perspective. GOOSE traffic is likely to be present on a process bus, even under normal conditions. Outgoing GOOSE messages had no impact on SV latency, as evidenced

7

by the similarity of sub-panels 2 and 3 in Fig. 14. This shows that GOOSE tripping of circuit breakers (an “outbound” message) via a process bus will not affect the flow of SV information from the switchyard back to the SAS. Incoming GOOSE traffic, shown in sub-panels 4 and 5 in Fig. 14 shows that sharing the network did increase SV latency, with a maximum increase of 37 µs. A “dual network” with “inbound” GOOSE messages experiences the same latency for SV messages as a network without GOOSE traffic. This shows that the second link, enabled through the use of MSTP and VLANs, effectively isolates traffic. The greatest variation in latency with IP traffic was found to be with SNMP polling of the ifTable data. Fig. 15 shows that the prioritization of SNMP traffic has little effect on SV latency, but the topology of the network does. The clustering of results around the mean is such that the IQR box appears as a line. Each SNMP poll transmitted 1067 bytes (in 12 packets) from the querying computer, and received 3294 bytes (in 12 packets) back from the Ethernet switch. The maximum latency for the last merging unit with RSTP was 245 µs, compared to 224 µs for the MSTP dual network. Similar results were observed with the first merging unit (53 µs with RSTP compared to 28 µs with MSTP). TCP traffic (HTTP and SSH) from several switches was found to be limited to 582 bytes, the minimum size to carry a 512 byte TCP payload. This reduces the blocking effect of low priority frames, but was only found to be the case in two makes of Ethernet switches. Commercial grade managed switches and one “industrial switch” had frame sizes of 1318 bytes. An MMS master station and target device were not available for testing, however it is expected that the results would be similar. MMS traffic captured from other substations had packet sizes ranging from 200–1518 bytes, and these large frames may result in undesirable latency. V. D ISCUSSION A. Protocol Interaction The results presented in the previous section are significant for several reasons. The most significant finding is that GOOSE messages (at a rate of ten per second) and SV data (20 merging units) can share a process bus without adverse interactions. The SV load is at the upper limit, and therefore operating the process bus with a more realistic load will provide greater capability of handling unexpected traffic. The only interactions that were apparent were when the messages traveled in the same direction on the same path, which resulted in additional queuing delays. Fig. 16 shows this behavior graphically with circles and squares representing different message types, with (a) representing “counter flow” traffic with no queuing and (b) representing both message types sharing the outgoing port. This provides confidence that digital transmission of circuit breaker trip commands, such

8

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

(2)

(3)

(4)

(5)

150 100

RSTP

None

MSTP

RSTP

Outbound GOOSE

Pri 7 GOOSE MU 20

Pri 4 GOOSE MU 20

Pri 0 GOOSE MU 20

Pri 7 GOOSE MU 1

Pri 4 GOOSE MU 1

Pri 0 GOOSE MU 1

Pri 7 GOOSE MU 20

Pri 4 GOOSE MU 20

Pri 0 GOOSE MU 20

Pri 7 GOOSE MU 1

Pri 4 GOOSE MU 1

Pri 0 GOOSE MU 1

Pri 7 GOOSE MU 20

Pri 4 GOOSE MU 20

Pri 0 GOOSE MU 20

Pri 7 GOOSE MU 1

Pri 4 GOOSE MU 1

Pri 0 GOOSE MU 1

Pri 7 GOOSE MU 20

Pri 4 GOOSE MU 20

Pri 0 GOOSE MU 20

Pri 7 GOOSE MU 1

Pri 4 GOOSE MU 1

Pri 0 GOOSE MU 1

No GOOSE MU 20

No GOOSE MU 1

50

SV Latency (µs)

200

250

Effect of Inbound and Outbound GOOSE on Sampled Values (1)

MSTP

Inbound GOOSE

Fig. 14. Latency of sampled value (SV) messages from the first and last merging units of 20, with no traffic, “outbound” GOOSE, and “inbound” GOOSE traffic. Three priorities (0, 4 and 7) of GOOSE message are used.

B. Multiple Networks with Shared Switches The complexity of a dual network, using MSTP and VLANs to segregate traffic classes, is difficult to justify in terms of network performance for a simple process bus. This is a side-effect of the messages and general “direction of travel” working well. There are however several situations where a separate network may be beneficial. The first case is during network testing, where a separate management network allows for close supervision of Ethernet switches to take place without “observer effects” materially changing the behavior of the network under test. Detailed metrics can be

RSTP

Pri 7 SNMP MU 20

Pri 4 SNMP MU 20

Pri 0 SNMP MU 20

Pri 7 SNMP MU 1

Pri 4 SNMP MU 1

Pri 0 SNMP MU 1

Pri 7 SNMP MU 20

Pri 4 SNMP MU 20

Pri 0 SNMP MU 20

Pri 7 SNMP MU 1

Pri 4 SNMP MU 1

Pri 0 SNMP MU 1

50

100

150

200

250

Effect of SNMP Background Traffic on Sampled Values

SV Latency (µs)

as a GOOSE message to a smart circuit breaker, are not impeded by SV traffic. Low priority IP traffic does not affect SV latency when the MTU is small. The minimum MTU for IP is 576 bytes, which allows for a 512 byte payload and a 64 byte header (a 20 byte header commonly used). A 512 byte payload, when packaged in an 802.1Q tagged Ethernet frame results in a 578 byte message. This limits queuing delays to 47.2 µs on a 100 Mb/s network. Having devices in the switchyard restrict their packet size to the minimum is beneficial, but not all devices do this. Checking the maximum IP frame size is recommended, as the maximum frame size may be configurable. Reducing the frame size of low priority messages will reduce the latency experienced by higher priority frames. Network testing, such as that described in this paper, is a key step when designing process bus networks. Proving the performance of the underlying data network eliminates it as a source of failure should the protection system fail to meet its design goals. Stress testing, with higher than expected loads, identifies the “breaking point” of the network. It is important that the limit of operation be determined for each network design, so as to identify the additional capacity available for unexpected traffic.

MSTP

Fig. 15. Latency of sampled value (SV) messages for first and last merging units of 20, with three priorities of SNMP traffic (0, 4 and 7).

(a) Port 1

Port 2

(b) Port 1 Port 3 Port 2

Fig. 16. Queuing of frames in an Ethernet switch, where different types of traffic, ■ and •, flow in (a) opposite directions and (b) the same direction.

collected during the engineering phase to “type test” the network, and a simplified network can be used in the final product. A second case for a separate monitoring/management network (using the same Ethernet switches as the primary network) is for alarming and monitoring. If a field device fails and floods the network with traffic, SNMP trap messages may be dropped and the failure not be detected if a dedicated path is not provided. Port ingress rate limiting is one

D. INGRAM et al.: NETWORK INTERACTIONS AND PERFORMANCE OF A MULTI-FUNCTION IEC 61850 PROCESS BUS

way of protecting against this type of failure, but this also complicates network design and configuration. Finally, a separate “station bus” network that is connected to devices in the switchyard may be desirable for management purposes. Applications include firmware updates, log file interrogation and configuration changes using MMS. Prototype merging units with station bus and process bus interfaces have been described by some manufacturers [37]. The approximate cost increase for an additional two cores in a fiber optic cable is 12% of the cable cost, however the existing Ethernet switches, power supplies and outdoor enclosures can be used. This is a lower cost option than extending the station bus to the switchyard with a fully duplicated network. VI. C ONCLUSIONS The results presented in this paper demonstrate that a multi-function process bus can coexist on a shared Ethernet network. A fully switched Ethernet network with full duplex connections does not experience collisions, however queuing introduces latency. Provided the data rate is less than the maximum capacity of any link, no frames will be lost. Process bus networks are “mission critical” and simply cannot be permitted to fail. This study has evaluated the process bus in a SAS from a data network perspective, rather than examining protection performance. While protection performance is important, having a stable and reliable network foundation is critical. Quantitative testing of network performance informs product selection by customers and product development by suppliers. More complex, but less commonly used, networking protocols such as MSTP enable process bus network hardware to provide station bus connectivity to devices that require it. Straightforward guidelines for building a “dual bearer” network to take advantage of MSTP have been presented in this paper. A shared multi-function process bus is a viable means of reducing the cabling in a substation, while increasing the safety of substation control rooms through the elimination of hazardous voltages and currents. Standards-based process buses facilitate the adoption of new technology NCITs. These next generation transducers improve the safety, and reduce the environmental impact, of high voltage substations. ACKNOWLEDGMENTS Belden Solutions and Cisco Systems kindly contributed hardware for the process bus PTP test bed. R EFERENCES [1] T. Skeie, S. Johannessen, and C. Brunner, “Ethernet in substation automation,” IEEE Control Syst. Mag., vol. 22, no. 3, pp. 43–51, Jun. 2002. [2] M. P. Pozzuoli and R. Moore, “Ethernet in the substation,” in IEEE PES Gen. Meet. 2006, Minneapolis, MN, USA, 18–22 Jun. 2006, pp. 1–7. [3] D. M. E. Ingram, D. A. Campbell, P. Schaub, and G. Ledwich, “Test and evaluation system for multi-protocol sampled value protection schemes,” in Proc. 2011 IEEE Trondheim PowerTech, Trondheim, Norway, 19–23 Jun. 2011, pp. 1–7.

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[4] J.-P. Georges, E. Rondeau, and T. Divoux, “How to be sure that switched Ethernet networks satisfy the real-time requirements of an industrial application?” in Proc. 11th IEEE Int. Symp. Indust. Electron. (ISIE), vol. 1, L’Aquila, Italy, 8–11 Jul. 2002, pp. 158–163. [5] J. Jasperneite, P. Neumann, M. Theis, and K. Watson, “Deterministic real-time communication with switched Ethernet,” in Proc. 4th IEEE Int. Wkshp Fact. Comm. Sys. (WFCS), Västerås, Sweden, 27–30 Aug. 2002, pp. 11–18. [6] IEEE Computer Society, IEEE Standard for Local and Metropolitan Area Networks – Media Access Control (MAC) Bridges and Virtual Bridge Local Area Networks, IEEE Std. 802.1Q-2011, 31 Aug. 2011. [7] J.-P. Georges, T. Divoux, and E. Rondeau, “Strict priority versus weighted fair queueing in switched Ethernet networks for time critical applications,” in Proc. 19th IEEE Int. Parallel Distrib. Proc. Symp. (IPDPS), Denver, CO, USA, 3–8 Apr. 2005, pp. 141–141. [8] L. Thrybom and G. Prytz, “QoS in switched industrial Ethernet,” in Proc. 14th IEEE Int. Conf. Emerg. Tech. Factory Autom. (ETFA), Palma de Mallorca, Spain, 22–25 Sep. 2009, pp. 185–188. [9] T. Sauter, “The three generations of field-level networksevolution and compatibility issues,” IEEE Trans. Ind. Electron., vol. 57, no. 11, pp. 3585–3595, Nov. 2010. [10] SMB Smart Grid Strategic Group. (2010, Jun.) Smart grid standardization roadmap. IEC. [Online]. Available: http:// www.iec.ch/smartgrid/downloads/sg3_roadmap.pdf [11] M. S. Thomas and I. Ali, “Reliable, fast, and deterministic substation communication network architecture and its performance simulation,” IEEE Trans. Power Del., vol. 25, no. 4, pp. 2364–2370, Oct. 2010. [12] M. G. Kanabar and T. S. Sidhu, “Performance of IEC 618509-2 process bus and corrective measure for digital relaying,” IEEE Trans. Power Del., vol. 26, no. 2, pp. 725–735, Apr. 2011. [13] T. Sauter and M. Lobashov, “End-to-end communication architecture for smart grids,” IEEE Trans. Ind. Electron., vol. 58, no. 4, pp. 1218–1228, Apr. 2011. [14] V. C. Güngör, D. Sahin, T. Kocak, S. Ergut, C. Buccella, C. Cecati, and G. P. Hancke, “A survey on smart grid potential applications and communication requirements,” IEEE Trans. Ind. Informat., vol. 9, no. 1, pp. 28–42, Feb. 2013. [15] J. Silvestre-Blanes, L. Almeida, R. Marau, and P. Pedreiras, “Online QoS management for multimedia real-time transmission in industrial networks,” IEEE Trans. Ind. Electron., vol. 58, no. 3, pp. 1061–1071, Mar. 2011. [16] D. Westermann and M. Kratz, “A real-time development platform for the next generation of power system control functions,” IEEE Trans. Ind. Electron., vol. 57, no. 4, pp. 1159– 1166, Apr. 2010. [17] W. Ren, M. Sloderbeck, M. Steurer, V. Dinavahi, T. Noda, S. Filizadeh, A. R. Chevrefils, M. Matar, R. Iravani, C. Dufour, J. Belanger, M. O. Faruque, K. Strunz, and J. A. Martinez, “Interfacing issues in real-time digital simulators,” IEEE Trans. Power Del., vol. 26, no. 2, pp. 1221–1230, Apr. 2011. [18] IEC TC57, Communication Networks and Systems in Substations – Part 1: Introduction and Overview, IEC TR 618501:2003, Apr. 2003. [19] ——, Communication networks and systems for power utility automation – Part 9-2: Specific communication service mapping (SCSM) – Sampled values over ISO/IEC 8802-3, IEC 61850-9-2 ed2.0, Sep. 2011. [20] ——, Communication networks and systems for power utility automation – Part 8-1: Specific communication service mapping (SCSM) – Mappings to MMS (ISO 9506-1 and ISO 95062) and to ISO/IEC 8802-3, IEC 61850-8-1 ed2.0, Jun. 2011. [21] O. Preiss and A. Wegmann, “Towards a composition model problem based on IEC 61850,” J. Syst. Software, vol. 65, no. 3, pp. 227–236, Mar. 2003. [22] UCAIug. (2004, 7 Jul.) Implementation guideline for digital interface to instrument transformers using IEC 61850-9-2 R2-1. UCA International Users Group. Raleigh, NC, USA. [Online]. Available: http://iec61850.ucaiug.org/ Implementation%20Guidelines/DigIF_spec_9-2LE_ R2-1_040707-CB.pdf [23] C. Brunner and G. S. Antonova, “Smarter time sync: Applying the IEEE PC37.238 standard to power system applications,” in Proc. 64rd Ann. Conf. Prot. Rel. Eng., College Station, TX, USA, 11–14 Apr. 2011, pp. 91–102.

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[24] J. McGhee and M. Goraj, “Smart high voltage substation based on IEC 61850 process bus and IEEE 1588 time synchronization,” in Proc 1st IEEE Int. Conf. on Smart Grid Commun. (SmartGridComm), Gaithersburg, MD, USA, 4–6 Oct. 2010, pp. 489–494. [25] IEEE Power & Energy Society, IEEE Standard Profile for Use of IEEE 1588 Precision Time Protocol in Power System Applications, IEEE Std. C37.238-2011, 14 Jul. 2011. [26] L. Thrybom and G. Prytz, “Multicast filtering in industrial Ethernet networks,” in Proc. 8th IEEE Int. Wkshp Fact. Comm. Sys. (WFCS), Nancy, France, 18–21 May 2010, pp. 185–188. [27] D. M. E. Ingram, P. Schaub, and D. Campbell, “Multicast traffic filtering for sampled value process bus networks,” in Proc. 37th Ann. Conf. IEEE Indust. Electron. Soc. (IECON), Melbourne, Australia, 7–10 Nov. 2011, pp. 4710–4715. [28] D. Harrington, R. Presuhn, and B. Wijnen, An Architecture for Describing Simple Network Management Protocol (SNMP) Management Frameworks, IETF RFC 3411, Dec. 2002. [Online]. Available: http://tools.ietf.org/html/rfc3411 [29] IEC TC57, Communication Networks and Systems in Substations – Part 5: Communication Requirements for Functions and Device Models, IEC 61850-5:2003, Jul. 2003. [30] D. M. E. Ingram, F. Steinhauser, C. Marinescu, R. R. Taylor, P. Schaub, and D. A. Campbell, “Direct evaluation of IEC 61850-9-2 process bus network performance,” IEEE Trans. Smart Grid, vol. 3, no. 4, pp. 1853–1854, Dec. 2012. [31] IEC TC38, Instrument Transformers – Part 9: Digital interface for instrument transformers (Draft), IEC 61869-9, Jul. 2011. [32] M. Marchese, M. Mongelli, and G. Portomauro, “Simple protocol enhancements of Rapid Spanning Tree Protocol over ring topologies,” in Proc. IEEE Global Telecom. Conf. (GLOBECOM), Miami, FL, USA, 6–10 Dec. 2010, pp. 1–5. [33] M. Goraj and R. Harada, “Migration paths for IEC 61850 substation communication networks towards superb redundancy based on hybrid PRP and HSR topologies,” in Proc. 11th IET Int. Conf. Dev. Power Sys. Prot. (DPSP), Birmingham, UK, 23–26 Apr. 2012, pp. 1–6. [34] P. Ferrari, A. Flammini, S. Rinaldi, and G. Prytz, “Mixing real time Ethernet traffic on the IEC 61850 process bus,” in Proc. 9th IEEE Int. Wkshp Fact. Comm. Sys. (WFCS), Lemgo, Germany, 21–24 May 2012, pp. 153–156. [35] J. Micheel, S. Donnelly, and I. Graham, “Precision timestamping of network packets,” in Proc. 1st ACM SIGCOMM Wkshp Internet Meas., San Francisco, CA, USA, 1–2 Nov. 2001, pp. 273–277. [36] A. Turner. (2012) Tcpreplay – pcap editing & replay tools. [Online]. Available: http://tcpreplay.synfin.net/ [37] Y. Tanaka, S. Oda, K. Adachi, and H. Noguchi, “Development of process bus for busbar protection and voltage selection scheme,” in Proc. 11th IET Int. Conf. Dev. Power Sys. Prot. (DPSP), Birmingham, UK, 23–26 Apr. 2012, pp. 1–5.

David Ingram (S’94 M’97 SM’10) received the B.E. (with honours) and M.E. degrees in electrical and electronic engineering from the University of Canterbury, Christchurch, New Zealand, in 1996 and 1998, respectively. He is currently working toward the Ph.D. degree at the Queensland University of Technology, Brisbane, Australia, with research interests in substation automation and control. He has previous experience in the Queensland electricity supply industry in transmission, distribution, and generation. Mr. Ingram is a Chartered Member of Engineers Australia and is a Registered Professional Engineer of Queensland.

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

Pascal Schaub received the B.Sc. degree in computer science from the Technical University Brugg-Windisch, Windisch, Switzerland, (now the University of Applied Sciences and Arts Northwestern Switzerland) in 1995. He was with Powerlink Queensland as Principal Consultant Power System Automation, developing IEC61850 based substation automation systems. He is currently the Principal Process Control Engineer at QGC, a member of the BG Group. He is a member of Standards Australia working group EL-050 “Power System Control and Communications” and a member of the international working group IEC/TC57 WG10 “Power System IED Communication and Associated Data Models”.

Richard Taylor (M’08) received the B.E. (with honours) and M.E. degrees in electrical and electronic engineering from the University of Canterbury, Christchurch, New Zealand, in 1977 and 1979, respectively, and the Ph.D. degree from the University of Queensland, Brisbane, Australia in 2007. He is the former Chief Technical Officer of Mesaplexx Pty Ltd and currently holds a fractional appointment as an Adjunct Professor in the School of Electrical Engineering and Computer Science at the Queensland University of Technology. He started his career as a telecommunications engineer in the power industry in New Zealand. In the past 25 years he has established two engineering businesses in Queensland, developing innovative telecommunications products.

Duncan Campbell (M’84) received the B.Sc. degree (with honours) in electronics, physics, and mathematics and the Ph.D. degree from La Trobe University, Melbourne, Australia. He has collaborated with a number of universities around the world, including Massachusetts Institute of Technology, and Telecom-Bretagne, Brest, France. He is currently a Professor with the School of Electrical Engineering and Computer Science, Queensland University of Technology, Brisbane, Australia, where he is also the Director of the Australian Research Centre for Aerospace Automation (ARCAA). His research areas of interest are robotics and automation, embedded systems, computational intelligence, intelligent control, and decision support. Prof. Campbell is the Immediate Past President of the Australasian Association for Engineering Education and was the IEEE Queensland Section Chapter Chair of the Control Systems/Robotics and Automation Society Joint Chapter (2008/2009).

CHAPTER 11

Multicast traffic filtering for sampled value process bus networks A common feature of process bus communication is the use of Ethernet as the underlying communications medium. IEC 61850 communication mappings (GOOSE and sampled values) and the Precision Time Protocol (PTP) Power System Profile use multicast transmission, where a single transmission can be received by multiple stations. The main distinction between multicast and broadcast is that multicast traffic can be filtered. Filtering is achieved through the use of specific destination addresses in the Ethernet frame. Multicast transmission is one of the most efficient means of implementing publisher-subscriber communications as the messages are distributed by Ethernet switches rather than the merging units and protection relays. This chapter presents research into system engineering methods for network traffic management, providing a human-readable addressing scheme applicable to a wide range of substation designs. Firstly, Virtual Local Area Networks (VLANs) are used to segregate entire classes of traffic (e.g. GOOSE, PTP and sampled values), and then filtering based on multicast destination address further refines the flow of information. A formal scheme is presented for assigning VLAN identifiers and deriving multicast destination addresses from IEC 81346 plant reference designators (used in the power industry to identify physical plant). This two-stage approach simplifies the network engineering of a substation automation system and provides consistency throughout an organisation. A common VLAN structure is used in every substation, and site-specific multicast addresses are determined by the physical topology of the substation. Whether VLAN-only or VLAN/multicast filtering is employed has little impact on the performance of Ethernet switches; however the consistency of the proposed traffic management scheme will simplify the commissioning and ongoing maintenance of process bus networks, reducing the chance of human error.

©2011 IEEE. Reprinted, with permission, from D.M.E. Ingram, P. Schaub & D.A. Campbell, “Multicast traffic filtering for sampled value process bus networks”, 37th Annual Conference of the IEEE Industrial Electronics Society, November 2011.

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Statement of Contribution The authors listed below have certified* that: 1.

they meet the criteria for authorship in that they have participated in the conception, execution, or interpretation, of at least that part of the publication in their field of expertise;

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they take public responsibility for their part of the publication, except for the responsible author who accepts overall responsibility for the publication;

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there are no other authors of the publication according to these criteria;

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potential conflicts of interest have been disclosed to (a) granting bodies, (b) the editor or publisher of journals or other publications, and (c) the head of the responsible academic unit, and

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they agree to the use of the publication in the student’s thesis and its publication on the QUT ePrints database consistent with any limitations set by publisher requirements.

In the case of this chapter: Title

Multicast Traffic Filtering for Sampled Value Process Bus Networks

Conference

37th Annual Conference of the IEEE Industrial Electronics Society (IECON). Melbourne, Australia.

DOI

10.1109/IECON.2011.6120087

Status

Presented, November 2011

Contributor David M. E. Ingram

Statement of contribution* Design of procedure, data analysis and drafting the manuscript.

12 October 2012 Duncan A. Campbell

Critical revision of the paper.

Pascal Schaub

Experimental design, critical revision of the paper.

Principal Supervisor Confirmation I have sighted email or other correspondence from all co-authors confirming their certifying authorship. Prof Duncan A. Campbell

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Multicast Traffic Filtering for Sampled Value Process Bus Networks David M. E. Ingram School of Engineering Systems Queensland University of Technology Brisbane, QLD 4000, Australia email: [email protected]

Pascal Schaub Powerlink Queensland Virginia, QLD 4014 Australia

Abstract—Ethernet is a key component of the standards used for digital process buses in transmission substations, namely IEC 61850 and IEEE Std 1588-2008 (PTPv2). These standards use multicast Ethernet frames that can be processed by more than one device. This presents some significant engineering challenges when implementing a sampled value process bus due to the large amount of network traffic. A system of network traffic segregation using a combination of Virtual LAN (VLAN) and multicast address filtering using managed Ethernet switches is presented. This includes VLAN prioritisation of traffic classes such as the IEC 61850 protocols GOOSE, MMS and sampled values (SV), and other protocols like PTPv2. Multicast address filtering is used to limit SV/GOOSE traffic to defined subsets of subscribers. A method to map substation plant reference designations to multicast address ranges is proposed that enables engineers to determine the type of traffic and location of the source by inspecting the destination address. This method and the proposed filtering strategy simplifies future changes to the prioritisation of network traffic, and is applicable to both process bus and station bus applications. Index Terms—Ethernet networks, IEC 61850, IEEE 1588, multicast filtering, power transmission, protective relaying, smart grids, VLAN

I. I NTRODUCTION The ‘smart grid’ has been defined as an umbrella term for technologies that are an alternative to the traditional practices in power systems, with the following benefits: reliability, flexibility, efficiency and environmentally friendly operation [1]. Much of the smart grid focus has been in the distribution arena, where distributed automation provides many benefits. There is also an opportunity to introduce smart technologies into transmission networks to improve observability and control of the high voltage power system, and to achieve greater interoperability between substation control equipment. Sampled value (SV) process buses are a means of achieving this [2], and the benefits of a digital process bus have been well documented in the literature [3]–[5]. Full scale process bus based substations have been commissioned in China, and more are under construction [6]. A. Standardisation The IEC Smart grid vision standardisation ‘roadmap’ identifies the IEC 61850 series of standards to be key components of substation automation

Duncan A. Campbell School of Engineering Systems Queensland University of Technology Brisbane, QLD 4000, Australia

and protection for the transmission smart grid [7]. The objective of IEC 61850 substation automation standardisation is to provide a communication standard that meets existing needs, while supporting future developments as technology improves. IEC 61850 communication profiles are based, where possible, on existing international standards. An example of the adoption of existing standards is the use of IEEE Std 802.3 Ethernet for message passing. IEC 61850-9-2 details how instantaneous high speed sampled value (SV) measurements shall be transmitted over an Ethernet network [8]. IEC 61850-8-1 defines how transduced analogue values and digital statuses can be transmitted over an Ethernet network using Generic Object Oriented Substation Events (GOOSE) [9]. Manufacturing Messaging Specification (MMS, ISO 9506) is specified in [9] for configuration and control functions. The same smart grid strategy that proposes IEC 61850 for substation automation and control also recommends the use of version 2 of the Precision Time Protocol (PTPv2), IEEE Std 1588-2008, for high accuracy time synchronisation in substations. Annex F of IEEE Std 1588-2008 defines a mapping for PTPv2 over Ethernet, and is required by the IEEE Std C37.238 power system profile (that specifies how PTPv2 will be used for power system applications). The same data network infrastructure can therefore be used for SV, GOOSE, MMS and for time synchronisation. B. Substation Terminology The primary plant in a substation is the high voltage equipment and includes bus bars, circuit breakers, isolators, power transformers, current transformers (CTs) and voltage transformers (VTs). The control equipment that is the ‘intelligence’ in a substation is termed the Substation Automation System (SAS), and includes protection, control and automation devices (generically referred to as ‘Intelligent Electronic Devices’, or IEDs). The link between the primary plant and SAS are called ‘process connections’, and are typically copper connections with analogue voltages and currents (typically 110 VAC and 1 AAC respectively in Australia), or digital signals based on switching battery voltage (typically 125 VDC in Australia). Fig. 1 shows this diagrammatically for a 132 kV substation double-bus feeder bay.

Fig. 1.

Substation equipment definitions.

A digital process bus carries information from the primary plant to the SAS, and from the SAS to the primary plant over a digital network — it is not just sampled CT and VT data. All likely protocols need to be considered (GOOSE, MMS, SV, PTPv2) in a shared network process bus design, especially the way in which they may interact. A digital process bus uses a Merging Unit (MU) to collect (from digital systems) or sample (from analogue systems) the output of three or four CTs and VTs (neutral measurement is often omitted) and transmit this information in a standardised form. IEC 61850-9-2 defines the ‘packaging’ and encoding of this transmission, but the actual content can be defined by other standards or be vendor specific. Point-point process bus connections have relatively low traffic volumes, and so the rest of this paper only deals with shared process bus implementations. A ‘bay’ is the collective name for a circuit breaker and its associated isolators, earth switches and instrument transformers [10]. Some substation arrangements, particularly the ‘breaker-and-a-half’ and ‘double-breaker’ configurations, group bays common to feeders or transformers together into ‘diameters’. This arrangement is commonly used at 220 kV and above in Australia. Fig. 2 shows two diameter based arrangements (breaker-and-a-half and double-breaker) and two single bay arrangements (bus selectable and fixed bus). More detail on switchgear configuration, including less common arrangements, can be found in Chapter 11 of [11]. The largest substations in Queensland have over twenty-five 110 kV bays and seven 275 kV breaker-and-a-half diameters. Over 45 three-phase sets of CTs would be used in a substation of this size. C. Ethernet Messaging There are three types of Ethernet message. The most common are unicast messages (received by a single device) and broadcast messages (received by all devices on the same LAN segment). Multicast messages are received by multiple devices that each share a common need for the message. GOOSE and SV implement a Publisher/Subscriber model and the multicast transmission of frames is key to this. Each subscriber (an IED in this application) receives a copy of messages that it is interested in, and the publishers do not distinguish between the various subscribers [12]. MUs publish SV messages and IEDs

Fig. 2. Illustration of ‘bays’ and ‘diameters’ as sub-parts of substations. Alternative names for arrangements are shown in brackets.

(various types) publish GOOSE messages containing digital or transduced analogue information. IEDs are the subscribers of SV and GOOSE messages. This model is connectionless and therefore the publisher transmits multicast messages without expecting any acknowledgment. This is efficient and enables high levels of real-time traffic to be transmitted by Ethernet. Large volumes of multicast traffic can affect the performance of protection IEDs and PTPv2 clocks, and therefore a means of reducing the amount of multicast traffic sent to these devices is required. II. BACKGROUND A. Ethernet Prioritisation GOOSE, SV and PTPv2 all specify the use of Virtual LAN (VLAN) frame tagging according to IEEE Std 802.1Q-2005 [13]. 802.1Q tags provide additional information to network switches about which VLAN a frame belongs to (the VLAN ID) and the switching priority that VLAN aware switches should give to the frame. Eight priority levels are defined, ranging (low to high) from 1 (Background) to 7 (Network Control). The eighth priority is 0 (Best Effort), which is the default and ranks higher than Background. Priority tagging is used to enhance the real time performance of Ethernet, and is a well established technique, as is the use of multicast domains to group receivers that subscribe to particular data streams [14]– [16]. B. Sampled Value Implementations In an attempt to reduce the complexity and variability of implementing an interoperable process bus based on IEC 61850-9-2, an implementation guideline was developed by a group of substation automation experts that is commonly referred to as ‘9-2 Light Edition’ or ‘9-2LE’ [17]. This guideline specifies the data sets

that are transmitted, sampling rates, time synchronisation requirements and the physical interfaces to be used. A typical 9-2LE SV frame is 126 octets long, including the Ethernet and 802.1Q headers. Twelve extra octets of Ethernet framing are transmitted with each message, giving the equivalent of 1104 bits to be transmitted for each SV frame. The standard 9-2LE sampling rate for protection applications is 80 samples per nominal power system cycle, and this is based on the nominal system frequency (no frequency tracking is employed). A MU in a 50 Hz power system will transmit 4000 frames per second, resulting in a traffic rate of 4.4 Mbit/s, while a MU in a 60 Hz system would generate traffic of 5.3 Mbit/s due to the higher sampling rate of 4800 Hz. Fast Ethernet (100 Mb/s) can accommodate a maximum of eighteen 60 Hz merging units or twenty-two 50 Hz merging units, providing there is no other network traffic. GOOSE, MMS and PTPv2 traffic need to share the same network and so the maximum number of MUs is dependent on the rate and size of the other traffic. A large substation with a process bus may have in excess of 50 MUs, and so Gigabit Ethernet would be required if data from all MUs was required in one place — this would be the case for whole of substation disturbance monitoring, power quality measurement or low impedance bus zone protection. C. Multicast Addressing and Filtering GOOSE and SV are multicast protocols, and PTPv2 has a multicast option that is mandated by the IEEE Std C37.238 PTPv2 profile for power system application. The destination multicast address is based on the Organisation Unique Identifier (OUI) of the organisation that sponsors the protocol, but with the group bit set. Informative annexes of [8] and [9] recommend the range 01:0C:CD:01:00:00 to 01:0C:CD:01:01:FF for GOOSE and 01:0C:CD:04:00:00 to 01:0C:CD:04:01:FF for SV, but this is not mandatory. The PTP multicast destination address is 01:1B:19:00:00:00 for all messages except peer delay, which uses 01:80:C2:00:00:0E to circumvent port blocking protocols such as spanning tree and rapid spanning tree. VLANs are intended to segregate traffic of different classes, while using common bearers [18]. The behaviour of multicast and broadcast frames is restricted by VLAN segregation to being distributed only within that VLAN. The combination of reduced broadcast scope and prioritisation goes a long way towards solving the potential interactions between SV and PTPv2. Multicast address filters limit the distribution of multicast addressed frames to the subscriber ports that require the data, rather than simply transmitting the frame to all ports. This can either be static filtering, defined through the switch’s management interface (basic filtering services), or dynamic filtering control (extended filtering services) through the use of GARP Multicast Registration Protocol (GMRP) or

its replacement, Multiple MAC Registration Protocol (MMRP) [19]. D. Imperfect Multicast Filtering The microprocessors used in devices such as PTPv2 clocks and protection IEDs often have basic support for multicast filtering to reduce CPU load, although more sophisticated devices include internal Ethernet switches. A common basic filtering technique is ‘imperfect hashing’, where a multicast destination address is hashed to a reduced number of addresses (typically between 64 and 256) [20]. Each entry in the hash table represents many (up to 240 ) multicast addresses, and so address collisions are likely. Ideally multicast destination addresses would be selected to avoid collisions between GOOSE, SV and PTPv2, but the variety of imperfect hashing implementations and the requirement to use particular OUIs means this is not possible, and was identified as a concern in IEC 61850-9-2. III. F ILTERING FOR S UBSTATION AUTOMATION Two levels of traffic segregation are recommended. The first is through the use of VLAN filtering (802.1Q) to prioritise the protocols and their application, and the second level is to use multicast address filtering (802.1D) to limit the flow of information within the particular VLAN. Some VLANs may not require any multicast filtering, in which case multicast frames will be handled as if they were broadcast frames, but restricted to that VLAN. This approach is consistent with the draft Network Engineering Guidelines that will be published as IEC TR 61850-90-4. The priority assigned to a protection trip GOOSE message intended to clear a faulted transmission line will be higher than for a GOOSE message containing the temperature of power transformer windings. Prioritisation solely by protocol is not sufficient — the application of the protocol needs to be considered. VLAN segregation prevents low cost devices with imperfect multicast filtering from failing under the onslaught of traffic that is irrelevant to that device. Separate VLANs should also be created for PTPv2 and SV traffic, as well as for MMS if this protocol is used in the process bus. Multicast address filtering, the second layer, is used where the levels of relevant traffic either exceeds the network capacity or the capacity of the subscriber to process messages. The first situation would arise with a 50 Hz power system where more than 22 SV sources shared a Fast Ethernet LAN. The backplane of an Ethernet switch will operate at faster speeds and so can manage the traffic, but the rate of any given link (incoming or outgoing) cannot exceed 100 Mb/s. Multicast address filtering can be applied to subscriber ports to ensure that only the relevant messages are put onto the wire. This application is intended for process bus, but is equally applicable to station bus if IEDs cannot deal with a flood of GOOSE messages. Multicast address filtering can limit the traffic to levels where IED performance is not degraded.

Fig. 3. Illustration of VLAN and multicast address filtering operating in multiple dimensions. VLANs are represented by layers and multicast groups by subdivision of each layer.

Most protection IEDs have Fast Ethernet interfaces, and therefore Ethernet switches need to ensure the traffic passed to the IED does not exceed 100 Mb/s, and ideally would limit the flow of information to the IED to just what is required. An increase in bit rate requires a proportional increase in transmitter power for the bit error rate (BER) to remain the same, and non-linearity in glass fibre optic cable mean there is a limit to the optical power that can be applied [21]. As a result Fast Ethernet has advantages over Gigabit Ethernet for long cable runs in substation switchyards. Fig. 3 shows the application of VLAN and multicast address filtering for a medium sized transmission substation with three diameters of breaker-and-a-half switchgear and seven bays of folded-bus switchgear. A VLAN is allocated for PTPv2 traffic, but no multicast address filtering is used as the addresses are fixed by the standard. Two GOOSE VLANS are assigned: one for high priority type 1A trip messages and one for lower priority type 1B and type 2 messages (message types are defined in section 13.7 of IEC 61850-5 [22]). Multicast address filtering is not shown here as it is unlikely that the number of messages would exceed the processing capability of an IED. If this were to happen the multicast address filters could be used. The final VLAN is used for all SV messages and multicast

address filtering is used to separate bays and diameters. Each MU in a diameter is placed into the same multicast group, as the associated feeder or transformer protection IEDs require samples from multiple sets of CTs. Feeders and transformers connected by single circuit breakers in a bay arrangement each have a multicast group. It is common practice in Australia to give bays that are in line with each other (similar to a diameter, but not connected) the same locational code. Sharing a multicast group simplifies the allocation of addresses. Actual VLAN IDs will be an implementation specific design decision, however consistency across an organisation is recommended. Adoption of multicast filtering means that the allocation of VLAN IDs will be based on the protocol and application, and this is independent of substation topology. The alternative is to have multiple VLANs for the same class of traffic, which complicates changes to prioritisation in data networks and may increase the risk of errors being introduced if configuration is performed by hand. IV. M ULTICAST A DDRESS A LLOCATION A system is proposed here where the reference designators used to identify plant are used to derive destination multicast addresses. This system is based

TABLE I VOLTAGE RELATED OBJECT CLASSES FROM IEC 61346-2. Code

Voltage Range

Code

Voltage Range

B

> 420 kV

H

30 kV .. < 45 kV

C

380 kV .. ≤420 kV

J

20 kV .. < 30 kV

D

220 kV .. < 380 kV

K

10 kV .. < 20 kV

E

110 kV .. < 220 kV

L

6 kV .. < 10 kV

F

60 kV .. < 110 kV

M

1 kV .. < 6 kV

G

45 kV .. < 60 kV

N

< 1 kV

upon IEC 61346/IEC 81346, but other systems that use bay/diameter numbering may be able to be adapted using the concepts described here. A. Reference Designators The IEC 61346 series of standards (now superseded by the IEC 81346 series) describes structured principles for naming objects and is recommended by IEC 61850-6. The structures used can be function oriented, product oriented or location oriented and these determine the initial character of the designator. These structures can be combined, often in the FunctionEquipment form [23]. An example of this is a circuit breaker (-QA1: equipment) in a substation bay (=D1: function), such as =D1-QA. Substation equipment in Queensland is named based on a locally modified version of these conventions (or their predecessors). IEC 61346-2 defines classes of infrastructure objects based upon letter codes, with the first letter defining the class of infrastructure objects. The letter codes between B and N represent voltage levels and are listed in Table I. Bay numbering applied to a simplified single line diagram of a 275/132 kV transmission substation is shown in Fig. 4. 275 kV bays are numbed in the D series and 132 kV bays are numbered in the E series, as per IEC 61346-2. The operating voltages of classes B-E are typically considered transmission, F-H subtransmission and J-N distribution. The range B-E fits well into a hexadecimal numbering scheme and this forms the basis of the proposed multicast addressing system.

B. Multicast Address Allocation The authors’ addressing proposal is for the voltage class code to be the high nibble (half-octet) and the bay number to be the low nibble of the least significant octet. If more than sixteen bays are present at a particular voltage level then the next significant octet can represent the group of sixteen, increasing the multicast addresses for each voltage level. Fig. 5 illustrates how this mapping operates generically and for specific examples of bay designations. If differential protection was used to protect =T1 in Fig. 4 then the relay would require SV data from =D1 and =E3 bays. Multicast filters would be created to enable data addressed to 01:0C:CD:04:00:D1 and

Fig. 4.

Bay numbering for medium sized 275/132 kV substation.

Fig. 5. Mapping of bay level functional designators to multicast addresses for IEC 61850.

01:0C:CD:04:00:E3 to be delivered to the protection IED. It is acknowledged that the multicast ranges recommended by the IEC standards are limited to 00:00 to 01:FF, but increasing this to 02:FF or 03:FF does not contradict the normative sections of the standards. Some vendors may limit GOOSE and SV addressing to 01:FF and so interoperability checks will be required if there are in excess of 31 bays of a particular voltage level (which would be an extremely large substation). C. Subscriber Configuration In the example shown by Figs. 3 and 4 the transformer protection IED for =T1 would subscribe to multicast SV messages with the destination address 01:0C:CD:04:00:D1 and 01:0C:CD:04:00:E3. This would give it access to SV data for CTs adjacent to =D1-QA2, =D1-QA3 and =E3-QA1, all of which are required for the differential current through the

transformer to be measured. SV data from diameters =D2/=D3 and bays =E1/=E2/=E4/=E5/=E6/=E7 are not relevant and will not be sent out of the switch port that the IED is connected to. Capacitor bank protection for =E7 will only need subscribe to SV messages with the destination address 01:0C:CD:04:00:E7. The complexity of the data network configuration for a large substation makes automated management of network switches an attractive option. The Substation Configuration Description (SCD) is an XML file that contains the system description, and in this the IED network interfaces are defined. Automated tools could be developed to extract this information to streamline the VLAN and multicast address filter configuration of Ethernet switches from multiple vendors. Such tools are not required if IEDs implement GMRP or MMRP as these protocols enable IEDs to configure Ethernet switches automatically [6], however there are concerns by some over the effect of connection errors on the data network. It should be noted that at the current time few Ethernet switches manufacturers have implemented GMRP, and support for MMRP is almost non-existent [18]. V. C ONCLUSIONS The need for traffic segregation in a transmission substation process bus is generally accepted, but specific mechanisms for achieving this have not been proposed until now. This proposal uses both VLAN and multicast filtering to separate traffic by application and by groups of interest. A two stage approach simplifies the engineering of a complex substation system and provides consistency between substations by allowing a common VLAN structure to be used across a utility. Multicast filter definitions are site specific, with the addressing used matching the topology of the substation in a clear and straightforward manner. Whether VLAN-only or VLAN/multicast filtering is used will have little impact on the performance of store-and-forward Ethernet switches. Knowledge about the performance of sampled value process buses is limited and it is expected that changes to network parameters will occur as experience is gained. A system that is clearly and consistently implemented will simplify commissioning and ongoing maintenance, and will assist the utility staff that are not data networking specialists but are required to work with this next generation of substation automation systems. R EFERENCES [1] V. Hamidi, K. S. Smith, and R. C. Wilson, “Smart grid technology review within the transmission and distribution sector,” in Proc. Innov. Smart Grid Tech. Conf. Europe 2010 (ISGTE), Gothenburg, Sweden, 11–13 Oct. 2010, pp. 1–8. [2] Fangxing Li, Wei Qiao, Hongbin Sun, Hui Wan, Jianhui Wang, Yan Xia, Zhao Xu, and Pei Zhang, “Smart transmission grid: Vision and framework,” IEEE Trans. Smart Grid, vol. 1, no. 2, pp. 168–177, Sep. 2010. [3] A. P. Apostolov, “IEC 61850 based bus protection – principles and benefits,” in IEEE PES Gen. Meet. 2009, Calgary, Canada, 26–30 Jun. 2009.

[4] D. Chatrefou, “Digital substation; application of process bus,” in Proc. Int. Prot. Test. Symp. 2010 (IPTS), Salzburg, Austria, 14–15 Oct. 2010, pp. 13.1–13.4. [5] M. Zadeh, T. Sidhu, and A. Klimek, “Suitability analysis of practical directional algorithms for use in directional comparison bus protection based on IEC61850 process bus,” IET Gener. Transm. Distrib., vol. 5, no. 2, pp. 199–208, Feb. 2011. [6] R. Moore, R. Midence, and M. Goraj, “Practical experience with IEEE 1588 high precision time synchronization in electrical substation based on IEC 61850 process bus,” in IEEE PES Gen. Meet. 2010, Minneapolis, MN, USA, 25–29 Jul. 2010, pp. 1–4. [7] SMB Smart Grid Strategic Group. (2010, Jun.) Smart grid standardization roadmap. IEC. [Online]. Available: http:// www.iec.ch/smartgrid/downloads/sg3_roadmap.pdf [8] IEC TC57, Communication networks and systems in substations – Part 9-2: Specific communication service mapping (SCSM) – Sampled values over ISO/IEC 8802-3, IEC 618509-2:2004, Apr. 2004. [9] ——, Communication networks and systems in substations – Part 8-1: Specific communication service mapping (SCSM) – Mappings to MMS (ISO 9506-1 and ISO 9506-2) and to ISO/IEC 8802-3, IEC 61850-8-1:2004, May 2004. [10] ——, Communication Networks and Systems in Substations – Part 1: Introduction and Overview, IEC TR 61850-1:2003, Apr. 2003. [11] H. Gremmel, Switchgear Manual, 11th ed. Berlin, Germany: ABB / Cornelsen Verlag Scriptor GmbH & Co. KG, 2006. [Online]. Available: http://www.abb-shb.de/content. asp?lang=en [12] P. T. Eugster, P. A. Felber, R. Guerraoui, and A.-M. Kermarrec, “The many faces of publish/subscribe,” ACM Comput. Surv., vol. 35, no. 2, pp. 114–131, Jun. 2003. [13] IEEE Computer Society, IEEE Standard for Local and Metropolitan Area Networks – Virtual Bridged Local Area Networks, IEEE Std. 802.1Q-2005, 19 May 2006. [14] Q. I. Ali and B. S. Mahmood, “Enhancement of industrial Ethernet performance using multicasting/VLAN techniques,” in Proc. 3rd Int. Conf. Inform. Comm. Tech: Theory to App. (ICTTA), Damascus, Syria, 7–11 Apr. 2008. [15] M. S. Thomas and I. Ali, “Reliable, fast, and deterministic substation communication network architecture and its performance simulation,” IEEE Trans. Power Del., vol. 25, no. 4, pp. 2364–2370, Oct. 2010. [16] L. Thrybom and G. Prytz, “Multicast filtering in industrial Ethernet networks,” in Proc. 8th IEEE Int. Wkshp Fact. Comm. Sys. (WFCS), Nancy, France, 18–21 May 2010, pp. 185–188. [17] UCAIug. (2004, 7 Jul.) Implementation guideline for digital interface to instrument transformers using IEC 61850-9-2 R2-1. UCA International Users Group. Raleigh, NC, USA. [Online]. Available: http://iec61850.ucaiug.org/ Implementation%20Guidelines/DigIF_spec_9-2LE_ R2-1_040707-CB.pdf [18] L. Thrybom and G. Prytz, “QoS in switched industrial Ethernet,” in Proc. 14th IEEE Int. Conf. Emerg. Tech. Factory Autom. (ETFA), Palma de Mallorca, Spain, 22–25 Sep. 2009, pp. 185–188. [19] IEEE Computer Society, IEEE Standard for Local and Metropolitan Area Networks – Virtual Bridged Local Area Networks – Amendment 7: Multiple Registration Protocol, IEEE Std. 802.1ak-2007, 22 Jun. 2007. [20] S. Torres, “MC9S12NE64 Integrated Ethernet Controller,” Freescale Semiconductor, Inc., Application Note AN2692, Sep. 2004. [Online]. Available: http://cache.freescale.com/ files/microcontrollers/doc/app_note/AN2692.pdf [21] A. W. Moore, L. B. James, M. Glick, A. Wonfor, R. G. Plumb, I. H. White, D. McAuley, and R. V. Penty, “Optical network packet error rate due to physical layer coding,” J. Lightw. Technol., vol. 23, no. 10, pp. 3056–3065, Oct. 2005. [22] IEC TC57, Communication Networks and Systems in Substations – Part 5: Communication Requirements for Functions and Device Models, IEC 61850-5:2003, Jul. 2003. [23] R. García García and E. Gelle, “Applying and adapting the IEC 61346 standard to industrial automation applications,” IEEE Trans. Ind. Informat., vol. 2, no. 3, pp. 185–191, Aug. 2006.

CHAPTER 12

System level tests of transformer differential protection using an IEC 61850 process bus The primary function of a protection system in a substation is to protect plant from damage when faults occur. Utilities must ensure that their protection systems, using conventional or process bus connections, will clear faults within the time limits specified in their jurisdictional grid code. The previous chapters in this thesis have assessed the performance of synchronising systems and real-time networks with a ‘bottom up’ approach. This chapter presents the result of testing of the entire protection system from the ‘top down’. Transformer differential protection was used in the system tests as it required multiple sampled value streams that were synchronised to each other. Experiments were conducted to validate accuracy and consistency of the measurement system. This was achieved by measuring protection performance with the Real Time Digital Simulator and an independent system. The performance of process bus protection was compared to traditional protection connections (CT and relay trip contacts) using the same protection relay, quantifying the performance advantage of a digital process bus. Once the measurement system was proven, the impact of high levels of additional sampled value traffic and GOOSE messages on the protection response was assessed. Latency was introduced into the sampled value and GOOSE messages, allowing the correlation between network performance and protection response to be examined. The effect of merging unit synchronisation on differential protection was assessed in two ways using a custom-built time delay generator. The time delay generator introduced a range of fixed errors into the synchronising input of one merging unit. The ‘spill current’ that resulted from the induced synchronising errors was measured, and was followed by a comprehensive ‘mapping’ of the protection restraint characteristic (the trip/no-trip boundary) with a range of synchronising errors. The results presented in this chapter suggest that the IEC 61850-5 synchronising requirements may be unduly onerous. A relaxation of these standards may allow extra flexibility in the design of process bus timing systems.

D.M.E. Ingram, P. Schaub, D.A. Campbell, “System Level Tests of Transformer Differential Protection Using an IEC 61850 Process Bus”, submitted to IEEE Transactions on Power Delivery.

129

Statement of Contribution The authors listed below have certified* that: 1.

they meet the criteria for authorship in that they have participated in the conception, execution, or interpretation, of at least that part of the publication in their field of expertise;

2.

they take public responsibility for their part of the publication, except for the responsible author who accepts overall responsibility for the publication;

3.

there are no other authors of the publication according to these criteria;

4.

potential conflicts of interest have been disclosed to (a) granting bodies, (b) the editor or publisher of journals or other publications, and (c) the head of the responsible academic unit, and

5.

they agree to the use of the publication in the student’s thesis and its publication on the QUT ePrints database consistent with any limitations set by publisher requirements.

In the case of this chapter: Title

System Level Tests of Transformer Differential Protection Using an IEC 61850 Process Bus

Publication

IEEE Transactions on Power Delivery

Status

Submitted for review

Contributor David M. E. Ingram

Statement of contribution* Experimental design, performed experiments, data analysis and drafting the manuscript.

22 February 2013 Duncan A. Campbell

Conception and design of the project, critical revision of the paper.

Pascal Schaub

Conception and design of the project, critical revision of the paper.

Richard R. Taylor

Conception and design of the project, critical revision of the paper.

Principal Supervisor Confirmation I have sighted email or other correspondence from all co-authors confirming their certifying authorship. Prof Duncan A. Campbell

22 February 2013 Signature

SUBMITTED TO IEEE TRANSACTIONS ON POWER DELIVERY

1

System Level Tests of Transformer Differential Protection Using an IEC 61850 Process Bus David M. E. Ingram, Senior Member, IEEE, Pascal Schaub, Richard R. Taylor, Member, IEEE, and Duncan A. Campbell, Member, IEEE

Abstract—The IEC 61850 family of standards for substation communication systems were released in the early 2000s, and include IEC 61850-8-1 and IEC 61850-9-2 that enable Ethernet to be used for process-level connections between transmission substation switchyards and control rooms. This paper presents an investigation of process bus protection performance as the in-service behavior of multi-function process buses is largely unknown. An experimental approach was adopted that used a Real Time Digital Simulator and ‘live’ substation automation devices. The effect of synchronization error and network traffic on transformer differential protection performance was assessed and compared with conventional hard-wired connections. Ethernet was used for all sampled value measurements, circuit breaker tripping, transformer tapchanger position reports and Precision Time Protocol synchronization of sampled value merging units. Testing results showed that the protection relay under investigation operated correctly with process bus traffic approaching 100% network capacity. The protection system was not adversely affected by synchronizing errors significantly larger than standards permit, suggesting these requirements may be overly conservative. This ‘closed loop’ approach using substation automation hardware validated the operation of protection relays under extreme conditions. Digital connections using a single shared network outperformed conventional hard-wired solutions. Index Terms—Ethernet networks, IEC 61850, IEEE 1588, industrial networks, performance evaluation, process bus, protective relaying, smart grid, substation automation

I. I NTRODUCTION IDESPREAD adoption of non-conventional instrument transformers (NCITs), such as optical or capacitive transducers, by electricity utilities and large industrial customers has been limited due to the lack of a standardized interface and multi-vendor interoperability. Low power analogue interfaces, such as IEEE Std C37.92, are being replaced by IEC 61850-9-2 digital interfaces that use Ethernet networks for communication [1]. These “process bus” connections achieve significant cost savings by simplifying

W

This work was supported in part by Powerlink Queensland, Virginia, Queensland 4014, Australia. David Ingram, Richard Taylor and Duncan Campbell are with the School of Electrical Engineering and Computer Science, Queensland University of Technology, Brisbane, Queensland 4000, Australia (email: [email protected]; [email protected]; [email protected]). Pascal Schaub is with QGC Pty Ltd, Brisbane, Queensland 4000, Australia (email: [email protected]).

connections between switchyard and control rooms [2], [3]. The in-service performance when these standards are employed is largely unknown, and the technology is considered to be some years away from maturity [4], however some process bus substations are now in service [5], [6]. Trials are continuing, including a large multi-vendor installation in Mexico with promising results [7]. The performance of IEC 61850-9-2 sampled value protection schemes has been evaluated by a number of researchers, using event based simulation with tools such as OPNET and OMNeT++ [8]–[10], real-time simulation [11], [12], replay of power system simulations [13] and secondary injection protection test sets [14]. Transmission line distance protection [12], [13] and current feeder protection [14] schemes have been used as protection test cases in previous investigations. The performance of Generic Object Oriented Substation Event (GOOSE) messages for circuit breaker trip commands have been studied by a number of researchers [15]–[17], however this work extends this through the use of sampled values, time synchronization and GOOSE on a shared Ethernet network. A scale model process bus protection test bed, based on a Real Time Digital Simulator (RTDS), was used for this research [3]. The process bus incorporated IEC 61850-9-2 sampled values, IEC 61850-8-1 GOOSE [18] and IEEE Std 1588 Precision Time Protocol (PTP) [19]. The peer delay mechanism and messaging rates from the IEEE Std C37.238 PTP Power System Profile [20] were used for time synchronization, which required all Ethernet switches to be capable of transparent clock operation. The RTDS was fitted with ‘GTNET’ IEC 61850 interface cards that published sampled values (referred to as ‘GTNET-SV’ in this paper), and published and subscribed to GOOSE messages (referred to as ‘GTNET-GSE’ in this paper). The RTDS run-time environment includes a comprehensive scripting language that enabled extensive automated protection testing to take place. “Merging units” digitize the output of current transformers (CTs) and voltage transformers (VTs) in substations. The GTNET-SV cards in the RTDS assume this role, with current and voltage signals extracted from the real time power system model [21]. PTP was used to synchronize the GTNET-SV cards using the process bus, with slave clocks generating a one pulse per second (1-PPS) synchronizing signal. All

2

SUBMITTED TO IEEE TRANSACTIONS ON POWER DELIVERY

XCBR SmartvCircuitvBreaker

TCTR

Transformer Protection Relay

PTRC HV Current

Merging Unit

TCTR

TABLE I P ROTECTION CLEARANCE TIMES FOR POWER SYSTEM FAULTS .

CB Tripping

PDIF

Bias & Diff Current Magnitude

Australia

United Kingdom

Clearance Time

≥ 400 kV

400 kV

80 ms

250 kV – 400 kV

275 kV

100 ms

100 kV – 250 kV

132 kV

120 ms

LV Current

Merging Unit Transformer Tap Position

A. Grid Codes Sampledvvalues GOOSE

Fig. 1. Single line diagram of a digital process bus for transformer protection, including the primary plant and protection system.

sampled value devices used the dataset and protection messaging rate (80 samples per power cycle) of the UCAIug Implementation Guideline, which is commonly referred to as “9-2 Light Edition” or “9-2LE” [22]. This research presented in this paper uses transformer differential protection which introduced the need for synchronization between merging units, but was not dependent on a communications path that could influence performance. This test bed enables the performance of Ethernet switches, PTP clocks, merging units and protection relays to be assessed while introducing controlled network traffic and network impairment. Fig. 1 illustrates the power system representation of the test case, with sampled values conveying current measurements. GOOSE was used for circuit breaker tripping, tap changer position reporting and transduced differential current measurements. The authors’ previous research has examined the performance of sampled value process bus networks [23], [24], the interaction between sampled values and GOOSE [25] and the suitability of PTP for sampled value synchronization [26], [27]. This paper “closes the loop” with system-level tests that evaluate the influence of network performance and time synchronization on protection response with commercially available hardware. Section II defines the performance requirements of protection systems, based on IEC 61850 and grid codes from Australia and the United Kingdom (UK). A description of the test methods and network topologies is presented in Section IV. The results of this testing are given in Section IV, along with discussion of the significance in Section V. Conclusions are presented in Section VI. II. P ERFORMANCE R EQUIREMENTS Protection clearance times, taking into account protection response time (fault inception to transmission of a trip command) and circuit breaker operating times, are generally mandated in grid codes to ensure power system security. Communications performance requirements for IEC 61850 based substation automation systems are defined in IEC 61850-5 [28].

Australia’s National Electricity Rules [29] and the UK Grid Code [30] specify the fault clearance times listed in Table I. Australia and the UK operate 50 Hz power systems, and therefore the clearance times range from four to six power frequency cycles. The operating time of high voltage circuit breakers generally range from two power frequency cycles (400 kV and some 275 kV breakers) to three cycles (some 275 kV and most 110/132 kV breakers). As a result, protection relay response times must be less than 40 ms at 400 kV and be less than 60 ms for other operating voltages. B. IEC 61850 Requirements Section 13.7 of IEC 61850-5 specifies the maximum transfer time for various message types [28]. The transfer time is the sum of the processing times at the sender and receiver and the network transmission time. Overall performance classes P2 and P3, defined in [28], apply to transmission substations (with >100 kV operating voltage) and determine the applicable transfer time for each message class. GOOSE messages that “trip” plant (type 1A) and sampled value “raw data messages” (type 4) both have transfer time requirements of 3 ms. The conformance testing requirements in IEC 61850-10 specify that network latency is allocated 20% of the transfer time, with 40% allocated to the communication processing time at both the sender and receiver [31]. This results in an network transfer time limit of 600 µs. Fig. 2 breaks down the clearance time (tclearance ) into four components: sampled value transfer (tsv ), protection (tprot ), GOOSE transfer (tgoose ) and circuit  breaker operation tCBopen . It is tsv and tgoose that must be less than 3 ms to meet the P2 performance standard. tCBopen is specified in Table I, however tprot is generally not specified. The processing time required by merging units tsvpub can be measured directly using Ethernet cards synchronized to the merging unit [23]. tsvnet and tgsenet can be measured using a precision multi-port Ethernet card [25]. The RTDS or protection test set measures tresponse directly by initiating the fault. The processing times related  to the protection relay tsvsub , tprot and tgsepub and GOOSE switching (tgsenet ) can be measured by simultaneously capturing sampled value and GOOSE messages from the two Ethernet switches. The difference in timestamps between the sampled value message and the GOOSE captures is ∆tcapture , and is defined in Eqn. (1). This

D. INGRAM et al.: SYSTEM LEVEL TESTS OF TRANSFORMER DIFFERENTIAL PROTECTION USING AN IEC 61850 PROCESS BUS

3

Fig. 2. Protection timing diagram, decomposing the time required to clear a fault. Fig. 3. Schematic of process bus test bed equipment for transformer differential protection testing.

(2)

III. M ETHOD The transformer differential protection relay used for this testing was an ABB RET670 with sampled value (9-2LE) inputs and conventional analog CT and VT inputs (110 V and 1 A). This allowed a performance comparison between conventional inputs and sampled value inputs to be performed. The protection relay had digital inputs and dry contact outputs, along with IEC 61850-8-1 station bus connectivity. The RTDS had three GTNET cards fitted, two with sampled values capability (which are referred to as GTNET-SV) and one with GOOSE capability (referred to as GTNET-GSE). The RTDS was installed in a separate room to the protection relay and PTP grandmaster clock. Fiber optic cables connected the two locations to simulate the network connections between a switchyard and a substation control room. A Simena NE1000 network emulator created artificial latency between the merging units and the core switch. Sampled value and GOOSE network traffic was generated by an Endace DAG7.5G4 precision Ethernet card [32]. Controlled synchronizing errors were introduced with custom hardware controlled by the RTDS. Fig. 3 shows the equipment in the test bed, however each test used a subset of the equipment. The simulated transformer was a 375 MVA 275/110 kV auto transformer. The protection settings were the factory default settings, and the restraint curve is shown graphically in Fig. 4. Unrestrained operation was set to 10 per unit (p.u.) differential current (ID ). The performance of the RET670 was assessed by simulating a fault in the RTDS and measuring the elapsed time from fault inception to the receipt of a differential protection operation indication via a

3 2

3 n8 tio

c

Se

e8

op Sl

n82

tio Sec pe8 840% o l S =

End8Section82 =83.08p.u.

ID(min)=80.38p.u.8

End8Section818=81.258p.u.

0

tgsesub = tresponse − tsvpub − ∆tcapture

(1)

0%

88 8=

1

∆tcapture = tsvsub + tprot + tgsepub + tgsenet

Differential Protection Restraint Characteristic Differential8Current8(per8unit),8ID

in turn allows tgsesub to be estimated with Eqn (2). The protection processing time, tprot , can be determined by examining fault records downloaded from the protection relay, however the time resolution may be limited by the protection relay under investigation.

0

1

2

3

4

5

6

Bias8Current8(per8unit),8IB

Fig. 4. RET670 three-section restraint curve with factory settings.

GOOSE message or a state change on an RTDS digital input connected to a relay contact on the RET670. The conformance testing guidelines in section 7.2.2 of IEC 61850-10 were followed, with 1000 faults applied and the mean and standard deviation calculated from these [31]. A. Measurement validation The first series of tests validated the measurement system and assessed the variation in response time under ideal network conditions. No artificial delay was introduced into the GTNET synchronizing inputs at this stage. The performance of the RTDS was crosschecked with an OMICRON CMC256-6 protection test set that had sampled value and GOOSE capability. This test injected conventional currents (1 A nominal) to compare sampled value performance to that with conventional CT and VT connections. A conventional relay contact and a GOOSE message were used by the RET670 to indicate to the RTDS or OMICRON that a fault was detected. This gave six test configurations for comparison purposes, as listed in Table II. High fault current (20–25 p.u.) three phase faults on the high voltage (HV) terminals of the transformer and medium fault current (3–4 p.u.) line to ground faults on the low voltage (LV) transformer terminals were used to test unrestrained and restrained operation of

4

SUBMITTED TO IEEE TRANSACTIONS ON POWER DELIVERY

TABLE II L IST OF MEASUREMENT CONFIGURATIONS . Source

Relay Input

Tripping

RTDS GTNET

Sampled values

GOOSE

RTDS GTNET

Sampled values

Relay

CMC256-6 Test Set

Sampled values

GOOSE

CMC256-6 Test Set

Sampled values

Relay

CMC256-6 Test Set

Conventional 1 A

GOOSE

CMC256-6 Test Set

Conventional 1 A

Relay

the relay. 1) Protection Function Response: The response of the transformer differential protection element in the RET670 (T3WPDIF) was assessed by applying 100 unrestrained and 100 restrained faults. The protection response time was recorded by the RTDS for comparison purposes. After each set of 100 faults was complete the disturbance records were downloaded from the RET670 in COMTRADE format [33]. The elapsed time was calculated from the first non-zero voltage to when the protection operate signal (T3WPDIF.ST.Op) was asserted. 2) GOOSE Subscription Timing: The Endace DAG7.5G4 is a four-port card that incorporates hardware based time-stamping of received frames, with time-stamp errors of less than 10 ns [34]. The DAG card was configured to simultaneously capture traffic from switch N (process bus) and switch E (station bus), which are shown in Fig. 3. 100 faults were applied while the capture took place. Both sampled value sources were configured to transmit a zero voltage value until the fault was applied (which did not affect the transformer differential protection). This was used by the analysis program as a time reference. The other time reference was the first GOOSE message with the repeat counter (sqNum field) set to 0 and the trip status (PDIF.ST.Op) set to true. A custom script written for the Wireshark network analysis tool [35] processed the captured data and calculated ∆tcapture for the 100 faults. Restrained and unrestrained faults were applied to provide variation in overall protection response times for the RTDS and the OMICRON CMC256-6. B. Network Loading and Impairment The results of the measurement validation tests, presented in Section IV-A, showed that high fault currents that resulted in unrestrained trips gave the least variation in response time. Three phase faults on the high-voltage side of the transformer were used for the network loading and network impairment tests. 1) Sampled Value Network Load: Artificial sampled value traffic was generated to load the process bus to near capacity. Previous research has shown that a 100 Mb/s network can support 20 merging units publishing 4000 frames per second (a 50 Hz power

system) [24]. Three sets of synthetic sampled value traffic were created: 1) A unique source address and a unique multicast destination address for each “stream”. 2) A unique source address and the same multicast destination address used by the RTDS. 3) The same source address and multicast destination address used by the RTDS. The three addresses were used to determine how the RET670 filtered sampled value traffic. The DAG card transmitted the background traffic continuously while the RTDS applied the faults to the protection relay. This presents a maximum network load of 20 merging units (two “real” GTNET-SV streams and 18 “synthetic” background streams). 2) Station Bus Network Load: GOOSE traffic was injected into the Station Bus to assess whether GOOSE subscriptions by the protection relay would slow protection response. The RTDS published a GOOSE message with the transformer tap position, and asserted a signal when a fault was applied. The RET670 subscribed to this message to enable transformer tap compensation to be applied to the differential protection function. The ability of the protection relay to filter GOOSE messages was tested by varying the multicast destination address, GOOSE application ID, source address and GOOSE dataset name in the background traffic. The simulated GOOSE messages had the same dataset contents as the messages published by the RTDS, and were transmitted at 1000, 2000, 5000 and 10 000 messages per second. This was the equivalent of 2.1–21 Mb/s of traffic. 3) Network Impairment: The Simena NE1000 network emulator was used to introduce latency into sampled value and GOOSE messages. This examined how network latency affected protection response. Latency was selectively introduced to the sampled value messages from GTNET-SV #1, and then to GOOSE messages, by placing the emulator in the link between switch K and switch N. The impaired protocol was determined by an Ethertype filter (88BA16 for sampled values and 88B816 for GOOSE) in the NE1000. The network connection from GTNET-SV #2 to the process bus root switch (link L to N) was not impaired. A separate network path for PTP traffic was required as the emulator did not support the PTP peer delay mechanism that was used (as required by the IEEE Std C37.238 PTP Power System Profile). The Multiple Spanning Tree Protocol (MSTP) was used to enable separate paths for each VLAN, using the technique described in [25]. PTP and control traffic used the unimpaired link between switches K and N, while sampled value and GOOSE traffic passed through the network impairment generator, as shown in Fig. 3. The NE1000 had a 1 ms resolution for latency, and the following latencies were applied: • Sampled values from GTNET-SV #1: 2 ms, 5 ms, 8 ms and 10 ms. • GOOSE from the RET670: 5 ms, 10 ms, 15 ms and 20 ms.

D. INGRAM et al.: SYSTEM LEVEL TESTS OF TRANSFORMER DIFFERENTIAL PROTECTION USING AN IEC 61850 PROCESS BUS

5

The “wireline” mode where the emulator passes frames without any impairment was used as the reference for sampled value and GOOSE testing. 1000 unrestrained faults were applied with each latency and the protection response time recorded. C. Sampled Value Synchronizing Accuracy The effect of errors in the 1-PPS signal used to synchronize the sampling of GTNET-SV merging units was evaluated by introducing controlled delays into the 1-PPS input of one GTNET-SV card. The desired delay was controlled by the RTDS. The time delays were verified with a digital oscilloscope (Tektronix DPO2014). The mean error, with 1000 samples at each delay, was 65 ns and the standard deviation was 0.2 ns for delays ranging from 2–1000 µs. Two sets of tests were conducted. The first was to evaluate the impact of delay on the differential current, ID , reported by the RET670 when there was no fault. Any synchronizing error manifested as a phase error in the merging unit output, which in turn resulted in “spill current” (erroneous differential current) in the differential calculation. The second series of tests involved “walking” the restraint characteristic (shown in Fig. 4) with a range of synchronizing errors. Spill current from synchronizing error changed the point at which the relay tripped. The characteristic was mapped by applying bias (IB ) currents in 0.2 p.u. steps from 0.5–5.0 p.u., and differential currents (ID ) from 0.8 p.u. below the expected curve to 0.4 p.u. above the curve, in 0.02 p.u. steps. This resulted in 3589 faults being applied for each of the following fixed delays: 0 µs, 4 µs, 10 µs, 100 µs, 500 µs and 1000 µs. IV. R ESULTS The majority of tests were conducted with 1000 faults applied, as per the requirements of IEC 61850-10. “Box and whisker plots” have been used to show the statistical distribution of multiple measurements in a compact form. Outlying results are significant for protection systems, and these are not captured by mean and standard deviation. The “box” represents the Inter-Quartile Range (IQR), which is the 25th to 75th percentile, and the bar is the median value of all observations. The “whiskers” extend to the minimum and maximum values, provided these are within two times the IQR from the upper or lower limits of the box. Any points beyond this are outliers, and are shown as hollow circles. A. Measurement System Validation Fig. 5(a) shows the protection response time for three phase faults on the HV side of the transformer, which resulted in a fault current of 24 p.u. (approximately 19 kA). Fig. 5(b) is the corresponding LV phase to ground fault response time, with fault currents of approximately 3.5 p.u. (7 kA). The response time of the differential function in the RET670 (tprot ) to 100 restrained and 100 unrestrained

Fig. 5. Comparison of protection response times for the RTDS and OMICRON CMC256-6 with (a) HV three phase faults and (b) LV phase to ground faults.

Fig. 6. Comparison of tsvsub + tprot for restrained (LV phase to ground) and unrestrained (HV three phase) faults, based on protection relay disturbance records.

faults is shown in Fig. 6, along with the corresponding overall protection response times measured by the RTDS. The mean response for restrained faults was 25.1 ms and for restrained faults was 11.9 ms. The variation in the unrestrained response was half that of the restrained response, with a standard deviation of 0.71 ms. These results show that the variation in response measured by the RTDS is mostly due to response variation in the time required for the differential protection function to detect the fault. Second harmonic blocking, which avoids tripping due to transformer in-rush current, was the dominant restraint signal. The responses show that the response times cluster into two groups: GOOSE fault indication and relay contact fault indication. GOOSE tripping was, on average, 3.4 ms faster for the RTDS and 3.9 ms faster for the OMICRON CMC256-6. HV faults were selected for network and synchronizing tests due to the reduced variability. The similarity of RTDS and OMICRON response times for HV faults gives confidence that the measurement system is accurate. GOOSE tripping was used for the remaining tests, as this replicated the functionality of a smart circuit breaker using a process bus for trip signaling. A tsvpub of 110 µs for the RTDS with GTNET-SV cards was used, based on the results in [23]. It was not possible to synchronize the OMICRON with the DAG card for these tests, and therefore the GOOSE subscription and sampled value publishing time cannot

6

SUBMITTED TO IEEE TRANSACTIONS ON POWER DELIVERY

Fig. 7. Comparison of tgsesub GOOSE subscription times for the RTDS and OMICRON with two types of applied faults. *OMICRON results are the sum of tgsesub and tsvpub .

Fig. 9. Protection performance with varying background sampled value traffic levels with (a) different multicast addresses and (b) the same multicast address as the RTDS. TABLE III R ESPONSE TIME INCREASE DUE TO LATENCY. Sampled Values Fig. 8. Protection performance with varying background sampled value traffic levels with (a) different multicast addresses and (b) the same multicast address as the RTDS.

be separated. Eqn. (2) was used to generate the results in Fig. 7. These results show that the RTDS and OMICRON introduce less than 0.5 ms of variation into the protection response time, and therefore these devices are suitable for detecting subtle changes in protection response. B. Artificial Network Load Fig. 8(a) shows that the relay operates correctly with 20 merging units sharing the network, with no adverse effects when different multicast destination addresses are used. Fig. 8(b) shows that if the same multicast destination address is used response time starts to degrade at 14 merging units (two desired and 12 background), and is unacceptable at 19 merging units in total. The response with the source address set to that of the RTDS was the same as Fig. 8(b), which suggests that only the multicast destination address is used for filtering. Background station bus traffic with additional GOOSE messages gave similar results, and are shown in Fig. 9. Once the multicast destination was set to the same as any subscribed GOOSE message the background traffic had some influence at very high (>2000 messages/sec). The worst case was Fig. 9(d) where the outgoing RTDS GOOSE message was blocked and the synthetic data set to replicate the RTDS. A bit was toggled on each transmission to elicit a response from the protection relay. This increased the response time,

GOOSE

Latency

∆response time

2 ms

1.4 ms

5 ms

5.0 ms

5 ms

4.4 ms

10 ms

10.3 ms

Latency

∆response time

8 ms

7.4 ms

15 ms

15.0 ms

10 ms

9.4 ms

20 ms

19.4 ms

with the mean response increasing by 0.7 ms, and the maximum response increasing by 3.9 ms. The protection relay raised a “denial of service” (DOS) warning at 5000 messages per second, and a DOS alarm at 10 000 messages per second. When the DOS alarm was active the communications interface throttled traffic to preserve the protection functions of the relay. This may explain the improvement in response when GOOSE traffic increased from 5000 to 10 000 messages per second in Fig. 9(d). C. Network Contingencies The effect of fixed network latency introduced by the NE1000 network emulator into the sampled value and GOOSE network are illustrated by Fig. 10(a) and Fig. 10(b). The measured increase in response time for each latency setting is listed in Table III. Sampled value traffic was not delayed beyond 10 ms as this resulted in the protection relay raising a sampled value failure alarm and blocking protection functions. Delays introduced to GOOSE traffic did not affect the operation of the protection relay, but did delay the response measured by the RTDS. This verifies that there is a linear relationship between network latency and protection performance.

D. INGRAM et al.: SYSTEM LEVEL TESTS OF TRANSFORMER DIFFERENTIAL PROTECTION USING AN IEC 61850 PROCESS BUS

Fig. 10. Protection performance with fixed latencies introduced into (a) sampled value traffic and (b) GOOSE traffic by the network emulator. TABLE IV S PILL CURRENT AND SYNCHRONIZING ERROR COMPARISON .

7

vs. ID restraint characteristic of the RET670. This converted the error factors (slopes) to absolute differential currents. Fig. 11 shows four restraint curves, with synchronizing errors of 0 µs, 100 µs, 500 µs and 1000 µs applied to the LV merging unit (GTNET-SV #2). The black points are where the relay issued a trip command, and the hollow grey points shown that no trip was issued. The line is the restraint characteristic set in the protection relay. It can be seen in Fig. 11(a) and Fig. 11(b) that the trip/no-trip boundary matches the restraint curve, while in Fig. 11(c) and Fig. 11(d) the relay is tripping at lower ID values than desired. It must be noted that a synchronizing error of 1000 µs is a deliberately extreme case and correct operation of the relay was not expected. V. D ISCUSSION

Error

Predicted

Intercept

Slope

R2

0 µs

0

0.0005

0.00196

1.000

4 µs

0.0013

0.0005

0.00196

0.9999

10 µs

0.0031

0.0005

0.00196

1.000

100 µs

0.0314

0.00004

0.0314

1.000

1000 µs

0.313

0.0001

0.312

0.9999

A. Measurement Consistency

D. Synchronizing Errors Merging unit synchronization is of particular importance for differential protection, and therefore the effect of synchronizing error on the bias and differential currents calculated by the protection relay was assessed. Eqn. 3 gives the expression for spill current factor, based on the synchronizing error ∆t and the sine of differences. The small angle approximation allows a linear relationship to be used for spill current and synchronizing error when the synchronzing error is less than 14° (648 µs in a 60 Hz power system), giving a 1% error in the estimation. Ispill = − sin (−2πf ∆t) ≈ 2πf ∆t

(3)

A 5% (0.05 p.u.) error in restraint operation is a benchmark used by some utilities, and will result from a synchronizing error of 132 µs in a 60 Hz power system or 159 µs in a 50 Hz power system. The differential current measured by the RET670 was recorded against the bias current for a range of fixed delays applied to the 1-PPS input of one merging unit. The small synchronizing errors (100 µs and less) overlap, which suggests that there is a minimum time error that can be resolved. Linear regression models were fitted to the measurements and compared to predicted spill currents, and are presented in Table IV. This confirm that there is a linear relationship between synchronizing error and spill current. The curve intercepts were less than 0.006 in all cases. The effect of synchronizing error on the differential restraint characteristic of the relay was then assessed by applying a series of faults that “mapped” the IB

The protection performance with sampled values over Ethernet was very similar to that with traditional 1 A secondary cabling when tested with the OMICRON test set. The sampled value response was, on average, 0.4 ms slower than the CT response, which agrees with the 1 ms difference other researchers have measured with a different make and model of protection relay [36]. There was however a significant improvement in tripping performance with GOOSE messaging compared to relay contacts. The relay “chatter” of the RET670’s output contact lasted 700 µs and the default de-bounce time for the OMICRON was 3 ms. Additional benefits of GOOSE indications are the richer set of data to be transmitted, including timestamps and quality attributes, and the self-monitoring nature of the data connections. The RTDS was originally configured to subscribe to nine digital GOOSE signals and eight analog GOOSE signals. This resulted in increased variability in GOOSE subscription times (of up to 4 ms) and an increase in the average response time. The GTNET-GSE specification for latency (with version 4.3 firmware) is 500 µs plus 50 µs per subscription. If multiple GOOSE subscriptions are required on the RTDS, it is recommended by the RTDS manufacturer that GOOSE subscriptions are shared between all available GTNETGSE cards to reduce latency. A single subscription was used on the RTDS and on the OMICRON test set to minimize variability during the protection performance test, and this allowed small changes in response time to be observed. Estimates for the various times shown in Fig. 2 are presented in Table V. tresponse is the sum of the parameters above it in the table, and tclearance is the sum of tresponse and tCBopen . B. Network Loading The effect of background traffic on protection response was shown in Fig. 8 (sampled values) and Fig. 9 (GOOSE) to be dependent on the multicast destination address of the background traffic. This

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SUBMITTED TO IEEE TRANSACTIONS ON POWER DELIVERY

Fig. 11. Differential protection restraint curves with (a) no synchronizing error, (b) 100 µs error, (c) 500 µs error and (d) 1000 µs error. ‘Ibias’ is the bias current and ‘Idiff’ is the differential current, with both expressed as per unit (p.u.) quantities.

TABLE V S UMMARY OF PROCESS BUS TIMING FOR RESTRAINED FAULTS . Parameter

Value

tsvpub (RTDS)

130 µs

tsvnet

13 µs

tsvsub + tprot

27 ms

tgsepub

619 µs

tgsenet

38 µs

tgsesub (RTDS)

800 µs

tresponse

28.6 ms

tCBopen

60 ms

tclearance

87 ms

reinforces the need to design a system where multicast destination addresses are allocated to minimize the traffic transmitted to a protection relay. The RET670 was robust, accepting high levels of network traffic before performance degraded, however this cannot be assumed of other protection relays. The tests presented in this paper are a means of verifying this capability. Network loads that resulted in sampled value messages

being dropped were not tested, however it has been shown that traffic that exceeds the process bus capacity significantly increases the mean time to trip [12]. Detailed network design should by undertaken to avoid overload conditions by managing the traffic flow on all Ethernet connections. The results in the previous section demonstrate that the protection response of a transformer protection relay subscribing to sampled values and publishing trip indications over GOOSE meets the requirements of Australian and UK grid codes. The worst case response time increased by 1.6 ms with additional sampled value traffic. This, combined with the slowest LV restrained trip of 31.7 ms, is still less than the 40 ms time required at 400 kV with two cycle circuit breakers, or at 275 kV with three cycle circuit breakers. Artificial latency introduced by the network emulated confirmed that network latency has a linear effect on protection performance. Precision capture of network traffic and differential timing, such as that described in [24], is therefore a good technique to predict how a data network will influence the performance of the overall protection system.

D. INGRAM et al.: SYSTEM LEVEL TESTS OF TRANSFORMER DIFFERENTIAL PROTECTION USING AN IEC 61850 PROCESS BUS

C. Synchronizing Accuracy The synchronizing accuracy requirement for sampled value data in transmission substations (protection classes P2 and P3) is 4 µs according to class T4 of IEC 61850-5 [28]. The restraint curve characterization tests with deliberate synchronizing error presented in Section IV-D show that the restraint curve with 100 µs of error is very similar to that with no introduced error, and was also the case with 4 µs and 10 µs delays. The power system reference values stated for class T4 in IEC 61850-5 are that 4 µs relates to 4 minutes of angle at 50 Hz, 5 minutes of angle at 60 Hz and 1.2 km of distance (time of flight) when locating faults. The 9-2LE sampling rate is 4000 Hz (50 Hz power) or 4800 Hz (60 Hz power), and introduces significantly more error into fault location, as 250 µs (the sampling rate for a 50 Hz power system) equates to 75 km. Consideration should be made to relaxing the instrument transformer synchronizing requirements on the basis of sampling rate. In the tests conducted for this paper, a 100 µs error in the synchronization of one merging unit sampling at 250 µs did not affect the restraint characteristic. Power quality monitoring using the 256 samples per cycle option of 9-2LE (78 µs sampling rate with a 50 Hz fundamental) would require greater precision, however 40 µs rather than 4 µs may suffice. VI. C ONCLUSIONS Network level testing, such as that described in [24] and [25], verifies that the underpinning Ethernet network can manage the traffic. Similarly, tests of PTP synchronization can predict the quality of the synchronizing signal supplied to a merging unit. System tests, incorporating hardware-in-the-loop, provide evidence of the performance of the overall protection system and whether the requirements are met. Testing of the entire protection system, such as that presented in this paper, is a means of validating the operation of protection relays under extreme conditions, and is a means of determining the limits of operation. This paper has described test methods to identify the source of variability in protection performance, and to quantify the contribution each component in a sampled value protection system toward the overall response time. Real-time networks and precision timing provide the underlying foundation for a process bus, and the research presented here will provide confidence to organizations considering adopting the technology that it can meet their requirements. The acceptance of process bus protection will enabled new technology, such as NCITs, to be adopted. ACKNOWLEDGMENTS The authors would like to thank B. Capstaff, K. Hadley and A. Kenwrick from Powerlink Queensland for their assistance with power system protection policies and practices. Furthermore the authors would like to thank ABB, Belden Solutions, Cisco Systems, Meinberg Funkuhren and Schneider Electric for their contribution of hardware for the process bus test bed.

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R EFERENCES [1] IEC TC57, Communication networks and systems for power utility automation – Part 9-2: Specific communication service mapping (SCSM) – Sampled values over ISO/IEC 8802-3, IEC 61850-9-2 ed2.0, Sep. 2011. [2] D. McGinn, M. G. Adamiak, M. Goraj, and J. Cardenas, “Reducing conventional copper signaling in high voltage substations with IEC 61850 process bus system,” Bucharest, Romania, 28 Jun. – 2 Jul. 2009, pp. 1–8. [3] D. M. E. Ingram, D. A. Campbell, P. Schaub, and G. Ledwich, “Test and evaluation system for multi-protocol sampled value protection schemes,” Trondheim, Norway, 19–23 Jun. 2011, pp. 1–7. [4] K. Cooney and K. Lynch, “Developing a roadmap for introduction of IEC61850 based solutions for HV substations in the Republic of Ireland,” no. B3-105, Paris, France, 27-31 Aug. 2012, pp. 1–7. [5] R. Moore and M. Goraj, “New paradigm of smart transmission substation - practical experience with Ethernet based fiber optic switchyard at 500 kilovolts,” Manchester, UK, 5–7 Dec. 2011, pp. 1–5. [6] P. Schaub, A. Kenwrick, and D. Ingram, “Australia leads with process bus,” vol. 64, no. 5, pp. 24–32, May 2012. [Online]. Available: http:// tdworld.com/go-grid-optimization/transmission/ powerlink-queensland-process-bus-050112/ [7] J. Bautista Flores, V. R. Garcia-Colon, C. G. Meléndez Román, E. Robles Ramírez, and J. P. Rasgado Casique, “First multivendor 400 kV transmission line protection scheme using an IEC 61850-9-2 digital network for optical CTs and protection relays,” no. B3-111, Paris, France, 27-31 Aug. 2012, pp. 1–7. [8] M. S. Thomas and I. Ali, “Reliable, fast, and deterministic substation communication network architecture and its performance simulation,” IEEE Trans. Power Del., vol. 25, no. 4, pp. 2364–2370, Oct. 2010. [9] M. G. Kanabar and T. S. Sidhu, “Performance of IEC 618509-2 process bus and corrective measure for digital relaying,” IEEE Trans. Power Del., vol. 26, no. 2, pp. 725–735, Apr. 2011. [10] P. Ferrari, A. Flammini, S. Rinaldi, and G. Prytz, “Mixing real time Ethernet traffic on the IEC 61850 process bus,” Lemgo, Germany, 21–24 May 2012, pp. 153–156. [11] R. Kuffel, D. Ouellette, and P. Forsyth, “Real time simulation and testing using IEC 61850,” Wroclaw, Poland, 20–22 Sep. 2010, pp. 1–8. [Online]. Available: http://ieeexplore.ieee.org/xpl/ articleDetails.jsp?arnumber=6007199 [12] X. Sun, M. A. Redfern, P. A. Crossley, L. Yang, H. Y. Li, U. B. Anombem, A. Wen, R. Chatfield, and J. Wright, “Design and operation of the IEC61850 9-2 process bus used for the protection system,” Birmingham, UK, 23–26 Apr. 2012, pp. 1–6. [13] M. G. Kanabar, T. S. Sidhu, and M. R. D. Zadeh, “Laboratory investigation of IEC 61850-9-2-based busbar and distance relaying with corrective measure for sampled value loss/delay,” IEEE Trans. Power Del., vol. 26, no. 4, pp. 2587–2595, Oct. 2011. [14] P. Crossley, L. Yang, A. Wen, R. Chatfield, M. Redfern, and X. Sun, “Design and performance evaluation for a protection system utilising IEC 61850-9-2 process bus,” vol. 1, Beijing, China, 16–20 Oct. 2011, pp. 534–538. [15] J. Mo, J. C. Tan, P. A. Crossley, Z. Q. Bo, and A. Klimek, “Evaluation of process bus reliability,” Manchester, UK, 29 Mar. – 1 Apr. 2010, pp. 1–5. [16] T. Sidhu, M. Kanabar, and P. Parikh, “Configuration and performance testing of IEC 61850 GOOSE,” vol. 2, Beijing, China, 16–20 Oct. 2011, pp. 1384–1389. [17] F. Steinhauser, “Measuring the performance of GOOSE communication,” Sydney, Australia, 10–11 Mar. 2011, pp. 1–9. [18] IEC TC57, Communication networks and systems for power utility automation – Part 8-1: Specific communication service mapping (SCSM) – Mappings to MMS (ISO 9506-1 and ISO 9506-2) and to ISO/IEC 8802-3, IEC 61850-8-1 ed2.0, Jun. 2011. [19] IEEE Instrumentation & Measurement Society, IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, IEEE Std. 1588-2008, 24 Jul. 2008.

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[20] IEEE Power & Energy Society, IEEE Standard Profile for Use of IEEE 1588 Precision Time Protocol in Power System Applications, IEEE Std. C37.238-2011, 14 Jul. 2011. [21] M. Desjardine, P. Forsyth, and R. Mackiewicz, “Real time simulation testing using IEC 61850,” Lyon, France, 4–7 Jun. 2007, pp. 1–5. [Online]. Available: http://www.ipst.org/techpapers/2007/ipst_ 2007/papers_IPST2007/Session26/177.pdf [22] UCAIug. (2004, 7 Jul.) Implementation guideline for digital interface to instrument transformers using IEC 61850-9-2 R2-1. UCA International Users Group. Raleigh, NC, USA. [Online]. Available: http://iec61850.ucaiug.org/ Implementation%20Guidelines/DigIF_spec_9-2LE_ R2-1_040707-CB.pdf [23] D. M. E. Ingram, F. Steinhauser, C. Marinescu, R. R. Taylor, P. Schaub, and D. A. Campbell, “Direct evaluation of IEC 61850-9-2 process bus network performance,” vol. 3, no. 4, pp. 1853–1854, Dec. 2012. [24] D. M. E. Ingram, P. Schaub, R. R. Taylor, and D. A. Campbell, “Performance analysis of IEC 61850 sampled value process bus networks,” IEEE Trans. Ind. Informat., vol. PP, pp. 1–9, 2012. [25] ——, “Network interactions and performance of a multifunction IEC 61850 process bus,” IEEE Trans. Ind. Electron., vol. PP, pp. 1–10, 2012. [26] D. M. E. Ingram, P. Schaub, and D. A. Campbell, “Use of precision time protocol to synchronize sampled value process buses,” IEEE Trans. Instrum. Meas., vol. 61, no. 5, pp. 1173– 1180, May 2012. [27] D. M. E. Ingram, P. Schaub, D. A. Campbell, and R. R. Taylor, “Performance analysis of PTP components for IEC 61850 process bus applications,” IEEE Trans. Instrum. Meas., vol. 62, no. 4, pp. 710–719, Apr. 2013. [28] IEC TC57, Communication Networks and Systems in Substations – Part 5: Communication Requirements for Functions and Device Models, IEC 61850-5:2003, Jul. 2003. [29] AEMC. (2013, 1 Jan.) National Electricity Rules (version 54). Australian Energy Market Commission. Sydney, NSW, Australia. [Online]. Available: http://www.aemc.gov.au/Electricity/ National-Electricity-Rules/Current-Rules.html [30] NGET. (2013, 31 Jan.) The Grid Code (issue 5 revision 2). National Grid Electricity Transmission plc. London, UK. [Online]. Available: http://www.nationalgrid.com/uk/ Electricity/Codes/gridcode/gridcodedocs/ [31] IEC TC57, Communication Networks and Systems in Substations – Part 10: Conformance testing, IEC 61850-10:2005, May 2005. [32] Endace. (2012) Endace DAG 100 percent packet capture. Endace Limited. Auckland, New Zealand. [Online]. Available: http://www.endace.com/ endace-dag-high-speed-packet-capture-cards.html [33] IEEE Power Engineering Society, IEEE Standard Common Format for Transient Data Exchange (COMTRADE) for Power Systems, IEEE Std. C37.111-1999, 18 Mar. 1999. [34] J. Micheel, S. Donnelly, and I. Graham, “Precision timestamping of network packets,” San Francisco, CA, USA, 1–2 Nov. 2001, pp. 273–277. [35] G. Combs. (2012) Wireshark network protocol analyser. [Online]. Available: http://www.wireshark.org/ [36] L. Yang, P. A. Crossley, A. Wen, R. Chatfield, and J. Wright, “Performance assessment of a IEC 61850-9-2 based protection scheme for a transmission substation,” Manchester, UK, 5–7 Dec. 2011, pp. 1–5.

SUBMITTED TO IEEE TRANSACTIONS ON POWER DELIVERY

David Ingram (S’94 M’97 SM’10) received the B.E. (with honours) and M.E. degrees in electrical and electronic engineering from the University of Canterbury, Christchurch, New Zealand, in 1996 and 1998, respectively. He is currently working toward the Ph.D. degree at the Queensland University of Technology, Brisbane, Australia, with research interests in substation automation and control. He has previous experience in the Queensland electricity supply industry in transmission, distribution, and generation. Mr. Ingram is a Chartered Member of Engineers Australia and is a Registered Professional Engineer of Queensland.

Pascal Schaub received the B.Sc. degree in computer science from the Technical University Brugg-Windisch, Windisch, Switzerland, (now the University of Applied Sciences and Arts Northwestern Switzerland) in 1995. He was with Powerlink Queensland as Principal Consultant Power System Automation, developing IEC61850 based substation automation systems. He is currently the Principal Process Control Engineer at QGC, a member of the BG Group. He is a member of Standards Australia working group EL-050 “Power System Control and Communications” and a member of the international working group IEC/TC57 WG10 “Power System IED Communication and Associated Data Models”.

Duncan Campbell (M’84) received the B.Sc. degree (with honours) in electronics, physics, and mathematics and the Ph.D. degree from La Trobe University, Melbourne, Australia. He has collaborated with a number of universities around the world, including Massachusetts Institute of Technology, and Telecom-Bretagne, Brest, France. He is currently a Professor with the School of Electrical Engineering and Computer Science, Queensland University of Technology, Brisbane, Australia, where he is also the Director of the Australian Research Centre for Aerospace Automation (ARCAA). His research areas of interest are robotics and automation, embedded systems, computational intelligence, intelligent control, and decision support. Prof. Campbell is the Immediate Past President of the Australasian Association for Engineering Education and was the IEEE Queensland Section Chapter Chair of the Control Systems/Robotics and Automation Society Joint Chapter (2008/2009).

Richard Taylor (M’08) received the B.E. (with honours) and M.E. degrees in electrical and electronic engineering from the University of Canterbury, Christchurch, New Zealand, in 1977 and 1979, respectively, and the Ph.D. degree from the University of Queensland, Brisbane, Australia in 2007. He is the former Chief Technical Officer of Mesaplexx Pty Ltd and currently holds a fractional appointment as an Adjunct Professor in the School of Electrical Engineering and Computer Science at the Queensland University of Technology. He started his career as a telecommunications engineer in the power industry in New Zealand. In the past 25 years he has established two engineering businesses in Queensland, developing innovative telecommunications products.

CHAPTER 13

Conclusions The primary aim of this research was to gain a greater understanding of and characterise how the various components and subsystems in a digital substation automation system (SAS) interact. This was achieved through the creation of a novel system-level test bed and vendorindependent test methods that quantified the performance of Ethernet-based substation automation equipment. These test procedures encompass precision timing, real-time networking and power system protection performance assessment, and are a research outcome in their own right. The electricity industry is moving away from utilities designing and constructing their own substations. The ‘turnkey’ (engineer-procure-construct) model for substation construction is seen as a lower risk option by utilities that may not have the necessary in-house expertise, especially when substations are based upon standards such as IEC 61850. This creates a knowledge imbalance between the supplier and customer, which is a concern if the utility is responsible for the ongoing maintenance of the substation. Many manufacturers of substation automation products and systems have extensive industrial automation experience, and it is this experience that utilities generally lack. Conversely, utilities have significant experience operating and maintaining their networks and have incorporated this knowledge into their substation designs. Utilities need to have sufficient knowledge of how process bus protection systems operate if they are to maintain them and provide ongoing assurances to regulators and owners that their substations meet jurisdictional grid code obligations. This research is targeted towards utilities and independent system integrators working on behalf of utilities. Understanding and characterising process bus behaviour will result in informed decision making by utilities and large industrial customers. An experimental methodology was used to develop component-level tests from the ‘bottom up’ and system-level tests from the ‘top down’. The ‘bottom up’ test methods decomposed the subsystem being evaluated into component devices, testing each in turn. This is necessary to understand how these components each contribute to the performance of the subsystem and ultimately the performance of the overall protection system. The experimental approach addresses the issue of unknown factors, which is a weakness of pure simulation methodologies. Cost is a concern for a hardware test bed and this resulted in a hybrid approach being selected, with synthetic traffic used to assess the performance of network devices. This test traffic was synthesised on the basis of observations made at the

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only live process bus substation outside of China, ensuring the test bed was as realistic as possible. The objectives of this work were to assist end-users with the design and validation of a SAS through the development of test methods that were applicable to a wide range of designs. This was achieved through the creation of test tools that were not tied to any one particular manufacturers vendor and that reused equipment where possible to minimise costs. Utilities and universities are unlikely to justify the purchase of expensive task-specific test equipment with the amount of testing likely to be performed. The measurement equipment selected for this test bed trades price for convenience, with the cost less than one tenth that of commercial offerings. Once a utility understands how a multi-function process bus operates in a range of conditions, including how it responds under adverse conditions, they are better placed to make an informed decision on the use of the technology. The results presented in the previous chapters of this thesis demonstrate that process bus networks can meet the needs of utilities; however care must be taken when designing a SAS to ensure that the final system will meet their needs. Selecting products on the basis of manufacturers’ brochures without independent verification of performance presents a risk. The concerns held by utilities regarding the maturity of IEC 61850 in general and process buses in particular have merit, given the performance of some products examined using this process bus test bed. It is not sufficient to test under ideal conditions, as some products did fail during this research when placed in unusual circumstances. It should be emphasised that it is not the maturity of the standards that are in question, but rather it is the maturity of implementations that are of concern. No sampled value protection relays have been assessed against IEC 61850-9-2 at the time of writing (DNV KEMA, 2013). A utility cannot select products on the basis of conformance tests if no manufacturers have had their products assessed. The test procedures presented in this thesis address this need for testing from a functional perspective. The performance of a product—how well it does the task it is intended for—is the metric of interest in these assessments. Ideally conformance testing and performance testing are used in concert. The conformance test identifies products that meet the minimum specification of the relevant standards, and the performance test quantifies function performance of these preselected devices. Performance testing accounts for factors that are outside the scope of IEC 61850 standards yet are of significance to the end user, such as protection response time.

13.1

Research findings and implications

This thesis presents a number of findings and novel contributions. These findings, contributions and their implications are summarised with respect to the guiding research questions presented in Chapter 1.

13.1 Research findings and implications

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How do the devices used in a network-based timing system contribute to error, and how do these devices affect protection performance? The characteristics of servo loops in Precision Time Protocol (PTP) slave clocks are not defined in IEEE Std 1588, which presents a problem when corrections to the internal time clock in a grandmaster occur. Such corrections were hypothesised in previously published work (Schriegel et al., 2010), and the experimental results presented in Chapter 5 showed that these events do occur as a result of GPS antenna shading. The synchronising errors that result in the output of slave clocks are transient, and will only be noticed if continuous monitoring of the outputs is undertaken. Self-reporting of clock quality by grandmaster clocks was shown to work well in Chapter 7, and is critical for the successful operation of redundancy systems such as the Best Master Clock Algorithm. The hand-over between grandmaster clocks was found to be much faster than was widely accepted, and shows that long held assumptions are not always valid after major revisions to standards, as occurred with PTPv2 in 2008. Not all of the PTP clocks assessed with the test bed self-reported accurately, which is a non-conformance with the PTP standard. Implementing redundancy in a timing system with standards-compliant grandmaster clocks is straightforward, and proposed modifications to IEEE Std 1588 that use Virtual LAN switching for hot stand-by are unlikely to be required (Kozakai & Kanda, 2010). The quality of local oscillators used in grandmaster clocks have more effect on time system performance than the quality of local oscillators in slave clocks. Analytical work by Scheiterer et al. (2009) predicted this to be the case, and this is the published work that confirms the predictions of the error model experimentally. Highly stable oscillators in grandmaster clocks also mitigate the effect of primary time source outages (such as GPS) by reducing the size of the correction step. Using a satellite system as the primary time reference does expose a substation to external influences. A stable oscillator in the grandmaster clocks is an effective method of managing the risk, regardless of the reason for the outage. Do the protocols used to implement a shared process-level network interact with each other, and can the performance requirements specified by grid codes and international standards be met? Transparent clocks, mandated by the PTP Power System Profile, mitigate the effect of high volume multicast network traffic, such as IEC 61850-9-2 sampled values. This mitigation requires that the switch residence time of PTP is estimated correctly; otherwise the transparent clock will have a detrimental effect on synchronising performance. This was demonstrated experimentally in the research presented in Chapter 6. The test methods presented in this thesis use relatively low cost equipment and allow independent system integrators, utilities and researchers to undertake detailed assessments that were previously only performed by manufacturers of substation automation equipment. Latency testing of full-duplex switched Ethernet networks with an Ethernet tap and multiport Ethernet card with hardware time-stamping showed no interaction between sampled value measurements and Generic Object Oriented Substation Event (GOOSE) fault indication

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messages. Both classes of message had hard real-time requirements that were satisfied in this process bus test bed. The absence of interaction allows a single Ethernet network to be used for sensors (merging units) and actuators (circuit breakers), reducing the cost of substation construction and refurbishment. This single network reduces the design complexity and ongoing maintenance, giving long-lasting benefits. Sampled value networks can accommodate very high loads (near 95% of network capacity) without dropping frames. As frames are not lost, sophisticated algorithms that compensate for such losses are unlikely to be required (Kanabar et al., 2011). Can the components of an advanced digital substation automation system be tested in isolation to predict performance in the completed system? The three principal protocols used in a process bus (sampled values, GOOSE and PTP) do not interact, and this provides evidence that a multifunction process bus is feasible and can meet utilities’ performance requirements. This was confirmed through protection testing with the whole system. Selecting components based on their stand-alone performance tests resulted in a protection system that met the required specification, which was the fault clearance times specified in Australia’s National Electricity Rules. The experimental results presented in Chapters 5 and 6 demonstrate that commercially available PTP clocks can meet the 1 μs synchronising accuracy requirement of the industryaccepted 9-2LE guideline; however, 1 μs is more onerous than need be when PTP is used instead of one pulse per second (1-PPS) or IRIG-B to distribute time in a substation. The 9-2LE guideline allows for up to 2 μs of propagation delay (which would result from approximately 400 m of fibre optic cable) for a 1-PPS signal to ensure the 4 μs requirement for P2 transmission substations in IEC 61850-5 is met. This is not necessary when the PTP Power Profile is used, as path delays are automatically compensated for by the peer delay mechanism. In addition, 4 μs may be excessive in its own right. Chapter 12 demonstrated that introducing artificial delays of 100 μs into one side of a transformer differential protection system did not adversely affect protection performance. Such a sampling error results in a phase error too small to be significant in differential calculations, and relaxation of the time synchronising limits may be warranted. Testing subsystems in isolation allows people with particular skill-sets to focus on their areas of expertise, and enables testing of a complex system to occur in parallel. This does require well-defined interface specifications, however these are provided by the various parts of IEC 61850. The design of IEC 61850 embodies a systems engineering approach and therefore a systems approach can be taken with respect to testing, which is a new paradigm for the electricity industry. Taking the time to identify requirements, allocate functions and minimise the number of interfaces will enhance the effectiveness of the test methodology presented in this thesis.

13.2 Significance of findings

13.2

145

Significance of findings

The test methods described in this thesis can be used by system integrators, utilities, researchers and others to quantify the performance of the networking, timing, and protection equipment used to implement process bus substation automation systems. Conformance with international standards defines the minimum acceptable performance; however, this information alone cannot be used to assess the relative merits of candidate products. The methods presented here can be applied to select the most suitable equipment for the specified application, whether this is to achieve the best value for money or to achieve the best possible performance. The empirical findings serve two purposes. The first is a demonstration of the test methods, giving other researchers and engineers the benefit of a worked example. Secondly, the results can be used by utilities considering process bus automation that do not have access to a test bed to develop their technology strategies. This work presents the first scale-model testing with real-time power system simulation that incorporates sampled values, PTP and GOOSE for Ethernet-only connections between a simulated switchyard and actual protection equipment. It was demonstrated that protection using process bus communication is feasible, and meets grid code requirements when implemented with commercially available products. Through the use of controlled stress testing it was found that process bus operation is robust, even with network traffic conditions far beyond what would be experienced in an active substation. The results of this research were provided to manufacturers of equipment in the test bed when product flaws or opportunities for improvement were discovered, and this was used in the ongoing development of their products. Findings from this research were provided to IEC Technical Committee 57 (responsible for development of the IEC 61850 series of standards) Working Group 10 (WG10) through Australia’s representative on the working group. This provided an ‘end-user’ perspective during the development of IEC 61850-90-4 (Network Engineering Guidelines) and review of the draft IEC 61850-9-2 edition 2 and IEC 61869-9 sampled value process bus standards. This work lead to an invitation by the IEEE Power System Relaying Committee Working Group H7/Sub C7 to participate in the development of IEEE Std C37.238 (PTP Power System Profile). Research results relating to the behaviour of PTP transparent clocks and the operation of the Best Master Clock Algorithm were made available to the working group. The utility perspective and potential use cases were contributions to three conference papers prepared by the working group. Personal references from the IEC and IEEE working group chairs are provided in Appendix C.

13.3

Limitations of the current study

The process bus test bed created in the course of this research modelled a single bay of a transmission substation. This limits the scope of the study and therefore the conclusions that can be drawn.

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The sole source of sampled values in the test bed was the RTDS GTNET card, which generated sampled value messages digitally based on a power system simulation. This does not model the effect of analogue sampling error that would be present with a stand-alone merging unit (SAMU), but did take into account the effect of synchronising error. The use of a digital source replicates the secondary converters used for optical CTs, and does reduce the sources of variation during the process bus performance investigation. An OMICRON CMC256-6 secondary injection test set was used to successfully validate the RTDS-based measurement system. Protection performance tests were undertaken using a single protection relay that was selected for its dual-mode inputs (conventional and sampled values) and differential protection function. This provided a reasonable test system to evaluate the effect of network loading and synchronising error on protection performance. The dual-mode capability of the relay enabled comparison testing between sampled values and conventional current transformer inputs to take place, which was not possible with other manufacturers’ protection relays. The limited availability of products is a significant disadvantage of a hardware test bed, especially in a rapidly developing field such as substation automation. Researchers are reliant upon equipment being available on a prototype or commercial basis, which is not an issue for investigations using simulation models. While the availability of protection relays was a limitation, this test bed did incorporate Ethernet switches and PTP clocks from three manufacturers.

13.4

Suggestions for future work

This research has identified a number areas where further study is warranted. These areas investigate technology and practices that the adoption of process bus networks will facilitate and address the limitations identified in Section 13.3. The transient response of Non-Conventional Instrument Transformers (NCITs), for which no standards have yet been released, is a concern for transformer differential protection and other applications where signals from more than one merging unit are compared. This concern arises as the response of two or more transducers are compared—any differences in transient response will manifest as spill current if the fault current is large. This will increasingly become an issue as NCITs are adopted and used in conjunction with conventional current transformers that experience saturation. Conformance testing of NCITs against a standard transient response will be required, and the test bed could be extended to do this. Substation refurbishment (‘brownfield’ development) presents a significant opportunity for utilities to adopt process buses without committing to the installation of NCITs. Incorporating SAMUs and requisite power amplifiers into the process bus test bed will enable the performance of established protection schemes to be compared to process bus protection. It is much better to resolve interoperability issues in a test facility than in a live substation. Incorporating an expanded range of protection relays, including transmission line distance and current differential protection, will enable process bus behaviour to be assessed for all

13.5 Recommendations for practice and policy

147

common transmission protection schemes. Each make and model of protection relay will deal with difficult network conditions differently (e.g. dropped frames, high traffic rates and additional latency), and therefore a multi-vendor test bed will enable these differences to be determined. This will in turn aid product selection by system integrators. Expanding the types of devices capable of subscribing to sampled value messages should be undertaken as these products becomes available. Potential subscribers include revenue (energy) meters, phasor monitoring units and process bus supervisory systems. Energy metering will introduce additional data authenticity requirements, and therefore research into the performance and operation of the IEC 62351 series of cybersecurity technical specifications is required. IEC 62351-6 deals specifically with authentication and signing of GOOSE and sampled value messages (IEC TC57, 2007). As substation automation systems are expected to remain in service for 15–20 years, long term testing and accelerated ageing are needed to determine whether process bus synchronising systems (PTP slave clocks in particular) can deal with the environmental rigours of a substation and maintain the required accuracy. The capability of the RTDS can be extended with a full model of a substation bay that includes isolators, earth switches, changeover relays for voltage transformers and so forth. This will enable research into the operation of more complicated system behaviour such as electronic interlocking and circuit breaker fail protection to take place. The RTDS could also form the basis of Automatic Test Equipment to perform exhaustive testing of substation automation. Multiple agents and test equipment could be coordinated to comprehensively test a substation automation system in a rapid and repeatable manner. Generating Ethernet frames requires much lower cost equipment than the secondary injection test sets required for conventional relay testing. The paradigm can change from testing devices to testing systems when process bus connections are used. The characterisation and understanding of process bus network behaviour can be used to refine simulation models, both for networks (event-based simulation) and timing systems (control system models). Simulation is a cost-effective means of evaluating network performance for a whole substation, where it would not be practical for researchers (or most utilities) to build an equivalent hardware test bed. Converging the results of hardware testing and simulation modelling will be of particular interest to researchers in this field.

13.5

Recommendations for practice and policy

The research presented in this thesis has shown that multifunction process buses based on IEC 61850 and IEEE Std 1588 are surprisingly resilient, provided network traffic is maintained under capacity limits. Utilities should be mapping out how they will implement process buses in their substations. The move to digital networks has clear advantages, but the skill set required is quite different to conventional substation automation, requiring significant review and revision to commissioning and maintenance work practices. Systems engineering tools, used with success in the aerospace and defence industries, are recommended to manage

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the increasing complexity of digital substation automation. A SAS will become less tangible as data networks interconnect various devices, and this requires function requirements and interfaces between subsystems to be clearly defined. IEC 61850 is based on a holistic object model, and systems engineering techniques will maximise the potential of this family of standards. The successful operation of this particular test bed does not guarantee that all process bus products will meet performance requirements. Independent certification is needed for PTP, and the IEEE Conformity Assessment Program (ICAP) has extended its Precision Time Protocol programme to include the C37.238 Power System Profile (IEEE Standards Association, 2012). Manufacturers need to support ICAP and submit their product for testing to provide confidence that their products meet the minimum requirements of IEEE Std 1588 and IEEE Std C37.238. Significant improvements to performance, efficiency and cost have been achieved inside substation control rooms through the adoption of digital technology over the past 30 years. It is now time for similar improvements to be achieved in high voltage switchyards. Once NCITs and interoperable digital process buses become the norm, substations of the future will be safer and reduce the risk of environmental harm. New work practices will be enabled by the digital transfer of information, and this in turn will help lower the cost of designing, constructing and operating high voltage substations while improving performance and capability. Standards working groups tend to be dominated by manufacturers, as there is a commercial imperative to influence the development of international standards. Greater participation is required by utilities and research institutions. Utilities (and large industrial consumers) are the end-users of substation automation systems, yet have little influence in the general direction standards take with regard to long-term maintenance and refurbishment. Research institutions provide an independent perspective that can moderate commercial interests. There is a need for long-term research and short-term technical investigations while standards are being developed and ideas are coalescing. This research presented in this thesis shows that substation automation using process bus networks can meet the needs of electricity transmission utilities. The test methods and application examples provide evidence that a process bus protection system meets performance requirements—and in many cases the performance exceeds that of conventional systems.

APPENDIX A

Supporting conference paper This conference paper provides details of substation topology and network outage transient responses that are referred to in Chapter 5.

©2011 IEEE. Reprinted, with permission, from D.M.E. Ingram, P. Schaub & D.A. Campbell, “Use of IEEE 1588-2008 for a sampled value process bus in transmission substations”, 2011 IEEE Instrumentation and Measurement Technology Conference (I2MTC), Hangzhou, China, May 2011. doi:10.1109/IMTC.2011.5944081.

149

Use of IEEE 1588–2008 for a Sampled Value Process Bus in Transmission Substations David M. E. Ingram, Duncan A. Campbell

Pascal Schaub

School of Engineering Systems Queensland University of Technology Brisbane, QLD 4000, Australia email: [email protected]

Powerlink Queensland Virginia, QLD 4014, Australia

Abstract—IEC Technical Committee 57 (TC57) published a series of standards and technical reports for “Communication networks and systems for power utility automation” as the IEC 61850 series. Sampled value (SV) process buses allow for the removal of potentially lethal voltages and damaging currents inside substation control rooms and marshalling kiosks, reduce the amount of cabling required in substations, and facilitate the adoption of non-conventional instrument transformers. IEC 61850-9-2 provides an inter-operable solution to support multi-vendor process bus solutions. A time synchronisation system is required for a SV process bus, however the details are not defined in IEC 61850-9-2. IEEE Std 1588-2008, Precision Time Protocol version 2 (PTPv2), provides the greatest accuracy of network based time transfer systems, with timing errors of less than 100 ns achievable. PTPv2 is proposed by the IEC Smart Grid Strategy Group to synchronise IEC 61850 based substation automation systems. IEC 61850-9-2, PTPv2 and Ethernet are three complementary protocols that together define the future of sampled value digital process connections in substations. The suitability of PTPv2 for use with SV is evaluated, with preliminary results indicating that steady state performance is acceptable (jitter < 300 ns), and that extremely stable grandmaster oscillators are required to ensure SV timing requirements are met when recovering from loss of external synchronisation (such as GPS). Index Terms—ethernet networks, IEC 61850, IEEE 1588, performance evaluation, power system simulation, power transmission, protective relaying, smart grids, time measurement

I. I NTRODUCTION The objective of the IEC 61850 series of substation automation (SA) standards is to provide a communication standard that meets existing needs, while supporting future developments as technology improves. IEC 61850 communication profiles are based, where possible, on existing international standards. SA functions are decomposed into ‘logical nodes’ (LNs) that describe the functions and interfaces that are required, and are described in [1]. The smart transmission grid will use a digital platform for substation automation, with measurements having accurate time stamps [2]. IEC 61850-9-2 details how high speed sampled values (SV) shall be transmitted over an Ethernet network [3]. IEC 61850-8-1 defines how transduced analogue values and digital statuses can be transmitted over an Ethernet network using Generic Object Oriented Substation Events

HVEConductor CT/VTESecondary TimeESyncEb1PPSF Trip/Close/Monitor Ethernet

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Fig. 1. Schematic of a breaker-and-a-half (1½ CB) transmission substation bay.

(GOOSE) and Manufacturing Messaging Specification (MMS, ISO 9506) [4]. The most stringent of the GOOSE timing requirements is 100 µs and for SV is 1 µs, and therefore SV sets the requirements for time synchronisation. Fig. 1 shows a diameter of a ‘breaker and a half’ transmission substation that is typically used at voltage levels of 220 kV and above in Australia. The primary plant (transmission lines, circuit breakers, instrument transformers and power transformers) is connected to the secondary systems through ‘process level’ connections. A digital process bus provides the process connections in a digital form, rather than as instantaneous analogue values (typically 1 A and 110 V secondary signals) or relay switched battery voltage (125 VDC for example). SV replaces CT and VT cabling through the use of merging units (MUs) that digitise instantaneous analogue signals, and are based around the ‘TVTR’ and ‘TCTR’ LNs for VTs and CTs respectively. Intelligent Electronic Devices (IEDs), such as smart circuit breakers and protection relays, that implement GOOSE use Ethernet in place of 4–20 mA loops and digital I/O cabling. In an attempt to reduce the complexity and variability of implementing SV complying with [3], an implementation guideline was developed in 2004 that is commonly termed ‘9-2 Light Edition’ or ‘9-2LE’ [5]. This guideline specifies the data sets that are transmitted, sampling rates, time synchronisation requirements

II. U SE OF PTP V 2 FOR S AMPLED VALUE T IME S YNCHRONISATION It is expected that most master clocks in substations will be synchronised to International Atomic Time (TAI) via the GPS constellation, as GPS is an excellent tool for time transfer [12]. A time clock providing PTPv2 grandmaster functions may also be a source of IRIG-B and 1PPS signals for legacy devices within substation protection and control buildings. Outdoor transmission-level substations (typically 110 kV and above) cover a large area of land and cable lengths are significant. IRIG-B can be distributed over copper or fibre optic cables, but rarely has the accuracy required for SV synchronisation. 1PPS distributed over fibre optic cable is recommended by the 9-2LE guideline, but this does not contain absolute

350 m

33 kV Switchyard 110 kV Switchyard

320 m

and physical interfaces, but does not specify the transient response of devices. The IEC 61869 series of standards are being developed by IEC TC38 to address this. MUs throughout a substation must accurately time stamp each sample to allow protection IEDs to use SV data from several MUs (through the use of time alignment of samples in buffer memory). 9-2LE specifies an optical 1 pulse per second (1PPS) timing signal with ±1 µs accuracy for this purpose. IEEE Std 1588-2008, version 2 of the Precision Time Protocol (PTPv2) [6], significantly improves time synchronising performance, making this a viable option for synchronising SV merging units [7]. PTPv2 is recommend in the IEC Smart Grid Roadmap as a method of high accuracy time synchronisation [8]. The same network infrastructure can then be used for SV, GOOSE and for time synchronisation. This is of great benefit when MUs are located throughout a substation, adjacent to the primary plant they are connected to. Synchronising with 1PPS signals over fibre optic cable is straightforward when merging units are located in substation control rooms (as done by many suppliers of non conventional instrument transformers), but distributed MUs would require a separate fibre optic network throughout the substation just for 1PPS, and this is avoided with PTPv2. Recently published work has described the first of many process bus substations in China using PTPv2 for time synchronisation of an IEC 61850-9-2 process bus [9]. A test and evaluation system based on IEC 61850-9-2, PTPv2 and a real time digital simulator (RTDS) is being constructed using ‘live’ equipment to assess SV protection schemes against the requirements of Australia’s National Electricity Rules (NER). This system will provide information on how the competing demands for Ethernet between SV, GOOSE, MMS and PTPv2 can be met. The work in this paper extends that of De Dominicis et al. [10] by focusing on the SV process bus application and by looking at the effect of outages in the timing system. The PTPv2 testbed described in [11] did not examine grandmaster holdover and recovery from loss of GPS synchronisation, but is investigated by this paper.

275 kV Switchyard Control Building Circuit Breaker Bus Bar Capacitor Bank Transformer

Fig. 2. Arrangement of an urban transmission substation in Brisbane (Queensland, Australia) with three voltage levels. Feeder and transformer connections are not shown.

time information which will be required by the data security techniques proposed in IEC TS 62351-6 to prevent ‘replay’ attacks. 1PPS systems do not automatically compensate for propagation delay. Fig. 2 shows an urban transmission substation arrangement. The longest cable distance from the control building to an instrument transformer at this site is approximately 420 m, and cable runs of 300–400 m are not uncommon in transmission substations. This would result in propagation delays in excess of 2 µs. Some substation arrangements include multiple buildings with protection and control equipment, but there is usually a central communication building where the master time reference is located. PTPv2 provides a means of distributing time across a substation that compensates for propagation delay. Applications for PTPv2 in power systems extend beyond SV and also includes synchronisation of measurements for synchrophasors, which are a critical component of Wide Area Monitoring Systems (WAMS). A. Generation of 1PPS Signal by a PTPv2 Time Slave PTPv2 slave clocks that can generate a 1PPS signal are available from many suppliers. Merging units can use this 1PPS signal as if it was generated from a GPS or IRIG-B receiver, but will not experience the propagation delays inherent in these systems. 9-2LE requires merging units to compensate for propagation delay if this exceeds 2 µs and this is supported by several manufacturers, but this is not an issue for locally generated 1PPS signals. Native support of PTPv2 is desirable as most of the extra data available with PTPv2 is lost with 1PPS, including accuracy information, absolute time and date (which could be incorporated into SV or synchrophasor messages) and details of the clock source. An IED that has internal support for PTPv2 can make use of PTP messages sent more often than once per second, and this may reduce the effect of clock error during recovery from outages (discussed in later sections). An IED relying on a slave clock’s 1PPS output cannot update its internal clock faster than once per second,

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Fig. 4. Oscilloscope capture for pulse delay measurement. C1 is the reference (grandmaster), C3 is PTP slave clock and C4 is a reference GPS. The time scale is 1 µs per division.

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(b) Jitter extremity detail. Fig. 5. Jitter observed between 1PPS outputs of a grandmaster and slave, using peer-peer path delay and one-step operation.

B. Testing Substation protection, metering and control functions must meet strict the requirements of the NER, and this extends to any communications and timing systems that they rely upon. Tests have been performed with commercially available PTPv2 clocks to determine whether PTPv2 is a viable source of 1PPS timing signals. These tests examined steady-state and dynamic performance of ordinary clocks when recovering from contingencies. Fig. 3 illustrates the equipment used to measure the jitter and wander of 1PPS outputs from a slave clock directly connected to a grandmaster, which is the best case scenario. The GPS reference clock provided a pulse synchronised to TAI at all times and allowed the wander of the grandmaster to be measured when its GPS antenna was disconnected. This technique is similar to that described in [13]. Automatic pulse delay measurements were made with a digital oscilloscope sampling at either 500 ps (one or two channels) or 1 ns (three or four channels) between samples. The standard record length was 200 000 samples per channel, giving a pulse delay measuring range of ±100 µs when three or four channels were in use. The oscilloscope was computer controlled, with a standard configuration sent to the oscilloscope at the start of each test. Fig. 4 is a sample of the 1PPS waveforms captured by the oscilloscope, with infinite persistence to show the jitter on screen. Pulse delay measurements in each direction were transferred to the PC after each 1PPS pulse for further statistical analysis.

III. R ESULTS Jitter and wander were the two performance indicators considered, with jitter being of most interest with the system intact, while wander was of more importance during contingency events. A. Steady State Performance PTPv2 provides flexibility in how the synchronisation system will operate and a key parameter is synchronisation message rate. The results presented here show that less frequent synchronising messages resulted in less jitter. Fig. 5 shows the 1PPS jitter density observed over one hour intervals with sync message rates ranging from once every two seconds through to sixteen times per second. In each case the grandmaster and slave were directly connected to each other with a cross-over Ethernet cable to remove any influence from other network traffic. Peer-peer delay requests and grandmaster announcements were set to 2 s intervals and one-step operation was used. Scheiterer et al. [14] suggested that less frequent updates allow a slave clock to better estimate its rate correction factor (RCF) used for its local oscillator compensation and this would improve performance when clock aging was not an issue. The best performance was found to be with synchronising message sent every one or two seconds, which is contrary to results given in [11]. [11] used slave clocks with high performance TXCO local oscillators, whereas the slave clocks in this study used low cost crystal oscillators

Slave Power−up Acquisition

PTP Slave Wander 500 0

Wander (ns)

−1000

Drift 3 Drift 4

Minimum offset 5 = 22.7 µs

10

15

0

10

20

Time (minutes)

B. Power On Performance Slave clocks vary significantly in their ability to synchronise to a grandmaster when first powered on. Slaves from two different manufacturers were connected to the same grandmaster (which incorporated a transparent clock) and were powered up at the same time. Fig. 6 shows the 1 PPS output from each slave, relative to the grandmaster. The slave clock from Vendor A required 35 s to synchronise and its 1 PPS output was within the 9-2LE specification (±1 µs) immediately. Vendor B’s slave clock required 10 min to stabilise, although it was within the ±1 µs specification at 5 min and exhibited less jitter overall (albeit with an offset). This has ramifications for substation operation after maintenance, especially since Vendor B’s slave clock enabled its 1PPS output when the offset exceeded 20 µs. MU samples would be skewed if these slaves were providing the sampling reference, and may result in deterioration of protection performance (especially for differential protection). C. Loss of Network between Grandmaster and Slave The effect on time synchronisation when a slave clock lost its connection to the grandmaster was investigated. This may occur due to network cabling faults or a failure of the grandmaster. The Best Master Clock algorithm is intended to deal with loss or degradation of a grandmaster, but does not deal with a network failure at a slave [6]. The slave and grandmaster were synchronised with one PTP message per second and then the network cable between the two was disconnected. The slave was configured to keep generating its 1PPS output using its internal oscillator by using a long holdover time.

50

60

Slave Recovery From 25 µs

−2

Drift (µs)

−5

0

0

5

Slave Recovery From 6 µs

Drift (µs)

−25

(XO) without compensation. An XO local oscillator may naturally deviate further from its nominal frequency, and so improved RCF estimation through less frequent updates may outweigh the noise reduction a faster update rate would provide. Jitter was less than ±300 ns, and for much of the time was less than ±200 ns. This meets the requirements of 9-2LE, and future work will determine whether this achievable with a larger timing network and in the presence of SV network traffic (up to 5.4 Mbit/s per MU).

40

Fig. 7. Wander between PTPv2 grandmaster and slave when the network connection was broken.

−4

Power up performance for slave clock from two vendors.

−6

Fig. 6.

30 Time (seconds)

−15

3000 1000 0

Drift 1 Drift 2

−500

Vendor A Slave Vendor B Slave

−1000

Jitter (ns)

5000

1PPS Output

0

10

20

30 Time (s)

40

50

60

0

10

20

30

40

50

60

Time (s)

Fig. 8. Slave clock reacquiring synchronisation with the grandmaster after reinstatement of PTP connection, from a wander of 6 µs (left panel) and 25 µs (right panel), showing the recovery characteristic is identical.

Fig. 7 shows wander can vary in sign and magnitude. The slope varied between 10 ns/s and 20 ns/s, giving approximately 35 s of operation before the ±1 µs limit of 9-2LE was reached (based on an initial worst case jitter of 300 ns). This is useful information when setting appropriate holdover times. Two instances of the a slave clock recovering from a loss of PTP connection are shown in Fig. 8. In the first instance the wander between the slave and grandmaster was 6 µs and in the second instance was increased to 25 µs. The transient response of the recoveries are the same shape, suggesting that the servo in the slave clock has a linear response. Oscillations in the observed jitter take approximately 10 s to decay. The internal oscillators in the grandmaster and slave clocks used for this experiment are low-cost crystal oscillators. Use of temperature controlled oscillators (TXCO) or oven controlled oscillators (OCXO) would improve performance, but at increased expense. 10 ns/s was the worst case wander for slaves with TXCO local oscillators [11], however [14] concluded that a costly master has a much larger benefit compared to spreading the same expense across the slave clocks (which would be numerous in a transmission substation). D. Loss of Grandmaster GPS Synchronisation A clear view of the sky is required for optimum GPS reception as the satellites move in low earth orbit. There are times where building shading that reduces the viewable area of the sky may result in a GPS receiver losing synchronisation to TAI. The internal

TAI Recovery – 964 ns step 1 Sync Msg/sec 1500 1000 500

Jitter (ns)

Satellites Used

Vendor A Slave Vendor B Slave GM deviation from TAI

−1000 −500

0

−10000

3

6

−5000

9

0

Jitter (ns)

5000

Slave Jitter Satellites Used

0

10000

PTP Response to Loss of GPS Lock

0

100

200

300

400

0

20

40

Time (s)

60

80

100

120

Time (seconds)

(a) Fig. 9. Slave clock jitter when grandmaster reacquires GPS lock after an outage.

IV. C ONCLUSIONS PTPv2 has been demonstrated to be a viable method of providing time synchronisation for a sampled value process bus using IEC 61850-9-2, in particular 9-2LE. Propagation delays are compensated for by PTPv2, providing benefits over IRIG-B and 1PPS systems in transmission substations with long cable. This may allow the synchronising pulse specification of 9-2LE to be relaxed to ±2 µs, which in turn would reduce

500 1000 0 −500 −1500

Jitter (ns)

Vendor A Slave Vendor B Slave GM deviation from TAI

0

20

40

60

80

100

120

Time (seconds)

(b) TAI Recovery – 1919 ns step 1 Sync Msg/sec

TAI Recovery – 3890 ns step 1 Sync Msg/sec 4000 −2000

0

Jitter (ns)

1000 0 −1000

Jitter (ns)

Vendor A Slave GM deviation from TAI

2000

2000

Vendor A Slave GM deviation from TAI

−4000

−2000

oscillator will wander from TAI, with the wander rate dependent on its stability [14]. Loss of lock between the grandmaster and the GPS system was identified as a problem during this investigation when the 1 PPS output of the slave clock exhibited large jumps for no apparent reason. Data logging from the GPS receiver showed that the jumps occurred when the GPS receiver reacquired lock, as illustrated in Fig. 9. This effect was recreated by disconnecting the GPS antenna on the grandmaster and observing the wander between its 1PPS output and that of a reference GPS. The wander was allowed to reach 1 µs, 2 µs and 4 µs before the antenna was reconnected. Fig. 10 shows the behaviour of the slave when the grandmaster recovers synchronisation with TAI after a wander of 1 µs with two PTP message rates, as well as recovery from 2 µs and 4 µs wanders with one PTP message per second. The step and oscillation in synchronism are not acceptable for a SV based protection system and this must be addressed, and the difference in response between vendors is a major concern. One solution to this problem is to use a highly stable internal oscillator in the grandmaster, such as an OCXO or rubidium cell, to reduce the wander from TAI when synchronisation with the GPS system is lost. These typically have four (OCXO) or six (Rb) orders of magnitude better stability than uncompensated crystal oscillators [15]. There are typically one or two master clocks in a substation and so the additional expense of an extremely stable oscillator in the PTPv2 grandmaster is manageable, and further supports the conclusion in [14] regarding investment in the master clock rather than the slaves.

TAI Recovery – 1127 ns step 8 Sync Msg/sec

0

10

20

30

40

50

60

0

Time (seconds)

10

20

30

40

50

60

Time (seconds)

(c) Fig. 10. Slave clock jitter after (a) 1 µs TAI recovery, with one PTP message per second, (b) 1 µs TAI recovery, with eight PTP messages per second, (c) 2 µs and 4 µs TAI recovery with 1 PTP message per second.

the cost and complexity of implementing PTPv2. The best case timing jitter with directly connected lowcost PTPv2 clocks presented here is ±300 ns, and future work will assess whether this is achieved in the presence of SV network traffic and with larger timing networks incorporating several transparent clocks. Uncompensated oscillators do exhibit significant wander when their discipline source is removed. The slave clock has less overshoot when correcting for a wander between the grandmaster and slave (approxi-

mately 15% overshoot) than when the grandmaster experiences a time correction and propagates this through PTP (approximately 100% overshoot). The wander from TAI experienced by a grandmaster when GPS synchronisation is lost is a significant concern, and while such wander cannot be eliminated, minimisation through the use of grandmasters with extremely stable internal oscillators is recommended. The design of slave clocks plays an important part in the performance of a PTP system. The design of the servo-loop in the clock recovery function is a compromise between smoothing out variation in packet arrival times (low frequency) and noise (high frequency), and also affects start-up time [16]. A digital process bus is an important building block for the transmission smart grid as it enables interoperable use of digitised primary voltages and currents, transduced signals and digital I/O. IEEE Std 1588-2008 will facilitate the adoption of this technology, and more work is required to understand, and then standardise, its behaviour before it can be widely and routinely implemented in transmission substations. R EFERENCES [1] IEC TC57, Communication Networks and Systems for power utility automation – Part 7-4: Basic information and communications structure – Compatible logical node classes and data object classes, IEC 61850-7-4 ed2.0, Mar. 2010. [2] Fangxing Li, Wei Qiao, Hongbin Sun, Hui Wan, Jianhui Wang, Yan Xia, Zhao Xu, and Pei Zhang, “Smart transmission grid: Vision and framework,” vol. 1, no. 2, pp. 168–177, Sep. 2010. [3] IEC TC57, Communication networks and systems in substations – Part 9-2: Specific communication service mapping (SCSM) – Sampled values over ISO/IEC 8802-3, IEC 618509-2:2004, Apr. 2004. [4] ——, Communication networks and systems in substations – Part 8-1: Specific communication service mapping (SCSM) – Mappings to MMS (ISO 9506-1 and ISO 9506-2) and to ISO/IEC 8802-3, IEC 61850-8-1:2004, May 2004.

[5] UCAIug. (2004, 7 Jul.) Implementation guideline for digital interface to instrument transformers using IEC 61850-9-2 R2-1. UCA International Users Group. Raleigh, NC, USA. [Online]. Available: http://iec61850.ucaiug.org/ Implementation%20Guidelines/DigIF_spec_9-2LE_ R2-1_040707-CB.pdf [6] IEEE Instrumentation & Measurement Society, IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, IEEE Std. 1588-2008, 24 Jul. 2008. [7] J. Han and D.-K. Jeong, “A practical implementation of IEEE 1588-2008 transparent clock for distributed measurement and control systems,” IEEE Trans. Instrum. Meas., vol. 59, no. 2, pp. 433–439, Feb. 2010. [8] SMB Smart Grid Strategic Group. (2010, Jun.) Smart grid standardization roadmap. IEC. [Online]. Available: http:// www.iec.ch/smartgrid/downloads/sg3_roadmap.pdf [9] J. McGhee and M. Goraj, “Smart high voltage substation based on IEC 61850 process bus and IEEE 1588 time synchronization,” Gaithersburg, MD, USA, 4–6 Oct. 2010, pp. 489–494. [10] C. M. De Dominicis, P. Ferrari, A. Flammini, S. Rinaldi, and M. Quarantelli, “Experimental evaluation of synchronization solutions for substation automation systems,” Austin, TX, USA, 3–6 May 2010, pp. 1492–1496. [11] J. Amelot, J. Fletcher, D. Anand, C. Vasseur, Y.-S. Li-Baboud, and J. Moyne, “An IEEE 1588 time synchronization testbed for assessing power distribution requirements,” Portsmouth, NH, USA, 27 Sep. – 1 Oct. 2010, pp. 13–18. [12] W. Lewandowski, J. Azoubib, and W. J. Klepczynski, “GPS: Primary tool for time transfer,” Proc. IEEE, vol. 87, no. 1, pp. 163–172, Jan. 1999. [13] G. Gaderer, P. Loschmidt, and T. Sauter, “Improving fault tolerance in high-precision clock synchronization,” IEEE Trans. Ind. Informat., vol. 6, no. 2, pp. 206–215, May 2010. [14] R. L. Scheiterer, C. Na, D. Obradovic, and G. Steindl, “Synchronization performance of the precision time protocol in industrial automation networks,” IEEE Trans. Instrum. Meas., vol. 58, no. 6, pp. 1849–1857, Jun. 2009. [15] M. Bloch, O. Mancini, and T. McClelland, “Mass-produced quartz oscillators as low-cost replacement of passive rubidium vapor frequency standards,” Geneva, Switzerland, 29 May – 1 Jun. 2007, pp. 1235–1240. [16] R. Subrahmanyan, “Timing recovery for IEEE 1588 applications in telecommunications,” IEEE Trans. Instrum. Meas., vol. 58, no. 6, pp. 1858–1868, Jun. 2009.

APPENDIX B

Test bed equipment details B.1

Photographs and network diagram

Figure B.2 and Figure B.1 show the equipment installed in the process bus test bed. Figure B.3 is a schematic of how the test bed was configured for the majority of tests. The RTDS hardware was located in Powerlink’s SVC Simulator Room. The remaining hardware was installed in the Engineering Secondary Systems Test and Development Centre, where two 19” racks were provided for process bus research. The two locations are on different levels of the same building, and are separated by approximately 30 metres.

Figure B.1: Photograph of the test bed components in the RTDS Room.

157

158

APPENDIX B. TEST BED EQUIPMENT DETAILS

Figure B.2: Photograph of the test bed components in the Secondary Systems Test and Development Centre.

Figure B.3 (facing page): Schematic of how the test bed was configured for the majority of tests. Four dedicated fibre optic cables were installed for this project, and are shown as Fibre 1, Fibre 2, Fibre 3 and Fibre 4 on the diagram.

B.1 Photographs and network diagram

159

GTNET-SV #1

RTDS Room (Upstairs)

GTNET-GSE

Ctrl

Transparent Clock (Converter) for alternative PTP Master

GTNET-SV #2 Alternative Slave Clock RTDS RSCAD Fibre 1 SV+PTP

Four fibre optic cables run 33 m between the RTDS room and the Test Centre

Fibre 3 PTP

Fibre 2 SV+PTP

Fibre 4 GOOSE + Ctrl

Redundant Grandmaster Clocks

PTP0 - Slave PTP1 - Master

+1C9 Panel, Test Centre (Downstairs)

Alternative Process Bus Switch

Process Bus Switch

Ctrl SV

SV SV

1-PPS P444

Remote P545

P545

RET670

Protection Relays GOOSE+Ctrl GOOSE+Ctrl

GOOSE + Ctrl Ctrl

Ctrl + NTP

Control Network Switch

DCR12 Media Converters

Network Emulator

+1C10 Panel, Test Centre (Downstairs)

Station Bus Switch

Ctrl + NTP

Independent Grandmaster

DAG7.5G4

NE1000 DPO2014

Oscilloscope Control/Capture

Legend Cat 5 Twisted Pair (100BASE-TX) Multi-mode Fibre (100BASE-FX), Orange Sampled Values (VID 9), White CAT5 GOOSE (VID 8), Blue CAT5 PTP (VID 15), Yellow CAT5 Management (VID 1), Blue CAT5

Router/Firewall to corporate network TITLE

NETWORK DIAGRAM

DESCRIPTION

Process Bus, Station Bus and Control network topology

1 Pulse Per Second (Fibre Optic)

FILENAME PROCESS BUS NETWORK V4-NO NAMES.VSD

REVISED

18/12/2012

160

B.2

APPENDIX B. TEST BED EQUIPMENT DETAILS

Equipment specification

The following tables detail the make and model of equipment used in the test bed and, where relevant, the revision of firmware or software version. Table B.1: Protection relays installed in the process bus test bed.

Make

Model

Firmware

Role

Areva

P444

550K

Distance Relay

ABB

RET670

1.5.0.35

Transformer Relay

Schneider

P545

580K

Current Differential Relay

Table B.2: PTP grandmaster and slave clocks used in the test bed.

Make

Model

Firmware

Role

Tekron

TCG 01-E

F2.08

Grandmaster

Meinberg

M600-MRS

5.32v3

Grandmaster

Ruggedcom

RSG-2288

3.11.0

Grandmaster

Tekron

TTM 01-E

2.018

Slave clock

Table B.3: Ethernet switches and PTP transparent clocks used in the test bed.

Make

Model

Firmware

Role

Alloy

MS888G2

2.12

Control network switch

Cisco

CGS-2520

12.2(58)EY

Transparent clock

Hirschmann

MACH1030

07.1.01

Station bus switch

Hirschmann

MACH1040

07.1.01

Transparent clock

Hirschmann

MICE

07.1.01

Transparent clock

Ruggedcom

RSG-2288

3.11.0

Transparent clock

B.2 Equipment specification

161

Table B.4: Test equipment and network tools incorporated into the test bed.

Make

Model

Firmware

Role

RTDS

GTNET-SV

2.5

Sampled values publisher

RTDS

GTNET-GSE

4.3

GOOSE publisher/subscriber

OMICRON

CMC256-6

2.4.1

Secondary injection test set

LeCroy

Wavesurfer 424

6.3.0.5

Digital storage oscilloscope

Tektronix

DPO2014

1.39

Digital storage oscilloscope

Endace

DAG7.5G4

dsm_v2_2

Precision Ethernet capture card

NetOptics

10/100/1000

n/a

Ethernet tap

Simena

NE1000

5.7.0

Network emulator

Alloy

FCR100ST

n/a

100BASE-FX/TX media converter

Alloy

GCR2000SC

n/a

1000BASE-LX/T media converter

Table B.5: Test bed configuration and analysis software.

Make

Model

Version

Role

RTDS

RSCAD

3.002.2

RTDS simulation editor

OMICRON

Test Universe

2.4.1 SR 1

Test set control

ABB

PCM600

2.4.1

RET670 configuration

ABB

IET600

5.1.15

RET670 61850 engineering tool

Schneider

S1 Studio

3.4.1

P444/P545 configuration software

Endace

DAG Tools

dag-4.2.1

Ethernet traffic capture and generation

Microsoft

Excel

2003 & 2010

Oscilloscope control

R

2.15.2

Statistical analysis

NET-SNMP

5.7

SNMP interrogation

tcpreplay

3.4.3 build 2375

Ethernet traffic generation

Wireshark

1.9-Dev

Captured traffic processing

APPENDIX C

Participation in internationals standards development In the course of this research the author participated in the development of IEC and IEEE international standards, with involvement in the following standards: 1. IEC TR 61850-90-4, “Communication networks and systems for power utility automation – Part 90-4: Network engineering guidelines for substations”. 2. IEC 61850-9-2 ed2.0 “Communication networks and systems for power utility automation – Part 9-2: Specific communication service mapping (SCSM) – Sampled values over ISO/IEC 8802-3”. 3. IEC 61869-9 (draft), “Instrument Transformers – Part 9: Digital interface for instrument transformers”. 4. IEEE Std C37.238–2011, “IEEE Standard Profile for Use of IEEE 1588 Precision Time Protocol in Power System Applications”. This activity took place with IEC Technical Committee 57 Working Group 10 (TC57 WG10) and IEEE Power Systems Relaying Committee Working Group H7/SubC7. References from the convenor of TC57 WG10 and the co-chair of WG H7/SubC7 are attached.

163

December 13, 2012

To Whom It May Concern RE: Reference Letter for Mr. David Ingram

Dear Sir/Madam:

This letter is to acknowledge the contributions and continuous support provided by Mr. David Ingram in the course of development of the IEEE Std C37.238-2011 "IEEE Standard Profile for Use of IEEE 1588™ Precision Time Protocol in Power System Applications". Mr. Ingram is a Corresponding Member of the IEEE Power Energy Society (PES) Power System Relaying Committee (PSRC) Working Group H7/Sub C7. Over a period of time he has been actively participating in multiple Working Group discussions via teleconferences and electronically, helping to bring the utility prospective and enabling a balanced decision making. In particular, Mr. Ingram contributed to discussions on clock types (one-step and two-step), Virtual Local Area Networks (VLANs) and IEC 61850-9-2 process bus. Mr. Ingram also co-authored IEEE C37.238 Summary Papers and participated in the 2012 International IEEE Symposium on Precision Clock Synchronization for Measurement, Control and Communication (ISPCS), where interoperability testing of the IEEE C37.238 was conducted. By means of this letter I would like to thank Mr. Ingram for his active involvement and support in making the IEEE Std C37.238-2011 standard the most useful and practical for the Electrical Power Industry.

Sincerely,

Dr. Galina S. Antonova, Member IEEE Co-Chair, IEEE PES PSRC WG H7/Sub C7 Email: [email protected] Phone: + 1 604 379 2871

APPENDIX D

Additional publications Supporting publications, not forming chapters of this thesis, are listed in Table D.1. Table D.1: List of supporting publications.

Paper Type

Details of Paper

Magazine

P. Schaub, A. Kenwrick & D. Ingram, “Australia leads with process bus”. Transmission and Distribution World, vol. 64, no. 5, pp. 24–32, May 2012.

Conference

P. Schaub, J. Haywood, D. M. E. Ingram, A. Kenwrick & G. Dusha (2011). “Test and evaluation of Non Conventional Instrument Transformers and sampled value process bus on Powerlink’s transmission network”. In CIGRÉ South East Asia Protection and Automation Conference 2011 (SEAPAC), Sydney, Australia.

Conference

IEEE PES PSRC Working Group H7/Sub C7 Members and Guests (2012). “Standard profile for use of IEEE Std 1588-2008 Precision Time Protocol (PTP) in power system applications”. In 2012 International IEEE Symposium on Precision Clock Synchronization for Measurement, Control and Communication (ISPCS), pp. 31–16, San Francisco, CA, USA, doi:10.1109/ISPCS.2012.6336618.

Conference

IEEE PSRC Working Group H7/Sub C7 Members and Guests (2012). “Standard profile for use of IEEE Std 1588-2008 Precision Time Protocol (PTP) in power system applications”. In Western Protective Relaying Conference (WPRC), Spokane, WA, USA. Revised and extended version of ISPCS paper.

167

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Amelot, J., Li-Baboud, Y.-S., Vasseur, C., Fletcher, J., Anand, D., & Moyne, J. (2011). An IEEE 1588 performance testing dashboard for power industry requirements. In 2011 International IEEE Symposium on Precision Clock Synchronization for Measurement, Control and Communication (ISPCS), pp. 132–137, Munich, Germany. doi:10.1109/ISPCS.2011.6070157.

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